include/mgba/internal/ds/io.h (view raw)
1/* Copyright (c) 2013-2016 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#ifndef DS_IO_H
7#define DS_IO_H
8
9#include <mgba-util/common.h>
10
11CXX_GUARD_START
12
13#include <mgba/core/log.h>
14
15enum DSIORegisters {
16 // DMA
17 DS_REG_DMA0SAD_LO = 0x0B0,
18 DS_REG_DMA0SAD_HI = 0x0B2,
19 DS_REG_DMA0DAD_LO = 0x0B4,
20 DS_REG_DMA0DAD_HI = 0x0B6,
21 DS_REG_DMA0CNT_LO = 0x0B8,
22 DS_REG_DMA0CNT_HI = 0x0BA,
23 DS_REG_DMA1SAD_LO = 0x0BC,
24 DS_REG_DMA1SAD_HI = 0x0BE,
25 DS_REG_DMA1DAD_LO = 0x0C0,
26 DS_REG_DMA1DAD_HI = 0x0C2,
27 DS_REG_DMA1CNT_LO = 0x0C4,
28 DS_REG_DMA1CNT_HI = 0x0C6,
29 DS_REG_DMA2SAD_LO = 0x0C8,
30 DS_REG_DMA2SAD_HI = 0x0CA,
31 DS_REG_DMA2DAD_LO = 0x0CC,
32 DS_REG_DMA2DAD_HI = 0x0CE,
33 DS_REG_DMA2CNT_LO = 0x0D0,
34 DS_REG_DMA2CNT_HI = 0x0D2,
35 DS_REG_DMA3SAD_LO = 0x0D4,
36 DS_REG_DMA3SAD_HI = 0x0D6,
37 DS_REG_DMA3DAD_LO = 0x0D8,
38 DS_REG_DMA3DAD_HI = 0x0DA,
39 DS_REG_DMA3CNT_LO = 0x0DC,
40 DS_REG_DMA3CNT_HI = 0x0DE,
41
42 // Timers
43 DS_REG_TM0CNT_LO = 0x100,
44 DS_REG_TM0CNT_HI = 0x102,
45 DS_REG_TM1CNT_LO = 0x104,
46 DS_REG_TM1CNT_HI = 0x106,
47 DS_REG_TM2CNT_LO = 0x108,
48 DS_REG_TM2CNT_HI = 0x10A,
49 DS_REG_TM3CNT_LO = 0x10C,
50 DS_REG_TM3CNT_HI = 0x10E,
51
52 // IPC
53 DS_REG_IPCSYNC = 0x180,
54 DS_REG_IPCFIFOCNT = 0x184,
55 DS_REG_IPCFIFOSEND_LO = 0x188,
56 DS_REG_IPCFIFOSEND_HI = 0x18A,
57 DS_REG_IPCFIFORECV_LO = 0x100000,
58 DS_REG_IPCFIFORECV_HI = 0x100002,
59
60 // Interrupts
61 DS_REG_IME = 0x208,
62 DS_REG_IE_LO = 0x210,
63 DS_REG_IE_HI = 0x212,
64 DS_REG_IF_LO = 0x214,
65 DS_REG_IF_HI = 0x216,
66};
67
68enum DS7IORegisters {
69 // Video
70 DS7_REG_DISPSTAT = 0x004,
71 DS7_REG_VCOUNT = 0x006,
72
73 // Keypad
74 DS7_REG_KEYINPUT = 0x130,
75 DS7_REG_KEYCNT = 0x132,
76 DS7_REG_EXTKEYIN = 0x136,
77 DS7_REG_RTC = 0x138,
78
79 // Game card
80 DS7_REG_AUXSPICNT = 0x1A0,
81 DS7_REG_AUXSPIDATA = 0x1A2,
82 DS7_REG_SLOT1CNT_LO = 0x1A4,
83 DS7_REG_SLOT1CNT_HI = 0x1A6,
84 DS7_REG_SLOT1CMD_0 = 0x1A8,
85 DS7_REG_SLOT1CMD_1 = 0x1A9,
86 DS7_REG_SLOT1CMD_2 = 0x1AA,
87 DS7_REG_SLOT1CMD_3 = 0x1AB,
88 DS7_REG_SLOT1CMD_4 = 0x1AC,
89 DS7_REG_SLOT1CMD_5 = 0x1AD,
90 DS7_REG_SLOT1CMD_6 = 0x1AE,
91 DS7_REG_SLOT1CMD_7 = 0x1AF,
92 DS7_REG_SLOT1DATA_0 = 0x100010,
93 DS7_REG_SLOT1DATA_1 = 0x100011,
94 DS7_REG_SLOT1DATA_2 = 0x100012,
95 DS7_REG_SLOT1DATA_3 = 0x100013,
96
97 // Etc
98 DS7_REG_EXMEMSTAT = 0x204,
99
100 // Memory control
101 DS7_REG_VRAMSTAT = 0x240,
102 DS7_REG_WRAMSTAT = 0x241,
103 DS7_REG_POSTFLG = 0x300,
104 DS7_REG_HALTCNT = 0x301,
105 DS7_REG_POWCNT2 = 0x304,
106 DS7_REG_BIOSPROT_LO = 0x308,
107 DS7_REG_BIOSPROT_HI = 0x30A,
108
109 DS7_REG_MAX = 0x51E,
110};
111
112enum DS9IORegisters {
113 // Video
114 DS9_REG_A_DISPCNT_LO = 0x000,
115 DS9_REG_A_DISPCNT_HI = 0x002,
116 DS9_REG_DISPSTAT = 0x004,
117 DS9_REG_VCOUNT = 0x006,
118 DS9_REG_A_BG0CNT = 0x008,
119 DS9_REG_A_BG1CNT = 0x00A,
120 DS9_REG_A_BG2CNT = 0x00C,
121 DS9_REG_A_BG3CNT = 0x00E,
122 DS9_REG_A_BG0HOFS = 0x010,
123 DS9_REG_A_BG0VOFS = 0x012,
124 DS9_REG_A_BG1HOFS = 0x014,
125 DS9_REG_A_BG1VOFS = 0x016,
126 DS9_REG_A_BG2HOFS = 0x018,
127 DS9_REG_A_BG2VOFS = 0x01A,
128 DS9_REG_A_BG3HOFS = 0x01C,
129 DS9_REG_A_BG3VOFS = 0x01E,
130 DS9_REG_A_BG2PA = 0x020,
131 DS9_REG_A_BG2PB = 0x022,
132 DS9_REG_A_BG2PC = 0x024,
133 DS9_REG_A_BG2PD = 0x026,
134 DS9_REG_A_BG2X_LO = 0x028,
135 DS9_REG_A_BG2X_HI = 0x02A,
136 DS9_REG_A_BG2Y_LO = 0x02C,
137 DS9_REG_A_BG2Y_HI = 0x02E,
138 DS9_REG_A_BG3PA = 0x030,
139 DS9_REG_A_BG3PB = 0x032,
140 DS9_REG_A_BG3PC = 0x034,
141 DS9_REG_A_BG3PD = 0x036,
142 DS9_REG_A_BG3X_LO = 0x038,
143 DS9_REG_A_BG3X_HI = 0x03A,
144 DS9_REG_A_BG3Y_LO = 0x03C,
145 DS9_REG_A_BG3Y_HI = 0x03E,
146 DS9_REG_A_WIN0H = 0x040,
147 DS9_REG_A_WIN1H = 0x042,
148 DS9_REG_A_WIN0V = 0x044,
149 DS9_REG_A_WIN1V = 0x046,
150 DS9_REG_A_WININ = 0x048,
151 DS9_REG_A_WINOUT = 0x04A,
152 DS9_REG_A_MOSAIC = 0x04C,
153 DS9_REG_A_BLDCNT = 0x050,
154 DS9_REG_A_BLDALPHA = 0x052,
155 DS9_REG_A_BLDY = 0x054,
156 DS9_REG_DISP3DCNT = 0x060,
157 DS9_REG_DISPCAPCNT_LO = 0x064,
158 DS9_REG_DISPCAPCNT_HI = 0x066,
159 DS9_REG_DISP_MMEM_FIFO_LO = 0x068,
160 DS9_REG_DISP_MMEM_FIFO_HI = 0x06A,
161 DS9_REG_A_MASTER_BRIGHT = 0x06C,
162
163 DS9_REG_B_DISPCNT_LO = 0x1000,
164 DS9_REG_B_DISPCNT_HI = 0x1002,
165 DS9_REG_B_BG0CNT = 0x1008,
166 DS9_REG_B_BG1CNT = 0x100A,
167 DS9_REG_B_BG2CNT = 0x100C,
168 DS9_REG_B_BG3CNT = 0x100E,
169 DS9_REG_B_BG0HOFS = 0x1010,
170 DS9_REG_B_BG0VOFS = 0x1012,
171 DS9_REG_B_BG1HOFS = 0x1014,
172 DS9_REG_B_BG1VOFS = 0x1016,
173 DS9_REG_B_BG2HOFS = 0x1018,
174 DS9_REG_B_BG2VOFS = 0x101A,
175 DS9_REG_B_BG3HOFS = 0x101C,
176 DS9_REG_B_BG3VOFS = 0x101E,
177 DS9_REG_B_BG2PA = 0x1020,
178 DS9_REG_B_BG2PB = 0x1022,
179 DS9_REG_B_BG2PC = 0x1024,
180 DS9_REG_B_BG2PD = 0x1026,
181 DS9_REG_B_BG2X_LO = 0x1028,
182 DS9_REG_B_BG2X_HI = 0x102A,
183 DS9_REG_B_BG2Y_LO = 0x102C,
184 DS9_REG_B_BG2Y_HI = 0x102E,
185 DS9_REG_B_BG3PA = 0x1030,
186 DS9_REG_B_BG3PB = 0x1032,
187 DS9_REG_B_BG3PC = 0x1034,
188 DS9_REG_B_BG3PD = 0x1036,
189 DS9_REG_B_BG3X_LO = 0x1038,
190 DS9_REG_B_BG3X_HI = 0x103A,
191 DS9_REG_B_BG3Y_LO = 0x103C,
192 DS9_REG_B_BG3Y_HI = 0x103E,
193 DS9_REG_B_WIN0H = 0x1040,
194 DS9_REG_B_WIN1H = 0x1042,
195 DS9_REG_B_WIN0V = 0x1044,
196 DS9_REG_B_WIN1V = 0x1046,
197 DS9_REG_B_WININ = 0x1048,
198 DS9_REG_B_WINOUT = 0x104A,
199 DS9_REG_B_MOSAIC = 0x104C,
200 DS9_REG_B_BLDCNT = 0x1050,
201 DS9_REG_B_BLDALPHA = 0x1052,
202 DS9_REG_B_BLDY = 0x1054,
203 DS9_REG_B_MASTER_BRIGHT = 0x106C,
204
205 // Keypad
206 DS9_REG_KEYINPUT = 0x130,
207 DS9_REG_KEYCNT = 0x132,
208
209 // Game card
210 DS9_REG_AUXSPICNT = 0x1A0,
211 DS9_REG_AUXSPIDATA = 0x1A2,
212 DS9_REG_SLOT1CNT_LO = 0x1A4,
213 DS9_REG_SLOT1CNT_HI = 0x1A6,
214 DS9_REG_SLOT1CMD_0 = 0x1A8,
215 DS9_REG_SLOT1CMD_1 = 0x1A9,
216 DS9_REG_SLOT1CMD_2 = 0x1AA,
217 DS9_REG_SLOT1CMD_3 = 0x1AB,
218 DS9_REG_SLOT1CMD_4 = 0x1AC,
219 DS9_REG_SLOT1CMD_5 = 0x1AD,
220 DS9_REG_SLOT1CMD_6 = 0x1AE,
221 DS9_REG_SLOT1CMD_7 = 0x1AF,
222 DS9_REG_SLOT1DATA_0 = 0x100010,
223 DS9_REG_SLOT1DATA_1 = 0x100011,
224 DS9_REG_SLOT1DATA_2 = 0x100012,
225 DS9_REG_SLOT1DATA_3 = 0x100013,
226
227 // Etc
228 DS9_REG_EXMEMCNT = 0x204,
229
230 // Memory control
231 DS9_REG_VRAMCNT_A = 0x240,
232 DS9_REG_VRAMCNT_B = 0x241,
233 DS9_REG_VRAMCNT_C = 0x242,
234 DS9_REG_VRAMCNT_D = 0x243,
235 DS9_REG_VRAMCNT_E = 0x244,
236 DS9_REG_VRAMCNT_F = 0x245,
237 DS9_REG_VRAMCNT_G = 0x246,
238 DS9_REG_WRAMCNT = 0x247,
239 DS9_REG_VRAMCNT_H = 0x248,
240 DS9_REG_VRAMCNT_I = 0x249,
241
242 // Math
243 DS9_REG_DIVCNT = 0x280,
244 DS9_REG_DIV_NUMER_0 = 0x290,
245 DS9_REG_DIV_NUMER_1 = 0x292,
246 DS9_REG_DIV_NUMER_2 = 0x294,
247 DS9_REG_DIV_NUMER_3 = 0x296,
248 DS9_REG_DIV_DENOM_0 = 0x298,
249 DS9_REG_DIV_DENOM_1 = 0x29A,
250 DS9_REG_DIV_DENOM_2 = 0x29C,
251 DS9_REG_DIV_DENOM_3 = 0x29E,
252 DS9_REG_DIV_RESULT_0 = 0x2A0,
253 DS9_REG_DIV_RESULT_1 = 0x2A2,
254 DS9_REG_DIV_RESULT_2 = 0x2A4,
255 DS9_REG_DIV_RESULT_3 = 0x2A6,
256 DS9_REG_DIVREM_RESULT_0 = 0x2A8,
257 DS9_REG_DIVREM_RESULT_1 = 0x2AA,
258 DS9_REG_DIVREM_RESULT_2 = 0x2AC,
259 DS9_REG_DIVREM_RESULT_3 = 0x2AE,
260 DS9_REG_SQRTCNT = 0x2B0,
261 DS9_REG_SQRT_RESULT_LO = 0x2B4,
262 DS9_REG_SQRT_RESULT_HI = 0x2B6,
263 DS9_REG_SQRT_PARAM_0 = 0x2B8,
264 DS9_REG_SQRT_PARAM_1 = 0x2BA,
265 DS9_REG_SQRT_PARAM_2 = 0x2BC,
266 DS9_REG_SQRT_PARAM_3 = 0x2BE,
267
268 DS9_REG_MAX = 0x106E,
269
270 DS9_REG_POSTFLG = 0x300,
271 DS9_REG_POWCNT1 = 0x304,
272};
273
274mLOG_DECLARE_CATEGORY(DS_IO);
275
276extern const char* const DS7IORegisterNames[];
277extern const char* const DS9IORegisterNames[];
278
279struct DS;
280void DS7IOInit(struct DS* ds);
281void DS7IOWrite(struct DS* ds, uint32_t address, uint16_t value);
282void DS7IOWrite8(struct DS* ds, uint32_t address, uint8_t value);
283void DS7IOWrite32(struct DS* ds, uint32_t address, uint32_t value);
284uint16_t DS7IORead(struct DS* ds, uint32_t address);
285
286void DS9IOInit(struct DS* ds);
287void DS9IOWrite(struct DS* ds, uint32_t address, uint16_t value);
288void DS9IOWrite8(struct DS* ds, uint32_t address, uint8_t value);
289void DS9IOWrite32(struct DS* ds, uint32_t address, uint32_t value);
290uint16_t DS9IORead(struct DS* ds, uint32_t address);
291
292CXX_GUARD_END
293
294#endif