1#define nop andeq r0, r0
  2
  3.text
  4
  5b resetBase
  6b undefBase
  7b swiBase
  8b pabtBase
  9b dabtBase
 10nop
 11b irqBase
 12b fiqBase
 13
 14resetBase:
 15mov pc, #0x8000000
 16
 17swiBase:
 18cmp    sp, #0
 19moveq  sp, #0x04000000
 20subeq  sp, #0x20
 21stmfd  sp!, {r11-r12, lr}
 22ldrb   r11, [lr, #-2]
 23mov    r12, #swiTable
 24ldr    r11, [r12, r11, lsl #2]
 25cmp    r11, #0
 26mrs    r12, spsr
 27stmfd  sp!, {r12}
 28and    r12, #0x80
 29orr    r12, #0x1F
 30msr    cpsr, r12
 31stmfd  sp!, {lr}
 32mov    lr, pc
 33bxne   r11
 34ldmfd  sp!, {lr}
 35msr    cpsr, #0x93
 36ldmfd  sp!, {r12}
 37msr    spsr, r12
 38ldmfd  sp!, {r11-r12, lr}
 39movs   pc, lr
 40
 41swiTable:
 42.word SoftReset
 43.word RegisterRamReset
 44.word Halt
 45.word Stop
 46.word IntrWait
 47.word VBlankIntrWait
 48.word Div
 49.word DivArm
 50.word Sqrt
 51.word ArcTan
 52.word ArcTan2
 53.word CpuSet
 54.word CpuFastSet
 55# ... The rest of this table isn't needed if the rest aren't implemented
 56
 57irqBase:
 58stmfd  sp!, {r0-r3, r12, lr}
 59mov    r0, #0x04000000
 60add    lr, pc, #0
 61ldr    pc, [r0, #-4]
 62ldmfd  sp!, {r0-r3, r12, lr}
 63subs   pc, lr, #4
 64
 65VBlankIntrWait:
 66mov    r0, #1
 67mov    r1, #1
 68IntrWait:
 69stmfd  sp!, {r2-r3, lr}
 70mov    r12, #0x04000000
 71# See if we want to return immediately
 72cmp    r0, #0
 73mov    r0, #0
 74mov    r2, #1
 75beq    1f
 76# Halt
 770:
 78strb   r0, [r12, #0x301]
 791:
 80# Check which interrupts were acknowledged
 81strb   r0, [r12, #0x208]
 82ldrh   r3, [r12, #-8]
 83ands   r3, r1
 84eorne  r3, r1
 85strneh r3, [r12, #-8]
 86strb   r2, [r12, #0x208]
 87beq    0b
 88ldmfd  sp!, {r2-r3, pc}
 89
 90CpuSet:
 91stmfd  sp!, {lr}
 92mov    r3, r2, lsl #12
 93tst    r2, #0x01000000
 94beq    0f
 95# Fill
 96tst    r2, #0x04000000
 97beq    1f
 98# Word
 99add    r3, r1, r3, lsr #10
100ldmia  r0!, {r2}
1012:
102cmp    r1, r3
103stmltia  r1!, {r2}
104blt    2b
105b      3f
106# Halfword
1071:
108bic    r0, #1
109bic    r1, #1
110add    r3, r1, r3, lsr #11
111ldrh   r2, [r0]
1122:
113cmp    r1, r3
114strlth r2, [r1], #2
115blt    2b
116b      3f
117# Copy
1180:
119tst    r2, #0x04000000
120beq    1f
121# Word
122add    r3, r1, r3, lsr #10
1232:
124cmp    r1, r3
125ldmltia r0!, {r2}
126stmltia r1!, {r2}
127blt    2b
128b      3f
129# Halfword
1301:
131add    r3, r1, r3, lsr #11
132bic    r0, #1
133bic    r1, #1
1342:
135cmp    r1, r3
136ldrlth r2, [r0], #2
137strlth r2, [r1], #2
138blt    2b
1393:
140ldmfd  sp!, {pc}
141
142CpuFastSet:
143stmfd  sp!, {r4-r10, lr}
144tst    r2, #0x01000000
145mov    r3, r2, lsl #12
146add    r2, r1, r3, lsr #10
147beq    0f
148# Fill
149ldr    r3, [r0]
150mov    r4, r3
151mov    r5, r3
152mov    r6, r3
153mov    r7, r3
154mov    r8, r3
155mov    r9, r3
156mov    r10, r3
1571:
158cmp    r1, r2
159stmltia r1!, {r3-r10}
160blt    1b
161b      2f
162# Copy
1630:
164cmp    r1, r2
165ldmltia r0!, {r3-r10}
166stmltia r1!, {r3-r10}
167blt    0b
1682:
169ldmfd  sp!, {r4-r10, pc}