all repos — mgba @ 0ce3b9a2b7ae866a850d5bae19de5fe67d2ca628

mGBA Game Boy Advance Emulator

src/gb/timer.c (view raw)

  1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/gb/timer.h>
  7
  8#include <mgba/internal/lr35902/lr35902.h>
  9#include <mgba/internal/gb/gb.h>
 10#include <mgba/internal/gb/io.h>
 11#include <mgba/internal/gb/serialize.h>
 12
 13void _GBTimerIRQ(struct mTiming* timing, void* context, uint32_t cyclesLate) {
 14	UNUSED(timing);
 15	UNUSED(cyclesLate);
 16	struct GBTimer* timer = context;
 17	timer->p->memory.io[REG_TIMA] = timer->p->memory.io[REG_TMA];
 18	timer->p->memory.io[REG_IF] |= (1 << GB_IRQ_TIMER);
 19	GBUpdateIRQs(timer->p);
 20}
 21
 22static void _GBTimerDivIncrement(struct GBTimer* timer, uint32_t cyclesLate) {
 23	while (timer->nextDiv >= GB_DMG_DIV_PERIOD) {
 24		timer->nextDiv -= GB_DMG_DIV_PERIOD;
 25
 26		// Make sure to trigger when the correct bit is a falling edge
 27		if (timer->timaPeriod > 0 && (timer->internalDiv & (timer->timaPeriod - 1)) == timer->timaPeriod - 1) {
 28			++timer->p->memory.io[REG_TIMA];
 29			if (!timer->p->memory.io[REG_TIMA]) {
 30				mTimingSchedule(&timer->p->timing, &timer->irq, 4 - cyclesLate);
 31			}
 32		}
 33		++timer->internalDiv;
 34		timer->p->memory.io[REG_DIV] = timer->internalDiv >> 4;
 35	}
 36}
 37
 38void _GBTimerUpdate(struct mTiming* timing, void* context, uint32_t cyclesLate) {
 39	struct GBTimer* timer = context;
 40	timer->nextDiv += cyclesLate;
 41	_GBTimerDivIncrement(timer, cyclesLate);
 42	// Batch div increments
 43	int divsToGo = 16 - (timer->internalDiv & 15);
 44	int timaToGo = INT_MAX;
 45	if (timer->timaPeriod) {
 46		timaToGo = timer->timaPeriod - (timer->internalDiv & (timer->timaPeriod - 1));
 47	}
 48	if (timaToGo < divsToGo) {
 49		divsToGo = timaToGo;
 50	}
 51	timer->nextDiv = GB_DMG_DIV_PERIOD * divsToGo;
 52	mTimingSchedule(timing, &timer->event, timer->nextDiv - cyclesLate);
 53}
 54
 55void GBTimerReset(struct GBTimer* timer) {
 56	timer->event.context = timer;
 57	timer->event.name = "GB Timer";
 58	timer->event.callback = _GBTimerUpdate;
 59	timer->event.priority = 0x20;
 60	timer->irq.context = timer;
 61	timer->irq.name = "GB Timer IRQ";
 62	timer->irq.callback = _GBTimerIRQ;
 63	timer->event.priority = 0x21;
 64
 65	timer->nextDiv = GB_DMG_DIV_PERIOD; // TODO: GBC differences
 66	timer->timaPeriod = 1024 >> 4;
 67}
 68
 69void GBTimerDivReset(struct GBTimer* timer) {
 70	timer->nextDiv -= mTimingUntil(&timer->p->timing, &timer->event);
 71	mTimingDeschedule(&timer->p->timing, &timer->event);
 72	_GBTimerDivIncrement(timer, (timer->p->cpu->executionState + 1) & 3);
 73	if (timer->internalDiv & (timer->timaPeriod >> 1)) {
 74		++timer->p->memory.io[REG_TIMA];
 75		if (!timer->p->memory.io[REG_TIMA]) {
 76			mTimingSchedule(&timer->p->timing, &timer->irq, 4 - ((timer->p->cpu->executionState + 1) & 3));
 77		}
 78	}
 79	timer->p->memory.io[REG_DIV] = 0;
 80	timer->internalDiv = 0;
 81	timer->nextDiv = GB_DMG_DIV_PERIOD;
 82	mTimingSchedule(&timer->p->timing, &timer->event, timer->nextDiv - ((timer->p->cpu->executionState + 1) & 3));
 83}
 84
 85uint8_t GBTimerUpdateTAC(struct GBTimer* timer, GBRegisterTAC tac) {
 86	if (GBRegisterTACIsRun(tac)) {
 87		switch (GBRegisterTACGetClock(tac)) {
 88		case 0:
 89			timer->timaPeriod = 1024 >> 4;
 90			break;
 91		case 1:
 92			timer->timaPeriod = 16 >> 4;
 93			break;
 94		case 2:
 95			timer->timaPeriod = 64 >> 4;
 96			break;
 97		case 3:
 98			timer->timaPeriod = 256 >> 4;
 99			break;
100		}
101
102		timer->nextDiv -= mTimingUntil(&timer->p->timing, &timer->event);
103		mTimingDeschedule(&timer->p->timing, &timer->event);
104		_GBTimerDivIncrement(timer, (timer->p->cpu->executionState + 1) & 3);
105		timer->nextDiv += GB_DMG_DIV_PERIOD;
106		mTimingSchedule(&timer->p->timing, &timer->event, timer->nextDiv);
107	} else {
108		timer->timaPeriod = 0;
109	}
110	return tac;
111}
112
113void GBTimerSerialize(const struct GBTimer* timer, struct GBSerializedState* state) {
114	STORE_32LE(timer->nextDiv, 0, &state->timer.nextDiv);
115	STORE_32LE(timer->internalDiv, 0, &state->timer.internalDiv);
116	STORE_32LE(timer->timaPeriod, 0, &state->timer.timaPeriod);
117	STORE_32LE(timer->event.when - mTimingCurrentTime(&timer->p->timing), 0, &state->timer.nextEvent);
118	STORE_32LE(timer->irq.when - mTimingCurrentTime(&timer->p->timing), 0, &state->timer.nextIRQ);
119	GBSerializedTimerFlags flags = GBSerializedTimerFlagsSetIrqPending(0, mTimingIsScheduled(&timer->p->timing, &timer->irq));
120	state->timer.flags = flags;
121}
122
123void GBTimerDeserialize(struct GBTimer* timer, const struct GBSerializedState* state) {
124	LOAD_32LE(timer->nextDiv, 0, &state->timer.nextDiv);
125	LOAD_32LE(timer->internalDiv, 0, &state->timer.internalDiv);
126	LOAD_32LE(timer->timaPeriod, 0, &state->timer.timaPeriod);
127
128	uint32_t when;
129	LOAD_32LE(when, 0, &state->timer.nextEvent);
130	mTimingSchedule(&timer->p->timing, &timer->event, when);
131
132	GBSerializedTimerFlags flags = state->timer.flags;
133
134	if (GBSerializedTimerFlagsIsIrqPending(flags)) {
135		LOAD_32LE(when, 0, &state->timer.nextIRQ);
136		mTimingSchedule(&timer->p->timing, &timer->irq, when);
137	}
138}