include/mgba/internal/gba/serialize.h (view raw)
1/* Copyright (c) 2013-2016 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#ifndef GBA_SERIALIZE_H
7#define GBA_SERIALIZE_H
8
9#include <mgba-util/common.h>
10
11CXX_GUARD_START
12
13#include <mgba/core/core.h>
14#include <mgba/internal/gba/gba.h>
15#include <mgba/internal/gb/serialize.h>
16
17extern const uint32_t GBA_SAVESTATE_MAGIC;
18extern const uint32_t GBA_SAVESTATE_VERSION;
19
20mLOG_DECLARE_CATEGORY(GBA_STATE);
21
22/* Savestate format:
23 * 0x00000 - 0x00003: Version Magic (0x01000001)
24 * 0x00004 - 0x00007: BIOS checksum (e.g. 0xBAAE187F for official BIOS)
25 * 0x00008 - 0x0000B: ROM CRC32
26 * 0x0000C - 0x0000F: Master cycles
27 * 0x00010 - 0x0001B: Game title (e.g. METROID4USA)
28 * 0x0001C - 0x0001F: Game code (e.g. AMTE)
29 * 0x00020 - 0x0012F: CPU state:
30 * | 0x00020 - 0x0005F: GPRs
31 * | 0x00060 - 0x00063: CPSR
32 * | 0x00064 - 0x00067: SPSR
33 * | 0x00068 - 0x0006B: Cycles since last event
34 * | 0x0006C - 0x0006F: Cycles until next event
35 * | 0x00070 - 0x00117: Banked registers
36 * | 0x00118 - 0x0012F: Banked SPSRs
37 * 0x00130 - 0x00143: Audio channel 1/framer state
38 * | 0x00130 - 0x00133: Envelepe timing
39 * | bits 0 - 6: Remaining length
40 * | bits 7 - 9: Next step
41 * | bits 10 - 20: Shadow frequency register
42 * | bits 21 - 31: Reserved
43 * | 0x00134 - 0x00137: Next frame
44 * | 0x00138 - 0x0013F: Reserved
45 * | 0x00140 - 0x00143: Next event
46 * 0x00144 - 0x00153: Audio channel 2 state
47 * | 0x00144 - 0x00147: Envelepe timing
48 * | bits 0 - 2: Remaining length
49 * | bits 3 - 5: Next step
50 * | bits 6 - 31: Reserved
51 * | 0x00148 - 0x0014F: Reserved
52 * | 0x00150 - 0x00153: Next event
53 * 0x00154 - 0x0017B: Audio channel 3 state
54 * | 0x00154 - 0x00173: Wave banks
55 * | 0x00174 - 0x00175: Remaining length
56 * | 0x00176 - 0x00177: Reserved
57 * | 0x00178 - 0x0017B: Next event
58 * 0x0017C - 0x0018B: Audio channel 4 state
59 * | 0x0017C - 0x0017F: Linear feedback shift register state
60 * | 0x00180 - 0x00183: Envelepe timing
61 * | bits 0 - 2: Remaining length
62 * | bits 3 - 5: Next step
63 * | bits 6 - 31: Reserved
64 * | 0x00184 - 0x00187: Reserved
65 * | 0x00188 - 0x0018B: Next event
66 * 0x0018C - 0x001AB: Audio FIFO 1
67 * 0x001AC - 0x001CB: Audio FIFO 2
68 * 0x001CC - 0x001DF: Audio miscellaneous state
69 * | 0x001CC - 0x001D3: Reserved
70 * | 0x001D4 - 0x001D7: Next sample
71 * | 0x001D8 - 0x001DB: FIFO size
72 * | TODO: Fix this, they're in big-endian order, but field is little-endian
73 * | 0x001DC - 0x001DC: Channel 1 envelope state
74 * | bits 0 - 3: Current volume
75 * | bits 4 - 5: Is dead?
76 * | bit 6: Is high?
77 * | 0x001DD - 0x001DD: Channel 2 envelope state
78 * | bits 0 - 3: Current volume
79 * | bits 4 - 5: Is dead?
80 * | bit 6: Is high?
81* | bits 7: Reserved
82 * | 0x001DE - 0x001DE: Channel 4 envelope state
83 * | bits 0 - 3: Current volume
84 * | bits 4 - 5: Is dead?
85 * | bit 6: Is high?
86* | bits 7: Reserved
87 * | 0x001DF - 0x001DF: Miscellaneous audio flags
88 * | bits 0 - 3: Current frame
89 * | bit 4: Is channel 1 sweep enabled?
90 * | bit 5: Has channel 1 sweep occurred?
91 * | bits 6 - 7: Reserved
92 * 0x001E0 - 0x001FF: Video miscellaneous state
93 * | 0x001E0 - 0x001E3: Next event
94 * | 0x001E4 - 0x001FB: Reserved
95 * | 0x001FC - 0x001FF: Frame counter
96 * 0x00200 - 0x00213: Timer 0
97 * | 0x00200 - 0x00201: Reload value
98 * | 0x00202 - 0x00203: Old reload value
99 * | 0x00204 - 0x00207: Last event
100 * | 0x00208 - 0x0020B: Next event
101 * | 0x0020C - 0x0020F: Next IRQ
102 * | 0x00210 - 0x00213: Miscellaneous flags
103 * 0x00214 - 0x00227: Timer 1
104 * | 0x00214 - 0x00215: Reload value
105 * | 0x00216 - 0x00217: Old reload value
106 * | 0x00218 - 0x0021B: Last event
107 * | 0x0021C - 0x0021F: Next event
108 * | 0x00220 - 0x00223: Next IRQ
109 * | 0x00224 - 0x00227: Miscellaneous flags
110 * 0x00228 - 0x0023B: Timer 2
111 * | 0x00228 - 0x00229: Reload value
112 * | 0x0022A - 0x0022B: Old reload value
113 * | 0x0022C - 0x0022F: Last event
114 * | 0x00230 - 0x00233: Next event
115 * | 0x00234 - 0x00237: Next IRQ
116 * | 0x00238 - 0x0023B: Miscellaneous flags
117 * 0x0023C - 0x00250: Timer 3
118 * | 0x0023C - 0x0023D: Reload value
119 * | 0x0023E - 0x0023F: Old reload value
120 * | 0x00240 - 0x00243: Last event
121 * | 0x00244 - 0x00247: Next event
122 * | 0x00248 - 0x0024B: Next IRQ
123 * | 0x0024C - 0x0024F: Miscellaneous flags
124 * 0x00250 - 0x0025F: DMA 0
125 * | 0x00250 - 0x00253: DMA next source
126 * | 0x00254 - 0x00257: DMA next destination
127 * | 0x00258 - 0x0025B: DMA next count
128 * | 0x0025C - 0x0025F: DMA next event
129 * 0x00260 - 0x0026F: DMA 1
130 * | 0x00260 - 0x00263: DMA next source
131 * | 0x00264 - 0x00267: DMA next destination
132 * | 0x00268 - 0x0026B: DMA next count
133 * | 0x0026C - 0x0026F: DMA next event
134 * 0x00270 - 0x0027F: DMA 2
135 * | 0x00270 - 0x00273: DMA next source
136 * | 0x00274 - 0x00277: DMA next destination
137 * | 0x00278 - 0x0027B: DMA next count
138 * | 0x0027C - 0x0027F: DMA next event
139 * 0x00280 - 0x0028F: DMA 3
140 * | 0x00280 - 0x00283: DMA next source
141 * | 0x00284 - 0x00287: DMA next destination
142 * | 0x00288 - 0x0028B: DMA next count
143 * | 0x0028C - 0x0028F: DMA next event
144 * 0x00290 - 0x002C3: GPIO state
145 * | 0x00290 - 0x00291: Pin state
146 * | 0x00292 - 0x00293: Direction state
147 * | 0x00294 - 0x002B6: RTC state (see hardware.h for format)
148 * | 0x002B7 - 0x002B7: GPIO devices
149 * | bit 0: Has RTC values
150 * | bit 1: Has rumble value (reserved)
151 * | bit 2: Has light sensor value
152 * | bit 3: Has gyroscope value
153 * | bit 4: Has tilt values
154 * | bit 5: Has Game Boy Player attached
155 * | bits 6 - 7: Reserved
156 * | 0x002B8 - 0x002B9: Gyroscope sample
157 * | 0x002BA - 0x002BB: Tilt x sample
158 * | 0x002BC - 0x002BD: Tilt y sample
159 * | 0x002BE - 0x002BF: Flags
160 * | bit 0: Is read enabled
161 * | bit 1: Gyroscope sample is edge
162 * | bit 2: Light sample is edge
163 * | bit 3: Reserved
164 * | bits 4 - 15: Light counter
165 * | 0x002C0 - 0x002C0: Light sample
166 * | 0x002C1 - 0x002C3: Flags
167 * | bits 0 - 1: Tilt state machine
168 * | bits 2 - 3: GB Player inputs posted
169 * | bits 4 - 8: GB Player transmit position
170 * | bits 9 - 23: Reserved
171 * 0x002C4 - 0x002C7: Game Boy Player next event
172 * 0x002C8 - 0x002CB: Current DMA transfer word
173 * 0x002CC - 0x002DF: Reserved (leave zero)
174 * 0x002E0 - 0x002EF: Savedata state
175 * | 0x002E0 - 0x002E0: Savedata type
176 * | 0x002E1 - 0x002E1: Savedata command (see savedata.h)
177 * | 0x002E2 - 0x002E2: Flags
178 * | bits 0 - 1: Flash state machine
179 * | bits 2 - 3: Reserved
180 * | bit 4: Flash bank
181 * | bit 5: Is settling occurring?
182 * | bits 6 - 7: Reserved
183 * | 0x002E3 - 0x002E3: EEPROM read bits remaining
184 * | 0x002E4 - 0x002E7: Settling cycles remaining
185 * | 0x002E8 - 0x002EB: EEPROM read address
186 * | 0x002EC - 0x002EF: EEPROM write address
187 * | 0x002F0 - 0x002F1: Flash settling sector
188 * | 0x002F2 - 0x002F3: Reserved
189 * 0x002F4 - 0x002FF: Prefetch
190 * | 0x002F4 - 0x002F7: GBA BIOS bus prefetch
191 * | 0x002F8 - 0x002FB: CPU prefecth (decode slot)
192 * | 0x002FC - 0x002FF: CPU prefetch (fetch slot)
193 * 0x00300 - 0x00303: Associated movie stream ID for record/replay (or 0 if no stream)
194 * 0x00304 - 0x00317: Savestate creation time (usec since 1970)
195 * 0x00318 - 0x0031B: Last prefetched program counter
196 * 0x0031C - 0x0031F: Miscellaneous flags
197 * | bit 0: Is CPU halted?
198 * | bit 1: POSTFLG
199 * 0x00320 - 0x003FF: Reserved (leave zero)
200 * 0x00400 - 0x007FF: I/O memory
201 * 0x00800 - 0x00BFF: Palette
202 * 0x00C00 - 0x00FFF: OAM
203 * 0x01000 - 0x18FFF: VRAM
204 * 0x19000 - 0x20FFF: IWRAM
205 * 0x21000 - 0x60FFF: WRAM
206 * Total size: 0x61000 (397,312) bytes
207 */
208
209DECL_BITFIELD(GBASerializedHWFlags1, uint16_t);
210DECL_BIT(GBASerializedHWFlags1, ReadWrite, 0);
211DECL_BIT(GBASerializedHWFlags1, GyroEdge, 1);
212DECL_BIT(GBASerializedHWFlags1, LightEdge, 2);
213DECL_BITS(GBASerializedHWFlags1, LightCounter, 4, 12);
214
215DECL_BITFIELD(GBASerializedHWFlags2, uint8_t);
216DECL_BITS(GBASerializedHWFlags2, TiltState, 0, 2);
217DECL_BITS(GBASerializedHWFlags2, GbpInputsPosted, 2, 2);
218DECL_BITS(GBASerializedHWFlags2, GbpTxPosition, 4, 5);
219
220DECL_BITFIELD(GBASerializedHWFlags3, uint16_t);
221
222DECL_BITFIELD(GBASerializedSavedataFlags, uint8_t);
223DECL_BITS(GBASerializedSavedataFlags, FlashState, 0, 2);
224DECL_BIT(GBASerializedSavedataFlags, FlashBank, 4);
225DECL_BIT(GBASerializedSavedataFlags, DustSettling, 5);
226
227DECL_BITFIELD(GBASerializedMiscFlags, uint32_t);
228DECL_BIT(GBASerializedMiscFlags, Halted, 0);
229DECL_BIT(GBASerializedMiscFlags, POSTFLG, 1);
230
231struct GBASerializedState {
232 uint32_t versionMagic;
233 uint32_t biosChecksum;
234 uint32_t romCrc32;
235 uint32_t masterCycles;
236
237 char title[12];
238 uint32_t id;
239
240 struct {
241 int32_t gprs[16];
242 union PSR cpsr;
243 union PSR spsr;
244
245 int32_t cycles;
246 int32_t nextEvent;
247
248 int32_t bankedRegisters[6][7];
249 int32_t bankedSPSRs[6];
250 } cpu;
251
252 struct {
253 struct GBSerializedPSGState psg;
254 uint8_t fifoA[32];
255 uint8_t fifoB[32];
256 int32_t reserved[2];
257 int32_t nextSample;
258 uint32_t fifoSize;
259 GBSerializedAudioFlags flags;
260 } audio;
261
262 struct {
263 int32_t nextEvent;
264 int32_t reserved[6];
265 int32_t frameCounter;
266 } video;
267
268 struct {
269 uint16_t reload;
270 uint16_t reserved;
271 uint32_t lastEvent;
272 uint32_t nextEvent;
273 uint32_t nextIrq;
274 GBATimerFlags flags;
275 } timers[4];
276
277 struct {
278 uint32_t nextSource;
279 uint32_t nextDest;
280 int32_t nextCount;
281 int32_t when;
282 } dma[4];
283
284 struct {
285 uint16_t pinState;
286 uint16_t pinDirection;
287 struct GBARTC rtc;
288 uint8_t devices;
289 uint16_t gyroSample;
290 uint16_t tiltSampleX;
291 uint16_t tiltSampleY;
292 GBASerializedHWFlags1 flags1;
293 uint8_t lightSample;
294 GBASerializedHWFlags2 flags2;
295 GBASerializedHWFlags3 flags3;
296 uint32_t gbpNextEvent;
297 } hw;
298
299 uint32_t dmaTransferRegister;
300
301 uint32_t reservedHardware[5];
302
303 struct {
304 uint8_t type;
305 uint8_t command;
306 GBASerializedSavedataFlags flags;
307 int8_t readBitsRemaining;
308 uint32_t settlingDust;
309 uint32_t readAddress;
310 uint32_t writeAddress;
311 uint16_t settlingSector;
312 uint16_t reserved;
313 } savedata;
314
315 uint32_t biosPrefetch;
316 uint32_t cpuPrefetch[2];
317
318 uint32_t associatedStreamId;
319 uint32_t reservedRr[5];
320
321 uint32_t lastPrefetchedPc;
322 GBASerializedMiscFlags miscFlags;
323
324 uint32_t reserved[56];
325
326 uint16_t io[SIZE_IO >> 1];
327 uint16_t pram[SIZE_PALETTE_RAM >> 1];
328 uint16_t oam[SIZE_OAM >> 1];
329 uint16_t vram[SIZE_VRAM >> 1];
330 uint8_t iwram[SIZE_WORKING_IRAM];
331 uint8_t wram[SIZE_WORKING_RAM];
332};
333
334struct VDir;
335
336void GBASerialize(struct GBA* gba, struct GBASerializedState* state);
337bool GBADeserialize(struct GBA* gba, const struct GBASerializedState* state);
338
339CXX_GUARD_END
340
341#endif