include/mgba/internal/gba/serialize.h (view raw)
1/* Copyright (c) 2013-2016 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#ifndef GBA_SERIALIZE_H
7#define GBA_SERIALIZE_H
8
9#include <mgba-util/common.h>
10
11CXX_GUARD_START
12
13#include <mgba/core/core.h>
14#include <mgba/internal/gba/gba.h>
15#include <mgba/internal/gb/serialize.h>
16
17extern const uint32_t GBA_SAVESTATE_MAGIC;
18extern const uint32_t GBA_SAVESTATE_VERSION;
19
20mLOG_DECLARE_CATEGORY(GBA_STATE);
21
22/* Savestate format:
23 * 0x00000 - 0x00003: Version Magic (0x01000001)
24 * 0x00004 - 0x00007: BIOS checksum (e.g. 0xBAAE187F for official BIOS)
25 * 0x00008 - 0x0000B: ROM CRC32
26 * 0x0000C - 0x0000F: Master cycles
27 * 0x00010 - 0x0001B: Game title (e.g. METROID4USA)
28 * 0x0001C - 0x0001F: Game code (e.g. AMTE)
29 * 0x00020 - 0x0012F: CPU state:
30 * | 0x00020 - 0x0005F: GPRs
31 * | 0x00060 - 0x00063: CPSR
32 * | 0x00064 - 0x00067: SPSR
33 * | 0x00068 - 0x0006B: Cycles since last event
34 * | 0x0006C - 0x0006F: Cycles until next event
35 * | 0x00070 - 0x00117: Banked registers
36 * | 0x00118 - 0x0012F: Banked SPSRs
37 * 0x00130 - 0x00143: Audio channel 1/framer state
38 * | 0x00130 - 0x00133: Envelepe timing
39 * | bits 0 - 6: Remaining length
40 * | bits 7 - 9: Next step
41 * | bits 10 - 20: Shadow frequency register
42 * | bits 21 - 31: Reserved
43 * | 0x00134 - 0x00137: Next frame
44 * | 0x00138 - 0x0013F: Reserved
45 * | 0x00140 - 0x00143: Next event
46 * 0x00144 - 0x00153: Audio channel 2 state
47 * | 0x00144 - 0x00147: Envelepe timing
48 * | bits 0 - 2: Remaining length
49 * | bits 3 - 5: Next step
50 * | bits 6 - 31: Reserved
51 * | 0x00148 - 0x0014F: Reserved
52 * | 0x00150 - 0x00153: Next event
53 * 0x00154 - 0x0017B: Audio channel 3 state
54 * | 0x00154 - 0x00173: Wave banks
55 * | 0x00174 - 0x00175: Remaining length
56 * | 0x00176 - 0x00177: Reserved
57 * | 0x00178 - 0x0017B: Next event
58 * 0x0017C - 0x0018B: Audio channel 4 state
59 * | 0x0017C - 0x0017F: Linear feedback shift register state
60 * | 0x00180 - 0x00183: Envelepe timing
61 * | bits 0 - 2: Remaining length
62 * | bits 3 - 5: Next step
63 * | bits 6 - 31: Reserved
64 * | 0x00184 - 0x00187: Last event
65 * | 0x00188 - 0x0018B: Next event
66 * 0x0018C - 0x001AB: Audio FIFO 1
67 * 0x001AC - 0x001CB: Audio FIFO 2
68 * 0x001CC - 0x001DF: Audio miscellaneous state
69 * | 0x001CC - 0x001CF: FIFO 1 size
70 * | 0x001D0 - 0x001D3: Reserved
71 * | 0x001D4 - 0x001D7: Next sample
72 * | 0x001D8 - 0x001DB: FIFO 2 size
73 * | TODO: Fix this, they're in big-endian order, but field is little-endian
74 * | 0x001DC - 0x001DC: Channel 1 envelope state
75 * | bits 0 - 3: Current volume
76 * | bits 4 - 5: Is dead?
77 * | bit 6: Is high?
78 * | 0x001DD - 0x001DD: Channel 2 envelope state
79 * | bits 0 - 3: Current volume
80 * | bits 4 - 5: Is dead?
81 * | bit 6: Is high?
82* | bits 7: Reserved
83 * | 0x001DE - 0x001DE: Channel 4 envelope state
84 * | bits 0 - 3: Current volume
85 * | bits 4 - 5: Is dead?
86 * | bit 6: Is high?
87* | bits 7: Reserved
88 * | 0x001DF - 0x001DF: Miscellaneous audio flags
89 * | bits 0 - 3: Current frame
90 * | bit 4: Is channel 1 sweep enabled?
91 * | bit 5: Has channel 1 sweep occurred?
92 * | bits 6 - 7: Reserved
93 * 0x001E0 - 0x001FF: Video miscellaneous state
94 * | 0x001E0 - 0x001E3: Next event
95 * | 0x001E4 - 0x001FB: Reserved
96 * | 0x001FC - 0x001FF: Frame counter
97 * 0x00200 - 0x00213: Timer 0
98 * | 0x00200 - 0x00201: Reload value
99 * | 0x00202 - 0x00203: Old reload value
100 * | 0x00204 - 0x00207: Last event
101 * | 0x00208 - 0x0020B: Next event
102 * | 0x0020C - 0x0020F: Reserved
103 * | 0x00210 - 0x00213: Miscellaneous flags
104 * 0x00214 - 0x00227: Timer 1
105 * | 0x00214 - 0x00215: Reload value
106 * | 0x00216 - 0x00217: Old reload value
107 * | 0x00218 - 0x0021B: Last event
108 * | 0x0021C - 0x0021F: Next event
109 * | 0x00220 - 0x00223: Reserved
110 * | 0x00224 - 0x00227: Miscellaneous flags
111 * 0x00228 - 0x0023B: Timer 2
112 * | 0x00228 - 0x00229: Reload value
113 * | 0x0022A - 0x0022B: Old reload value
114 * | 0x0022C - 0x0022F: Last event
115 * | 0x00230 - 0x00233: Next event
116 * | 0x00234 - 0x00237: Reserved
117 * | 0x00238 - 0x0023B: Miscellaneous flags
118 * 0x0023C - 0x00250: Timer 3
119 * | 0x0023C - 0x0023D: Reload value
120 * | 0x0023E - 0x0023F: Old reload value
121 * | 0x00240 - 0x00243: Last event
122 * | 0x00244 - 0x00247: Next event
123 * | 0x00248 - 0x0024B: Reserved
124 * | 0x0024C - 0x0024F: Miscellaneous flags
125 * 0x00250 - 0x0025F: DMA 0
126 * | 0x00250 - 0x00253: DMA next source
127 * | 0x00254 - 0x00257: DMA next destination
128 * | 0x00258 - 0x0025B: DMA next count
129 * | 0x0025C - 0x0025F: DMA next event
130 * 0x00260 - 0x0026F: DMA 1
131 * | 0x00260 - 0x00263: DMA next source
132 * | 0x00264 - 0x00267: DMA next destination
133 * | 0x00268 - 0x0026B: DMA next count
134 * | 0x0026C - 0x0026F: DMA next event
135 * 0x00270 - 0x0027F: DMA 2
136 * | 0x00270 - 0x00273: DMA next source
137 * | 0x00274 - 0x00277: DMA next destination
138 * | 0x00278 - 0x0027B: DMA next count
139 * | 0x0027C - 0x0027F: DMA next event
140 * 0x00280 - 0x0028F: DMA 3
141 * | 0x00280 - 0x00283: DMA next source
142 * | 0x00284 - 0x00287: DMA next destination
143 * | 0x00288 - 0x0028B: DMA next count
144 * | 0x0028C - 0x0028F: DMA next event
145 * 0x00290 - 0x002C3: GPIO state
146 * | 0x00290 - 0x00291: Pin state
147 * | 0x00292 - 0x00293: Direction state
148 * | 0x00294 - 0x002B6: RTC state (see hardware.h for format)
149 * | 0x002B7 - 0x002B7: GPIO devices
150 * | bit 0: Has RTC values
151 * | bit 1: Has rumble value (reserved)
152 * | bit 2: Has light sensor value
153 * | bit 3: Has gyroscope value
154 * | bit 4: Has tilt values
155 * | bit 5: Has Game Boy Player attached
156 * | bits 6 - 7: Reserved
157 * | 0x002B8 - 0x002B9: Gyroscope sample
158 * | 0x002BA - 0x002BB: Tilt x sample
159 * | 0x002BC - 0x002BD: Tilt y sample
160 * | 0x002BE - 0x002BF: Flags
161 * | bit 0: Is read enabled
162 * | bit 1: Gyroscope sample is edge
163 * | bit 2: Light sample is edge
164 * | bit 3: Reserved
165 * | bits 4 - 15: Light counter
166 * | 0x002C0 - 0x002C0: Light sample
167 * | 0x002C1 - 0x002C3: Flags
168 * | bits 0 - 1: Tilt state machine
169 * | bits 2 - 3: GB Player inputs posted
170 * | bits 4 - 8: GB Player transmit position
171 * | bits 9 - 23: Reserved
172 * 0x002C4 - 0x002C7: Game Boy Player next event
173 * 0x002C8 - 0x002CB: Current DMA transfer word
174 * 0x002CC - 0x002CF: Last DMA transfer PC
175 * 0x002D0 - 0x002DF: Reserved (leave zero)
176 * 0x002E0 - 0x002EF: Savedata state
177 * | 0x002E0 - 0x002E0: Savedata type
178 * | 0x002E1 - 0x002E1: Savedata command (see savedata.h)
179 * | 0x002E2 - 0x002E2: Flags
180 * | bits 0 - 1: Flash state machine
181 * | bits 2 - 3: Reserved
182 * | bit 4: Flash bank
183 * | bit 5: Is settling occurring?
184 * | bits 6 - 7: Reserved
185 * | 0x002E3 - 0x002E3: EEPROM read bits remaining
186 * | 0x002E4 - 0x002E7: Settling cycles remaining
187 * | 0x002E8 - 0x002EB: EEPROM read address
188 * | 0x002EC - 0x002EF: EEPROM write address
189 * | 0x002F0 - 0x002F1: Flash settling sector
190 * | 0x002F2 - 0x002F3: Reserved
191 * 0x002F4 - 0x002FF: Prefetch
192 * | 0x002F4 - 0x002F7: GBA BIOS bus prefetch
193 * | 0x002F8 - 0x002FB: CPU prefecth (decode slot)
194 * | 0x002FC - 0x002FF: CPU prefetch (fetch slot)
195 * 0x00300 - 0x00303: Associated movie stream ID for record/replay (or 0 if no stream)
196 * 0x00304 - 0x00317: Savestate creation time (usec since 1970)
197 * 0x00318 - 0x0031B: Last prefetched program counter
198 * 0x0031C - 0x0031F: Miscellaneous flags
199 * | bit 0: Is CPU halted?
200 * | bit 1: POSTFLG
201 * | bit 2: Is IRQ pending?
202 * 0x00320 - 0x00323: Next IRQ event
203 * 0x00324 - 0x003FF: Reserved (leave zero)
204 * 0x00400 - 0x007FF: I/O memory
205 * 0x00800 - 0x00BFF: Palette
206 * 0x00C00 - 0x00FFF: OAM
207 * 0x01000 - 0x18FFF: VRAM
208 * 0x19000 - 0x20FFF: IWRAM
209 * 0x21000 - 0x60FFF: WRAM
210 * Total size: 0x61000 (397,312) bytes
211 */
212
213DECL_BITFIELD(GBASerializedHWFlags1, uint16_t);
214DECL_BIT(GBASerializedHWFlags1, ReadWrite, 0);
215DECL_BIT(GBASerializedHWFlags1, GyroEdge, 1);
216DECL_BIT(GBASerializedHWFlags1, LightEdge, 2);
217DECL_BITS(GBASerializedHWFlags1, LightCounter, 4, 12);
218
219DECL_BITFIELD(GBASerializedHWFlags2, uint8_t);
220DECL_BITS(GBASerializedHWFlags2, TiltState, 0, 2);
221DECL_BITS(GBASerializedHWFlags2, GbpInputsPosted, 2, 2);
222DECL_BITS(GBASerializedHWFlags2, GbpTxPosition, 4, 5);
223
224DECL_BITFIELD(GBASerializedHWFlags3, uint16_t);
225
226DECL_BITFIELD(GBASerializedSavedataFlags, uint8_t);
227DECL_BITS(GBASerializedSavedataFlags, FlashState, 0, 2);
228DECL_BIT(GBASerializedSavedataFlags, FlashBank, 4);
229DECL_BIT(GBASerializedSavedataFlags, DustSettling, 5);
230
231DECL_BITFIELD(GBASerializedMiscFlags, uint32_t);
232DECL_BIT(GBASerializedMiscFlags, Halted, 0);
233DECL_BIT(GBASerializedMiscFlags, POSTFLG, 1);
234DECL_BIT(GBASerializedMiscFlags, IrqPending, 2);
235
236struct GBASerializedState {
237 uint32_t versionMagic;
238 uint32_t biosChecksum;
239 uint32_t romCrc32;
240 uint32_t masterCycles;
241
242 char title[12];
243 uint32_t id;
244
245 struct {
246 int32_t gprs[16];
247 union PSR cpsr;
248 union PSR spsr;
249
250 int32_t cycles;
251 int32_t nextEvent;
252
253 int32_t bankedRegisters[6][7];
254 int32_t bankedSPSRs[6];
255 } cpu;
256
257 struct {
258 struct GBSerializedPSGState psg;
259 uint8_t fifoA[32];
260 uint8_t fifoB[32];
261 uint32_t fifoSizeA;
262 int32_t reserved;
263 int32_t nextSample;
264 uint32_t fifoSizeB;
265 GBSerializedAudioFlags flags;
266 } audio;
267
268 struct {
269 int32_t nextEvent;
270 int32_t reserved[6];
271 int32_t frameCounter;
272 } video;
273
274 struct {
275 uint16_t reload;
276 uint16_t reserved0;
277 uint32_t lastEvent;
278 uint32_t nextEvent;
279 uint32_t reserved1;
280 GBATimerFlags flags;
281 } timers[4];
282
283 struct {
284 uint32_t nextSource;
285 uint32_t nextDest;
286 int32_t nextCount;
287 int32_t when;
288 } dma[4];
289
290 struct {
291 uint16_t pinState;
292 uint16_t pinDirection;
293 struct GBARTC rtc;
294 uint8_t devices;
295 uint16_t gyroSample;
296 uint16_t tiltSampleX;
297 uint16_t tiltSampleY;
298 GBASerializedHWFlags1 flags1;
299 uint8_t lightSample;
300 GBASerializedHWFlags2 flags2;
301 GBASerializedHWFlags3 flags3;
302 uint32_t gbpNextEvent;
303 } hw;
304
305 uint32_t dmaTransferRegister;
306 uint32_t dmaBlockPC;
307
308 uint32_t reservedHardware[4];
309
310 struct {
311 uint8_t type;
312 uint8_t command;
313 GBASerializedSavedataFlags flags;
314 int8_t readBitsRemaining;
315 uint32_t settlingDust;
316 uint32_t readAddress;
317 uint32_t writeAddress;
318 uint16_t settlingSector;
319 uint16_t reserved;
320 } savedata;
321
322 uint32_t biosPrefetch;
323 uint32_t cpuPrefetch[2];
324
325 uint32_t associatedStreamId;
326 uint32_t reservedRr[5];
327
328 uint32_t lastPrefetchedPc;
329 GBASerializedMiscFlags miscFlags;
330 uint32_t nextIrq;
331
332 uint32_t reserved[55];
333
334 uint16_t io[SIZE_IO >> 1];
335 uint16_t pram[SIZE_PALETTE_RAM >> 1];
336 uint16_t oam[SIZE_OAM >> 1];
337 uint16_t vram[SIZE_VRAM >> 1];
338 uint8_t iwram[SIZE_WORKING_IRAM];
339 uint8_t wram[SIZE_WORKING_RAM];
340};
341
342struct VDir;
343
344void GBASerialize(struct GBA* gba, struct GBASerializedState* state);
345bool GBADeserialize(struct GBA* gba, const struct GBASerializedState* state);
346
347CXX_GUARD_END
348
349#endif