src/arm/emitter-thumb.h (view raw)
1/* Copyright (c) 2013-2014 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#ifndef EMITTER_THUMB_H
7#define EMITTER_THUMB_H
8
9#include "emitter-inlines.h"
10
11#define DECLARE_INSTRUCTION_THUMB(EMITTER, NAME) \
12 EMITTER ## NAME
13
14#define DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, NAME) \
15 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 00), \
16 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 01), \
17 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 10), \
18 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 11)
19
20#define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
21 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
22 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
23 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
24 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
25 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
26 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
27 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
28 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
29 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
30 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
31 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
32 DECLARE_INSTRUCTION_THUMB(EMITTER, AND), \
33 DECLARE_INSTRUCTION_THUMB(EMITTER, EOR), \
34 DECLARE_INSTRUCTION_THUMB(EMITTER, LSL2), \
35 DECLARE_INSTRUCTION_THUMB(EMITTER, LSR2), \
36 DECLARE_INSTRUCTION_THUMB(EMITTER, ASR2), \
37 DECLARE_INSTRUCTION_THUMB(EMITTER, ADC), \
38 DECLARE_INSTRUCTION_THUMB(EMITTER, SBC), \
39 DECLARE_INSTRUCTION_THUMB(EMITTER, ROR), \
40 DECLARE_INSTRUCTION_THUMB(EMITTER, TST), \
41 DECLARE_INSTRUCTION_THUMB(EMITTER, NEG), \
42 DECLARE_INSTRUCTION_THUMB(EMITTER, CMP2), \
43 DECLARE_INSTRUCTION_THUMB(EMITTER, CMN), \
44 DECLARE_INSTRUCTION_THUMB(EMITTER, ORR), \
45 DECLARE_INSTRUCTION_THUMB(EMITTER, MUL), \
46 DECLARE_INSTRUCTION_THUMB(EMITTER, BIC), \
47 DECLARE_INSTRUCTION_THUMB(EMITTER, MVN), \
48 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, ADD4), \
49 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, CMP3), \
50 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, MOV3), \
51 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
52 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
53 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
54 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
55 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR3_R)) \
56 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STR2_R)) \
57 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH2_R)) \
58 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB2_R)) \
59 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSB_R)) \
60 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR2_R)) \
61 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH2_R)) \
62 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB2_R)) \
63 APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSH_R)) \
64 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STR1_)) \
65 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR1_)) \
66 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB1_)) \
67 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB1_)) \
68 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH1_)) \
69 APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH1_)) \
70 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STR3_R)) \
71 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR4_R)) \
72 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD5_R)) \
73 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD6_R)) \
74 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
75 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
76 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
77 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
78 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
79 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
80 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
81 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, PUSH)), \
82 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, PUSHR)), \
83 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
84 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
85 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
86 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POP)), \
87 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POPR)), \
88 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BKPT)), \
89 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
90 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STMIA_R)) \
91 APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDMIA_R)) \
92 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BEQ)), \
93 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BNE)), \
94 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BCS)), \
95 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BCC)), \
96 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BMI)), \
97 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BPL)), \
98 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BVS)), \
99 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BVC)), \
100 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BHI)), \
101 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLS)), \
102 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BGE)), \
103 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLT)), \
104 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BGT)), \
105 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLE)), \
106 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
107 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, SWI)), \
108 DO_8(DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, B))), \
109 DO_8(DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL))), \
110 DO_8(DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BL1))), \
111 DO_8(DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BL2))) \
112
113#endif