src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/gba/bios.h>
7
8#include <mgba/internal/arm/isa-inlines.h>
9#include <mgba/internal/arm/macros.h>
10#include <mgba/internal/gba/gba.h>
11#include <mgba/internal/gba/io.h>
12#include <mgba/internal/gba/memory.h>
13
14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
16
17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
18
19static void _unLz77(struct GBA* gba, int width);
20static void _unHuffman(struct GBA* gba);
21static void _unRl(struct GBA* gba, int width);
22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
23static void _unBitPack(struct GBA* gba);
24
25static void _SoftReset(struct GBA* gba) {
26 struct ARMCore* cpu = gba->cpu;
27 ARMSetPrivilegeMode(cpu, MODE_IRQ);
28 cpu->spsr.packed = 0;
29 cpu->gprs[ARM_LR] = 0;
30 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
31 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
32 cpu->spsr.packed = 0;
33 cpu->gprs[ARM_LR] = 0;
34 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
35 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
36 cpu->gprs[ARM_LR] = 0;
37 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
38 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
39 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
40 if (flag) {
41 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
42 } else {
43 cpu->gprs[ARM_PC] = BASE_CART0;
44 }
45 _ARMSetMode(cpu, MODE_ARM);
46 ARMWritePC(cpu);
47}
48
49static void _RegisterRamReset(struct GBA* gba) {
50 uint32_t registers = gba->cpu->gprs[0];
51 struct ARMCore* cpu = gba->cpu;
52 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
53 if (registers & 0x01) {
54 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
55 }
56 if (registers & 0x02) {
57 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
58 }
59 if (registers & 0x04) {
60 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
61 }
62 if (registers & 0x08) {
63 memset(gba->video.vram, 0, SIZE_VRAM);
64 }
65 if (registers & 0x10) {
66 memset(gba->video.oam.raw, 0, SIZE_OAM);
67 }
68 if (registers & 0x20) {
69 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
70 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
71 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
72 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
73 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
74 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
75 }
76 if (registers & 0x40) {
77 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
78 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
79 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
80 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
81 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
82 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
86 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
87 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
88 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
89 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
91 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
92 }
93 if (registers & 0x80) {
94 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
104 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
105 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
106 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
107 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
112 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
113 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
114 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
118 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
119 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
122 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
125 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
126 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
128 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
131 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
132 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
165 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
166 }
167}
168
169static void _BgAffineSet(struct GBA* gba) {
170 struct ARMCore* cpu = gba->cpu;
171 int i = cpu->gprs[2];
172 float ox, oy;
173 float cx, cy;
174 float sx, sy;
175 float theta;
176 int offset = cpu->gprs[0];
177 int destination = cpu->gprs[1];
178 float a, b, c, d;
179 float rx, ry;
180 while (i--) {
181 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
182 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
183 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
184 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
185 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
186 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
187 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
188 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
189 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
190 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
191 offset += 20;
192 // Rotation
193 a = d = cosf(theta);
194 b = c = sinf(theta);
195 // Scale
196 a *= sx;
197 b *= -sx;
198 c *= sy;
199 d *= sy;
200 // Translate
201 rx = ox - (a * cx + b * cy);
202 ry = oy - (c * cx + d * cy);
203 cpu->memory.store16(cpu, destination, a * 256, 0);
204 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
205 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
206 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
207 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
208 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
209 destination += 16;
210 }
211}
212
213static void _ObjAffineSet(struct GBA* gba) {
214 struct ARMCore* cpu = gba->cpu;
215 int i = cpu->gprs[2];
216 float sx, sy;
217 float theta;
218 int offset = cpu->gprs[0];
219 int destination = cpu->gprs[1];
220 int diff = cpu->gprs[3];
221 float a, b, c, d;
222 while (i--) {
223 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
224 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
225 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
226 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
227 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
228 offset += 8;
229 // Rotation
230 a = d = cosf(theta);
231 b = c = sinf(theta);
232 // Scale
233 a *= sx;
234 b *= -sx;
235 c *= sy;
236 d *= sy;
237 cpu->memory.store16(cpu, destination, a * 256, 0);
238 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
239 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
240 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
241 destination += diff * 4;
242 }
243}
244
245static void _MidiKey2Freq(struct GBA* gba) {
246 struct ARMCore* cpu = gba->cpu;
247
248 int oldRegion = gba->memory.activeRegion;
249 gba->memory.activeRegion = REGION_BIOS;
250 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
251 gba->memory.activeRegion = oldRegion;
252
253 cpu->gprs[0] = key / exp2f((180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
254}
255
256static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
257 struct ARMCore* cpu = gba->cpu;
258 if (denom != 0 && (denom != -1 || num != INT32_MIN)) {
259 div_t result = div(num, denom);
260 cpu->gprs[0] = result.quot;
261 cpu->gprs[1] = result.rem;
262 cpu->gprs[3] = abs(result.quot);
263 } else if (denom == 0) {
264 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
265 // If abs(num) > 1, this should hang, but that would be painful to
266 // emulate in HLE, and no game will get into a state where it hangs...
267 cpu->gprs[0] = (num < 0) ? -1 : 1;
268 cpu->gprs[1] = num;
269 cpu->gprs[3] = 1;
270 } else {
271 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide INT_MIN by -1!");
272 cpu->gprs[0] = INT32_MIN;
273 cpu->gprs[1] = 0;
274 cpu->gprs[3] = INT32_MIN;
275 }
276}
277
278static int16_t _ArcTan(int32_t i, int32_t* r1, int32_t* r3) {
279 int32_t a = -((i * i) >> 14);
280 int32_t b = ((0xA9 * a) >> 14) + 0x390;
281 b = ((b * a) >> 14) + 0x91C;
282 b = ((b * a) >> 14) + 0xFB6;
283 b = ((b * a) >> 14) + 0x16AA;
284 b = ((b * a) >> 14) + 0x2081;
285 b = ((b * a) >> 14) + 0x3651;
286 b = ((b * a) >> 14) + 0xA2F9;
287 if (r1) {
288 *r1 = a;
289 }
290 if (r3) {
291 *r3 = b;
292 }
293 return (i * b) >> 16;
294}
295
296static int16_t _ArcTan2(int32_t x, int32_t y, int32_t* r1) {
297 if (!y) {
298 if (x >= 0) {
299 return 0;
300 }
301 return 0x8000;
302 }
303 if (!x) {
304 if (y >= 0) {
305 return 0x4000;
306 }
307 return 0xC000;
308 }
309 if (y >= 0) {
310 if (x >= 0) {
311 if (x >= y) {
312 return _ArcTan((y << 14) / x, r1, NULL);
313 }
314 } else if (-x >= y) {
315 return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
316 }
317 return 0x4000 - _ArcTan((x << 14) / y, r1, NULL);
318 } else {
319 if (x <= 0) {
320 if (-x > -y) {
321 return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
322 }
323 } else if (x >= -y) {
324 return _ArcTan((y << 14) / x, r1, NULL) + 0x10000;
325 }
326 return 0xC000 - _ArcTan((x << 14) / y, r1, NULL);
327 }
328}
329
330void GBASwi16(struct ARMCore* cpu, int immediate) {
331 struct GBA* gba = (struct GBA*) cpu->master;
332 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
333 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
334
335 switch (immediate) {
336 case 0xFA:
337 GBAPrintFlush(gba);
338 return;
339 }
340
341 if (gba->memory.fullBios) {
342 ARMRaiseSWI(cpu);
343 return;
344 }
345 switch (immediate) {
346 case 0x0:
347 _SoftReset(gba);
348 break;
349 case 0x1:
350 _RegisterRamReset(gba);
351 break;
352 case 0x2:
353 GBAHalt(gba);
354 break;
355 case 0x3:
356 GBAStop(gba);
357 break;
358 case 0x05:
359 // VBlankIntrWait
360 // Fall through:
361 case 0x04:
362 // IntrWait
363 ARMRaiseSWI(cpu);
364 break;
365 case 0x6:
366 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
367 break;
368 case 0x7:
369 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
370 break;
371 case 0x8:
372 cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
373 break;
374 case 0x9:
375 cpu->gprs[0] = _ArcTan(cpu->gprs[0], &cpu->gprs[1], &cpu->gprs[3]);
376 break;
377 case 0xA:
378 cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1], &cpu->gprs[1]);
379 cpu->gprs[3] = 0x170;
380 break;
381 case 0xB:
382 case 0xC:
383 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
384 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
385 break;
386 }
387 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
388 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
389 }
390 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
391 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
392 }
393 ARMRaiseSWI(cpu);
394 break;
395 case 0xD:
396 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
397 cpu->gprs[1] = 1;
398 cpu->gprs[3] = SIZE_BIOS;
399 break;
400 case 0xE:
401 _BgAffineSet(gba);
402 break;
403 case 0xF:
404 _ObjAffineSet(gba);
405 break;
406 case 0x10:
407 if (cpu->gprs[0] < BASE_WORKING_RAM) {
408 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
409 break;
410 }
411 switch (cpu->gprs[1] >> BASE_OFFSET) {
412 default:
413 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
414 // Fall through
415 case REGION_WORKING_RAM:
416 case REGION_WORKING_IRAM:
417 case REGION_VRAM:
418 _unBitPack(gba);
419 break;
420 }
421 break;
422 case 0x11:
423 case 0x12:
424 if (cpu->gprs[0] < BASE_WORKING_RAM) {
425 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
426 break;
427 }
428 switch (cpu->gprs[1] >> BASE_OFFSET) {
429 default:
430 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
431 // Fall through
432 case REGION_WORKING_RAM:
433 case REGION_WORKING_IRAM:
434 case REGION_VRAM:
435 _unLz77(gba, immediate == 0x11 ? 1 : 2);
436 break;
437 }
438 break;
439 case 0x13:
440 if (cpu->gprs[0] < BASE_WORKING_RAM) {
441 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
442 break;
443 }
444 switch (cpu->gprs[1] >> BASE_OFFSET) {
445 default:
446 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
447 // Fall through
448 case REGION_WORKING_RAM:
449 case REGION_WORKING_IRAM:
450 case REGION_VRAM:
451 _unHuffman(gba);
452 break;
453 }
454 break;
455 case 0x14:
456 case 0x15:
457 if (cpu->gprs[0] < BASE_WORKING_RAM) {
458 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
459 break;
460 }
461 switch (cpu->gprs[1] >> BASE_OFFSET) {
462 default:
463 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
464 // Fall through
465 case REGION_WORKING_RAM:
466 case REGION_WORKING_IRAM:
467 case REGION_VRAM:
468 _unRl(gba, immediate == 0x14 ? 1 : 2);
469 break;
470 }
471 break;
472 case 0x16:
473 case 0x17:
474 case 0x18:
475 if (cpu->gprs[0] < BASE_WORKING_RAM) {
476 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
477 break;
478 }
479 switch (cpu->gprs[1] >> BASE_OFFSET) {
480 default:
481 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
482 // Fall through
483 case REGION_WORKING_RAM:
484 case REGION_WORKING_IRAM:
485 case REGION_VRAM:
486 _unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
487 break;
488 }
489 break;
490 case 0x19:
491 // SoundBias is mostly meaningless here
492 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
493 break;
494 case 0x1F:
495 _MidiKey2Freq(gba);
496 break;
497 default:
498 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
499 }
500 gba->memory.biosPrefetch = 0xE3A02004;
501}
502
503void GBASwi32(struct ARMCore* cpu, int immediate) {
504 GBASwi16(cpu, immediate >> 16);
505}
506
507uint32_t GBAChecksum(uint32_t* memory, size_t size) {
508 size_t i;
509 uint32_t sum = 0;
510 for (i = 0; i < size; i += 4) {
511 sum += memory[i >> 2];
512 }
513 return sum;
514}
515
516static void _unLz77(struct GBA* gba, int width) {
517 struct ARMCore* cpu = gba->cpu;
518 uint32_t source = cpu->gprs[0];
519 uint32_t dest = cpu->gprs[1];
520 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
521 // We assume the signature byte (0x10) is correct
522 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
523 source += 4;
524 int blocksRemaining = 0;
525 uint32_t disp;
526 int bytes;
527 int byte;
528 int halfword = 0;
529 while (remaining > 0) {
530 if (blocksRemaining) {
531 if (blockheader & 0x80) {
532 // Compressed
533 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
534 source += 2;
535 disp = dest - (block & 0x0FFF) - 1;
536 bytes = (block >> 12) + 3;
537 while (bytes--) {
538 if (remaining) {
539 --remaining;
540 }
541 if (width == 2) {
542 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
543 if (dest & 1) {
544 byte >>= (disp & 1) * 8;
545 halfword |= byte << 8;
546 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
547 } else {
548 byte >>= (disp & 1) * 8;
549 halfword = byte & 0xFF;
550 }
551 } else {
552 byte = cpu->memory.load8(cpu, disp, 0);
553 cpu->memory.store8(cpu, dest, byte, 0);
554 }
555 ++disp;
556 ++dest;
557 }
558 } else {
559 // Uncompressed
560 byte = cpu->memory.load8(cpu, source, 0);
561 ++source;
562 if (width == 2) {
563 if (dest & 1) {
564 halfword |= byte << 8;
565 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
566 } else {
567 halfword = byte;
568 }
569 } else {
570 cpu->memory.store8(cpu, dest, byte, 0);
571 }
572 ++dest;
573 --remaining;
574 }
575 blockheader <<= 1;
576 --blocksRemaining;
577 } else {
578 blockheader = cpu->memory.load8(cpu, source, 0);
579 ++source;
580 blocksRemaining = 8;
581 }
582 }
583 cpu->gprs[0] = source;
584 cpu->gprs[1] = dest;
585 cpu->gprs[3] = 0;
586}
587
588DECL_BITFIELD(HuffmanNode, uint8_t);
589DECL_BITS(HuffmanNode, Offset, 0, 6);
590DECL_BIT(HuffmanNode, RTerm, 6);
591DECL_BIT(HuffmanNode, LTerm, 7);
592
593static void _unHuffman(struct GBA* gba) {
594 struct ARMCore* cpu = gba->cpu;
595 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
596 uint32_t dest = cpu->gprs[1];
597 uint32_t header = cpu->memory.load32(cpu, source, 0);
598 int remaining = header >> 8;
599 unsigned bits = header & 0xF;
600 if (bits == 0) {
601 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
602 bits = 8;
603 }
604 if (32 % bits || bits == 1) {
605 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
606 return;
607 }
608 // We assume the signature byte (0x20) is correct
609 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
610 int block = 0;
611 uint32_t treeBase = source + 5;
612 source += 5 + treesize;
613 uint32_t nPointer = treeBase;
614 HuffmanNode node;
615 int bitsRemaining;
616 int readBits;
617 int bitsSeen = 0;
618 node = cpu->memory.load8(cpu, nPointer, 0);
619 while (remaining > 0) {
620 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
621 source += 4;
622 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
623 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
624 if (bitstream & 0x80000000) {
625 // Go right
626 if (HuffmanNodeIsRTerm(node)) {
627 readBits = cpu->memory.load8(cpu, next + 1, 0);
628 } else {
629 nPointer = next + 1;
630 node = cpu->memory.load8(cpu, nPointer, 0);
631 continue;
632 }
633 } else {
634 // Go left
635 if (HuffmanNodeIsLTerm(node)) {
636 readBits = cpu->memory.load8(cpu, next, 0);
637 } else {
638 nPointer = next;
639 node = cpu->memory.load8(cpu, nPointer, 0);
640 continue;
641 }
642 }
643
644 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
645 bitsSeen += bits;
646 nPointer = treeBase;
647 node = cpu->memory.load8(cpu, nPointer, 0);
648 if (bitsSeen == 32) {
649 bitsSeen = 0;
650 cpu->memory.store32(cpu, dest, block, 0);
651 dest += 4;
652 remaining -= 4;
653 block = 0;
654 }
655 }
656 }
657 cpu->gprs[0] = source;
658 cpu->gprs[1] = dest;
659}
660
661static void _unRl(struct GBA* gba, int width) {
662 struct ARMCore* cpu = gba->cpu;
663 uint32_t source = cpu->gprs[0];
664 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
665 int padding = (4 - remaining) & 0x3;
666 // We assume the signature byte (0x30) is correct
667 int blockheader;
668 int block;
669 source += 4;
670 uint32_t dest = cpu->gprs[1];
671 int halfword = 0;
672 while (remaining > 0) {
673 blockheader = cpu->memory.load8(cpu, source, 0);
674 ++source;
675 if (blockheader & 0x80) {
676 // Compressed
677 blockheader &= 0x7F;
678 blockheader += 3;
679 block = cpu->memory.load8(cpu, source, 0);
680 ++source;
681 while (blockheader-- && remaining) {
682 --remaining;
683 if (width == 2) {
684 if (dest & 1) {
685 halfword |= block << 8;
686 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
687 } else {
688 halfword = block;
689 }
690 } else {
691 cpu->memory.store8(cpu, dest, block, 0);
692 }
693 ++dest;
694 }
695 } else {
696 // Uncompressed
697 blockheader++;
698 while (blockheader-- && remaining) {
699 --remaining;
700 int byte = cpu->memory.load8(cpu, source, 0);
701 ++source;
702 if (width == 2) {
703 if (dest & 1) {
704 halfword |= byte << 8;
705 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
706 } else {
707 halfword = byte;
708 }
709 } else {
710 cpu->memory.store8(cpu, dest, byte, 0);
711 }
712 ++dest;
713 }
714 }
715 }
716 if (width == 2) {
717 if (dest & 1) {
718 --padding;
719 ++dest;
720 }
721 for (; padding > 0; padding -= 2, dest += 2) {
722 cpu->memory.store16(cpu, dest, 0, 0);
723 }
724 } else {
725 while (padding--) {
726 cpu->memory.store8(cpu, dest, 0, 0);
727 ++dest;
728 }
729 }
730 cpu->gprs[0] = source;
731 cpu->gprs[1] = dest;
732}
733
734static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
735 struct ARMCore* cpu = gba->cpu;
736 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
737 uint32_t dest = cpu->gprs[1];
738 uint32_t header = cpu->memory.load32(cpu, source, 0);
739 int remaining = header >> 8;
740 // We assume the signature nybble (0x8) is correct
741 uint16_t halfword = 0;
742 uint16_t old = 0;
743 source += 4;
744 while (remaining > 0) {
745 uint16_t new;
746 if (inwidth == 1) {
747 new = cpu->memory.load8(cpu, source, 0);
748 } else {
749 new = cpu->memory.load16(cpu, source, 0);
750 }
751 new += old;
752 if (outwidth > inwidth) {
753 halfword >>= 8;
754 halfword |= (new << 8);
755 if (source & 1) {
756 cpu->memory.store16(cpu, dest, halfword, 0);
757 dest += outwidth;
758 remaining -= outwidth;
759 }
760 } else if (outwidth == 1) {
761 cpu->memory.store8(cpu, dest, new, 0);
762 dest += outwidth;
763 remaining -= outwidth;
764 } else {
765 cpu->memory.store16(cpu, dest, new, 0);
766 dest += outwidth;
767 remaining -= outwidth;
768 }
769 old = new;
770 source += inwidth;
771 }
772 cpu->gprs[0] = source;
773 cpu->gprs[1] = dest;
774}
775
776static void _unBitPack(struct GBA* gba) {
777 struct ARMCore* cpu = gba->cpu;
778 uint32_t source = cpu->gprs[0];
779 uint32_t dest = cpu->gprs[1];
780 uint32_t info = cpu->gprs[2];
781 unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
782 unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
783 unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
784 switch (sourceWidth) {
785 case 1:
786 case 2:
787 case 4:
788 case 8:
789 break;
790 default:
791 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
792 return;
793 }
794 switch (destWidth) {
795 case 1:
796 case 2:
797 case 4:
798 case 8:
799 case 16:
800 case 32:
801 break;
802 default:
803 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
804 return;
805 }
806 uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
807 uint8_t in = 0;
808 uint32_t out = 0;
809 int bitsRemaining = 0;
810 int bitsEaten = 0;
811 while (sourceLen > 0 || bitsRemaining) {
812 if (!bitsRemaining) {
813 in = cpu->memory.load8(cpu, source, 0);
814 bitsRemaining = 8;
815 ++source;
816 --sourceLen;
817 }
818 unsigned scaled = in & ((1 << sourceWidth) - 1);
819 in >>= sourceWidth;
820 if (scaled || bias & 0x80000000) {
821 scaled += bias & 0x7FFFFFFF;
822 }
823 bitsRemaining -= sourceWidth;
824 out |= scaled << bitsEaten;
825 bitsEaten += destWidth;
826 if (bitsEaten == 32) {
827 cpu->memory.store32(cpu, dest, out, 0);
828 bitsEaten = 0;
829 out = 0;
830 dest += 4;
831 }
832 }
833 cpu->gprs[0] = source;
834 cpu->gprs[1] = dest;
835}