src/arm/decoder.c (view raw)
1/* Copyright (c) 2013-2014 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/arm/decoder.h>
7
8#include <mgba/internal/arm/decoder-inlines.h>
9
10#define ADVANCE(AMOUNT) \
11 if (AMOUNT >= blen) { \
12 buffer[blen - 1] = '\0'; \
13 return total; \
14 } \
15 total += AMOUNT; \
16 buffer += AMOUNT; \
17 blen -= AMOUNT;
18
19static int _decodeRegister(int reg, char* buffer, int blen);
20static int _decodeRegisterList(int list, char* buffer, int blen);
21static int _decodePSR(int bits, char* buffer, int blen);
22static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen);
23static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen);
24static int _decodeShift(union ARMOperand operand, bool reg, char* buffer, int blen);
25
26static const char* _armConditions[] = {
27 "eq",
28 "ne",
29 "cs",
30 "cc",
31 "mi",
32 "pl",
33 "vs",
34 "vc",
35 "hi",
36 "ls",
37 "ge",
38 "lt",
39 "gt",
40 "le",
41 "al",
42 "nv"
43};
44
45static int _decodeRegister(int reg, char* buffer, int blen) {
46 switch (reg) {
47 case ARM_SP:
48 strncpy(buffer, "sp", blen - 1);
49 return 2;
50 case ARM_LR:
51 strncpy(buffer, "lr", blen - 1);
52 return 2;
53 case ARM_PC:
54 strncpy(buffer, "pc", blen - 1);
55 return 2;
56 case ARM_CPSR:
57 strncpy(buffer, "cpsr", blen - 1);
58 return 4;
59 case ARM_SPSR:
60 strncpy(buffer, "spsr", blen - 1);
61 return 4;
62 default:
63 return snprintf(buffer, blen - 1, "r%i", reg);
64 }
65}
66
67static int _decodeRegisterList(int list, char* buffer, int blen) {
68 if (blen <= 0) {
69 return 0;
70 }
71 int total = 0;
72 strncpy(buffer, "{", blen - 1);
73 ADVANCE(1);
74 int i;
75 int start = -1;
76 int end = -1;
77 int written;
78 for (i = 0; i <= ARM_PC; ++i) {
79 if (list & 1) {
80 if (start < 0) {
81 start = i;
82 end = i;
83 } else if (end + 1 == i) {
84 end = i;
85 } else {
86 if (end > start) {
87 written = _decodeRegister(start, buffer, blen);
88 ADVANCE(written);
89 strncpy(buffer, "-", blen - 1);
90 ADVANCE(1);
91 }
92 written = _decodeRegister(end, buffer, blen);
93 ADVANCE(written);
94 strncpy(buffer, ",", blen - 1);
95 ADVANCE(1);
96 start = i;
97 end = i;
98 }
99 }
100 list >>= 1;
101 }
102 if (start >= 0) {
103 if (end > start) {
104 written = _decodeRegister(start, buffer, blen);
105 ADVANCE(written);
106 strncpy(buffer, "-", blen - 1);
107 ADVANCE(1);
108 }
109 written = _decodeRegister(end, buffer, blen);
110 ADVANCE(written);
111 }
112 strncpy(buffer, "}", blen - 1);
113 ADVANCE(1);
114 return total;
115}
116
117static int _decodePSR(int psrBits, char* buffer, int blen) {
118 if (!psrBits) {
119 return 0;
120 }
121 int total = 0;
122 strncpy(buffer, "_", blen - 1);
123 ADVANCE(1);
124 if (psrBits & ARM_PSR_C) {
125 strncpy(buffer, "c", blen - 1);
126 ADVANCE(1);
127 }
128 if (psrBits & ARM_PSR_X) {
129 strncpy(buffer, "x", blen - 1);
130 ADVANCE(1);
131 }
132 if (psrBits & ARM_PSR_S) {
133 strncpy(buffer, "s", blen - 1);
134 ADVANCE(1);
135 }
136 if (psrBits & ARM_PSR_F) {
137 strncpy(buffer, "f", blen - 1);
138 ADVANCE(1);
139 }
140 return total;
141}
142
143static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen) {
144 return snprintf(buffer, blen - 1, "$%08X", address + pc);
145}
146
147static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen) {
148 if (blen <= 1) {
149 return 0;
150 }
151 int total = 0;
152 strncpy(buffer, "[", blen - 1);
153 ADVANCE(1);
154 int written;
155 if (memory.format & ARM_MEMORY_REGISTER_BASE) {
156 if (memory.baseReg == ARM_PC && memory.format & ARM_MEMORY_IMMEDIATE_OFFSET) {
157 written = _decodePCRelative(memory.format & ARM_MEMORY_OFFSET_SUBTRACT ? -memory.offset.immediate : memory.offset.immediate, pc & 0xFFFFFFFC, buffer, blen);
158 ADVANCE(written);
159 } else {
160 written = _decodeRegister(memory.baseReg, buffer, blen);
161 ADVANCE(written);
162 if (memory.format & (ARM_MEMORY_REGISTER_OFFSET | ARM_MEMORY_IMMEDIATE_OFFSET) && !(memory.format & ARM_MEMORY_POST_INCREMENT)) {
163 strncpy(buffer, ", ", blen - 1);
164 ADVANCE(2);
165 }
166 }
167 }
168 if (memory.format & ARM_MEMORY_POST_INCREMENT) {
169 strncpy(buffer, "], ", blen - 1);
170 ADVANCE(3);
171 }
172 if (memory.format & ARM_MEMORY_IMMEDIATE_OFFSET && memory.baseReg != ARM_PC) {
173 if (memory.format & ARM_MEMORY_OFFSET_SUBTRACT) {
174 written = snprintf(buffer, blen - 1, "#-%i", memory.offset.immediate);
175 ADVANCE(written);
176 } else {
177 written = snprintf(buffer, blen - 1, "#%i", memory.offset.immediate);
178 ADVANCE(written);
179 }
180 } else if (memory.format & ARM_MEMORY_REGISTER_OFFSET) {
181 if (memory.format & ARM_MEMORY_OFFSET_SUBTRACT) {
182 strncpy(buffer, "-", blen - 1);
183 ADVANCE(1);
184 }
185 written = _decodeRegister(memory.offset.reg, buffer, blen);
186 ADVANCE(written);
187 }
188 if (memory.format & ARM_MEMORY_SHIFTED_OFFSET) {
189 written = _decodeShift(memory.offset, false, buffer, blen);
190 ADVANCE(written);
191 }
192
193 if (!(memory.format & ARM_MEMORY_POST_INCREMENT)) {
194 strncpy(buffer, "]", blen - 1);
195 ADVANCE(1);
196 }
197 if ((memory.format & (ARM_MEMORY_PRE_INCREMENT | ARM_MEMORY_WRITEBACK)) == (ARM_MEMORY_PRE_INCREMENT | ARM_MEMORY_WRITEBACK)) {
198 strncpy(buffer, "!", blen - 1);
199 ADVANCE(1);
200 }
201 return total;
202}
203
204static int _decodeShift(union ARMOperand op, bool reg, char* buffer, int blen) {
205 if (blen <= 1) {
206 return 0;
207 }
208 int total = 0;
209 strncpy(buffer, ", ", blen - 1);
210 ADVANCE(2);
211 int written;
212 switch (op.shifterOp) {
213 case ARM_SHIFT_LSL:
214 strncpy(buffer, "lsl ", blen - 1);
215 ADVANCE(4);
216 break;
217 case ARM_SHIFT_LSR:
218 strncpy(buffer, "lsr ", blen - 1);
219 ADVANCE(4);
220 break;
221 case ARM_SHIFT_ASR:
222 strncpy(buffer, "asr ", blen - 1);
223 ADVANCE(4);
224 break;
225 case ARM_SHIFT_ROR:
226 strncpy(buffer, "ror ", blen - 1);
227 ADVANCE(4);
228 break;
229 case ARM_SHIFT_RRX:
230 strncpy(buffer, "rrx", blen - 1);
231 ADVANCE(3);
232 return total;
233 }
234 if (!reg) {
235 written = snprintf(buffer, blen - 1, "#%i", op.shifterImm);
236 } else {
237 written = _decodeRegister(op.shifterReg, buffer, blen);
238 }
239 ADVANCE(written);
240 return total;
241}
242
243static const char* _armMnemonicStrings[] = {
244 "ill",
245 "adc",
246 "add",
247 "and",
248 "asr",
249 "b",
250 "bic",
251 "bkpt",
252 "bl",
253 "bx",
254 "cmn",
255 "cmp",
256 "eor",
257 "ldm",
258 "ldr",
259 "lsl",
260 "lsr",
261 "mla",
262 "mov",
263 "mrs",
264 "msr",
265 "mul",
266 "mvn",
267 "neg",
268 "orr",
269 "ror",
270 "rsb",
271 "rsc",
272 "sbc",
273 "smlal",
274 "smull",
275 "stm",
276 "str",
277 "sub",
278 "swi",
279 "swp",
280 "teq",
281 "tst",
282 "umlal",
283 "umull",
284
285 "ill"
286};
287
288static const char* _armDirectionStrings[] = {
289 "da",
290 "ia",
291 "db",
292 "ib"
293};
294
295static const char* _armAccessTypeStrings[] = {
296 "",
297 "b",
298 "h",
299 "",
300 "",
301 "",
302 "",
303 "",
304
305 "",
306 "sb",
307 "sh",
308 "",
309 "",
310 "",
311 "",
312 "",
313
314 "",
315 "bt",
316 "",
317 "",
318 "t",
319 "",
320 "",
321 ""
322};
323
324int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, int blen) {
325 const char* mnemonic = _armMnemonicStrings[info->mnemonic];
326 int written;
327 int total = 0;
328 const char* cond = "";
329 if (info->condition != ARM_CONDITION_AL && info->condition < ARM_CONDITION_NV) {
330 cond = _armConditions[info->condition];
331 }
332 const char* flags = "";
333 switch (info->mnemonic) {
334 case ARM_MN_LDM:
335 case ARM_MN_STM:
336 flags = _armDirectionStrings[MEMORY_FORMAT_TO_DIRECTION(info->memory.format)];
337 break;
338 case ARM_MN_LDR:
339 case ARM_MN_STR:
340 case ARM_MN_SWP:
341 flags = _armAccessTypeStrings[info->memory.width];
342 break;
343 case ARM_MN_ADD:
344 case ARM_MN_ADC:
345 case ARM_MN_AND:
346 case ARM_MN_ASR:
347 case ARM_MN_BIC:
348 case ARM_MN_EOR:
349 case ARM_MN_LSL:
350 case ARM_MN_LSR:
351 case ARM_MN_MLA:
352 case ARM_MN_MOV:
353 case ARM_MN_MUL:
354 case ARM_MN_MVN:
355 case ARM_MN_ORR:
356 case ARM_MN_ROR:
357 case ARM_MN_RSB:
358 case ARM_MN_RSC:
359 case ARM_MN_SBC:
360 case ARM_MN_SMLAL:
361 case ARM_MN_SMULL:
362 case ARM_MN_SUB:
363 case ARM_MN_UMLAL:
364 case ARM_MN_UMULL:
365 if (info->affectsCPSR && info->execMode == MODE_ARM) {
366 flags = "s";
367 }
368 break;
369 default:
370 break;
371 }
372 written = snprintf(buffer, blen - 1, "%s%s%s ", mnemonic, cond, flags);
373 ADVANCE(written);
374
375 switch (info->mnemonic) {
376 case ARM_MN_LDM:
377 case ARM_MN_STM:
378 written = _decodeRegister(info->memory.baseReg, buffer, blen);
379 ADVANCE(written);
380 if (info->memory.format & ARM_MEMORY_WRITEBACK) {
381 strncpy(buffer, "!", blen - 1);
382 ADVANCE(1);
383 }
384 strncpy(buffer, ", ", blen - 1);
385 ADVANCE(2);
386 written = _decodeRegisterList(info->op1.immediate, buffer, blen);
387 ADVANCE(written);
388 if (info->memory.format & ARM_MEMORY_SPSR_SWAP) {
389 strncpy(buffer, "^", blen - 1);
390 ADVANCE(1);
391 }
392 break;
393 case ARM_MN_B:
394 case ARM_MN_BL:
395 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_1) {
396 written = _decodePCRelative(info->op1.immediate, pc, buffer, blen);
397 ADVANCE(written);
398 }
399 break;
400 default:
401 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_1) {
402 written = snprintf(buffer, blen - 1, "#%i", info->op1.immediate);
403 ADVANCE(written);
404 } else if (info->operandFormat & ARM_OPERAND_MEMORY_1) {
405 written = _decodeMemory(info->memory, pc, buffer, blen);
406 ADVANCE(written);
407 } else if (info->operandFormat & ARM_OPERAND_REGISTER_1) {
408 written = _decodeRegister(info->op1.reg, buffer, blen);
409 ADVANCE(written);
410 if (info->op1.reg > ARM_PC) {
411 written = _decodePSR(info->op1.psrBits, buffer, blen);
412 ADVANCE(written);
413 }
414 }
415 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_1) {
416 written = _decodeShift(info->op1, true, buffer, blen);
417 ADVANCE(written);
418 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_1) {
419 written = _decodeShift(info->op1, false, buffer, blen);
420 ADVANCE(written);
421 }
422 if (info->operandFormat & ARM_OPERAND_2) {
423 strncpy(buffer, ", ", blen);
424 ADVANCE(2);
425 }
426 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_2) {
427 written = snprintf(buffer, blen - 1, "#%i", info->op2.immediate);
428 ADVANCE(written);
429 } else if (info->operandFormat & ARM_OPERAND_MEMORY_2) {
430 written = _decodeMemory(info->memory, pc, buffer, blen);
431 ADVANCE(written);
432 } else if (info->operandFormat & ARM_OPERAND_REGISTER_2) {
433 written = _decodeRegister(info->op2.reg, buffer, blen);
434 ADVANCE(written);
435 }
436 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_2) {
437 written = _decodeShift(info->op2, true, buffer, blen);
438 ADVANCE(written);
439 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_2) {
440 written = _decodeShift(info->op2, false, buffer, blen);
441 ADVANCE(written);
442 }
443 if (info->operandFormat & ARM_OPERAND_3) {
444 strncpy(buffer, ", ", blen - 1);
445 ADVANCE(2);
446 }
447 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_3) {
448 written = snprintf(buffer, blen - 1, "#%i", info->op3.immediate);
449 ADVANCE(written);
450 } else if (info->operandFormat & ARM_OPERAND_MEMORY_3) {
451 written = _decodeMemory(info->memory, pc, buffer, blen);
452 ADVANCE(written);
453 } else if (info->operandFormat & ARM_OPERAND_REGISTER_3) {
454 written = _decodeRegister(info->op3.reg, buffer, blen);
455 ADVANCE(written);
456 }
457 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_3) {
458 written = _decodeShift(info->op3, true, buffer, blen);
459 ADVANCE(written);
460 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_3) {
461 written = _decodeShift(info->op3, false, buffer, blen);
462 ADVANCE(written);
463 }
464 if (info->operandFormat & ARM_OPERAND_4) {
465 strncpy(buffer, ", ", blen - 1);
466 ADVANCE(2);
467 }
468 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_4) {
469 written = snprintf(buffer, blen - 1, "#%i", info->op4.immediate);
470 ADVANCE(written);
471 } else if (info->operandFormat & ARM_OPERAND_MEMORY_4) {
472 written = _decodeMemory(info->memory, pc, buffer, blen);
473 ADVANCE(written);
474 } else if (info->operandFormat & ARM_OPERAND_REGISTER_4) {
475 written = _decodeRegister(info->op4.reg, buffer, blen);
476 ADVANCE(written);
477 }
478 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_4) {
479 written = _decodeShift(info->op4, true, buffer, blen);
480 ADVANCE(written);
481 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_4) {
482 written = _decodeShift(info->op4, false, buffer, blen);
483 ADVANCE(written);
484 }
485 break;
486 }
487 buffer[blen - 1] = '\0';
488 return total;
489}