1#ifndef ARM_H
 2#define ARM_H
 3
 4#include <stdint.h>
 5
 6enum {
 7	ARM_SP = 13,
 8	ARM_LR = 14,
 9	ARM_PC = 15
10};
11
12enum ExecutionMode {
13	MODE_ARM = 0,
14	MODE_THUMB = 1
15};
16
17enum PrivilegeMode {
18	MODE_USER = 0x10,
19	MODE_FIQ = 0x11,
20	MODE_IRQ = 0x12,
21	MODE_SUPERVISOR = 0x13,
22	MODE_ABORT = 0x17,
23	MODE_UNDEFINED = 0x1B,
24	MODE_SYSTEM = 0x1F
25};
26
27enum WordSize {
28	WORD_SIZE_ARM = 4,
29	WORD_SIZE_THUMB = 2
30};
31
32enum ExecutionVector {
33	BASE_RESET = 0x00000000,
34	BASE_UNDEF = 0x00000004,
35	BASE_SWI = 0x00000008,
36	BASE_PABT = 0x0000000C,
37	BASE_DABT = 0x00000010,
38	BASE_IRQ = 0x00000018,
39	BASE_FIQ = 0x0000001C
40};
41
42struct ARMCore;
43typedef void (*ARMInstruction)(struct ARMCore*, uint32_t opcode);
44
45union PSR {
46	struct {
47		enum PrivilegeMode priv : 5;
48		int t : 1;
49		int f : 1;
50		int i : 1;
51		int : 20;
52		int v : 1;
53		int c : 1;
54		int z : 1;
55		int n : 1;
56	};
57
58	int32_t packed;
59};
60
61struct ARMMemory {
62	int32_t (*load32)(struct ARMMemory*, uint32_t address);
63	int16_t (*load16)(struct ARMMemory*, uint32_t address);
64	uint16_t (*loadU16)(struct ARMMemory*, uint32_t address);
65	int8_t (*load8)(struct ARMMemory*, uint32_t address);
66	uint8_t (*loadU8)(struct ARMMemory*, uint32_t address);
67};
68
69struct ARMBoard;
70
71struct ARMCore {
72	int32_t gprs[16];
73	union PSR cpsr;
74	union PSR spsr;
75
76	int32_t cyclesToEvent;
77
78	int32_t shifterOperand;
79	int32_t shifterCarryOut;
80
81	int instructionWidth;
82
83	ARMInstruction (*loadInstruction)(struct ARMMemory*, uint32_t address, uint32_t* opcodeOut);
84	enum ExecutionMode executionMode;
85
86	struct ARMMemory* memory;
87	struct ARMBoard* board;
88};
89
90void ARMInit(struct ARMCore* cpu);
91void ARMAssociateMemory(struct ARMCore* cpu, struct ARMMemory* memory);
92
93inline void ARMCycle(struct ARMCore* cpu);
94
95#endif