src/gba/gba-memory.h (view raw)
1#ifndef GBA_MEMORY_H
2#define GBA_MEMORY_H
3
4#include "util/common.h"
5
6#include "arm.h"
7#include "macros.h"
8
9#include "gba-gpio.h"
10#include "gba-savedata.h"
11
12enum GBAMemoryRegion {
13 REGION_BIOS = 0x0,
14 REGION_WORKING_RAM = 0x2,
15 REGION_WORKING_IRAM = 0x3,
16 REGION_IO = 0x4,
17 REGION_PALETTE_RAM = 0x5,
18 REGION_VRAM = 0x6,
19 REGION_OAM = 0x7,
20 REGION_CART0 = 0x8,
21 REGION_CART0_EX = 0x9,
22 REGION_CART1 = 0xA,
23 REGION_CART1_EX = 0xB,
24 REGION_CART2 = 0xC,
25 REGION_CART2_EX = 0xD,
26 REGION_CART_SRAM = 0xE,
27 REGION_CART_SRAM_MIRROR = 0xF
28};
29
30enum GBAMemoryBase {
31 BASE_BIOS = 0x00000000,
32 BASE_WORKING_RAM = 0x02000000,
33 BASE_WORKING_IRAM = 0x03000000,
34 BASE_IO = 0x04000000,
35 BASE_PALETTE_RAM = 0x05000000,
36 BASE_VRAM = 0x06000000,
37 BASE_OAM = 0x07000000,
38 BASE_CART0 = 0x08000000,
39 BASE_CART0_EX = 0x09000000,
40 BASE_CART1 = 0x0A000000,
41 BASE_CART1_EX = 0x0B000000,
42 BASE_CART2 = 0x0C000000,
43 BASE_CART2_EX = 0x0D000000,
44 BASE_CART_SRAM = 0x0E000000,
45 BASE_CART_SRAM_MIRROR = 0x0F000000
46};
47
48enum {
49 SIZE_BIOS = 0x00004000,
50 SIZE_WORKING_RAM = 0x00040000,
51 SIZE_WORKING_IRAM = 0x00008000,
52 SIZE_IO = 0x00000400,
53 SIZE_PALETTE_RAM = 0x00000400,
54 SIZE_VRAM = 0x00018000,
55 SIZE_OAM = 0x00000400,
56 SIZE_CART0 = 0x02000000,
57 SIZE_CART1 = 0x02000000,
58 SIZE_CART2 = 0x02000000,
59 SIZE_CART_SRAM = 0x00008000,
60 SIZE_CART_FLASH512 = 0x00010000,
61 SIZE_CART_FLASH1M = 0x00020000,
62 SIZE_CART_EEPROM = 0x00002000
63};
64
65enum {
66 OFFSET_MASK = 0x00FFFFFF,
67 BASE_OFFSET = 24
68};
69
70enum DMAControl {
71 DMA_INCREMENT = 0,
72 DMA_DECREMENT = 1,
73 DMA_FIXED = 2,
74 DMA_INCREMENT_RELOAD = 3
75};
76
77enum DMATiming {
78 DMA_TIMING_NOW = 0,
79 DMA_TIMING_VBLANK = 1,
80 DMA_TIMING_HBLANK = 2,
81 DMA_TIMING_CUSTOM = 3
82};
83
84
85DECL_BITFIELD(GBADMARegister, uint16_t);
86DECL_BITS(GBADMARegister, DestControl, 5, 2);
87DECL_BITS(GBADMARegister, SrcControl, 7, 2);
88DECL_BIT(GBADMARegister, Repeat, 9);
89DECL_BIT(GBADMARegister, Width, 10);
90DECL_BIT(GBADMARegister, DRQ, 11);
91DECL_BITS(GBADMARegister, Timing, 12, 2);
92DECL_BIT(GBADMARegister, DoIRQ, 14);
93DECL_BIT(GBADMARegister, Enable, 15);
94
95struct GBADMA {
96 GBADMARegister reg;
97
98 uint32_t source;
99 uint32_t dest;
100 int32_t count;
101 uint32_t nextSource;
102 uint32_t nextDest;
103 int32_t nextCount;
104 int32_t nextEvent;
105};
106
107struct GBAMemory {
108 uint32_t* bios;
109 uint32_t* wram;
110 uint32_t* iwram;
111 uint32_t* rom;
112 uint16_t io[SIZE_IO >> 1];
113
114 struct GBACartridgeGPIO gpio;
115 struct GBASavedata savedata;
116 size_t romSize;
117 uint16_t romID;
118 int fullBios;
119
120 char waitstatesSeq32[256];
121 char waitstatesSeq16[256];
122 char waitstatesNonseq32[256];
123 char waitstatesNonseq16[256];
124 char waitstatesPrefetchSeq32[16];
125 char waitstatesPrefetchSeq16[16];
126 char waitstatesPrefetchNonseq32[16];
127 char waitstatesPrefetchNonseq16[16];
128 int activeRegion;
129 uint32_t biosPrefetch;
130
131 struct GBADMA dma[4];
132 int activeDMA;
133 int32_t nextDMA;
134 int32_t eventDiff;
135};
136
137void GBAMemoryInit(struct GBA* gba);
138void GBAMemoryDeinit(struct GBA* gba);
139
140void GBAMemoryReset(struct GBA* gba);
141
142int32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
143int16_t GBALoad16(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
144uint16_t GBALoadU16(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
145int8_t GBALoad8(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
146uint8_t GBALoadU8(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
147
148void GBAStore32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycleCounter);
149void GBAStore16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycleCounter);
150void GBAStore8(struct ARMCore* cpu, uint32_t address, int8_t value, int* cycleCounter);
151
152void GBAAdjustWaitstates(struct GBA* gba, uint16_t parameters);
153
154void GBAMemoryWriteDMASAD(struct GBA* gba, int dma, uint32_t address);
155void GBAMemoryWriteDMADAD(struct GBA* gba, int dma, uint32_t address);
156void GBAMemoryWriteDMACNT_LO(struct GBA* gba, int dma, uint16_t count);
157uint16_t GBAMemoryWriteDMACNT_HI(struct GBA* gba, int dma, uint16_t control);
158
159void GBAMemoryScheduleDMA(struct GBA* gba, int number, struct GBADMA* info);
160void GBAMemoryRunHblankDMAs(struct GBA* gba, int32_t cycles);
161void GBAMemoryRunVblankDMAs(struct GBA* gba, int32_t cycles);
162void GBAMemoryUpdateDMAs(struct GBA* gba, int32_t cycles);
163int32_t GBAMemoryRunDMAs(struct GBA* gba, int32_t cycles);
164
165struct GBASerializedState;
166void GBAMemorySerialize(struct GBAMemory* memory, struct GBASerializedState* state);
167void GBAMemoryDeserialize(struct GBAMemory* memory, struct GBASerializedState* state);
168
169#endif