1/* Copyright (c) 2013-2017 Jeffrey Pfau
 2 *
 3 * This Source Code Form is subject to the terms of the Mozilla Public
 4 * License, v. 2.0. If a copy of the MPL was not distributed with this
 5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 6#include <mgba/internal/ds/ipc.h>
 7
 8#include <mgba/internal/ds/ds.h>
 9#include <mgba/internal/ds/io.h>
10
11mLOG_DEFINE_CATEGORY(DS_IPC, "DS IPC", "ds.ipc");
12
13void DSIPCWriteSYNC(struct ARMCore* remoteCpu, uint16_t* remoteIo, int16_t value) {
14	remoteIo[DS_REG_IPCSYNC >> 1] &= 0xFFF0;
15	remoteIo[DS_REG_IPCSYNC >> 1] |= (value >> 8) & 0x0F;
16	if (value & 0x2000 && remoteIo[DS_REG_IPCSYNC >> 1] & 0x4000) {
17		mLOG(DS_IPC, STUB, "Unimplemented IRQ");
18		UNUSED(remoteCpu);
19	}
20}
21
22int16_t DSIPCWriteFIFOCNT(struct DSCommon* dscore, int16_t value) {
23	value &= 0xC40C;
24	int16_t oldValue = dscore->memory.io[DS_REG_IPCFIFOCNT >> 1] & 0x4303;
25	int16_t newValue = value | oldValue;
26	// TODO: Does Enable set enabled on both ends?
27	if (DSIPCFIFOCNTIsError(value)) {
28		newValue = DSIPCFIFOCNTClearError(newValue);
29	}
30	if (DSIPCFIFOCNTIsSendClear(newValue)) {
31		CircleBufferClear(&dscore->ipc->fifo);
32		dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTFillRecvEmpty(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1]);
33		newValue = DSIPCFIFOCNTFillSendEmpty(newValue);
34		newValue = DSIPCFIFOCNTClearSendClear(newValue);
35	}
36	return newValue;
37}
38
39void DSIPCWriteFIFO(struct DSCommon* dscore, int32_t value) {
40	if (!DSIPCFIFOCNTIsEnable(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1])) {
41		return;
42	}
43	mLOG(DS_IPC, DEBUG, "Written from ARM%c: %08X", (dscore == &dscore->p->ds7) ? '7' : '9', value);
44	CircleBufferWrite32(&dscore->ipc->fifo, value);
45	size_t fullness = CircleBufferSize(&dscore->ipc->fifo);
46	if (fullness == 4) {
47		dscore->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTClearSendEmpty(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1]);
48		dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTClearRecvEmpty(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1]);
49		if (DSIPCFIFOCNTIsRecvIRQ(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1])) {
50			// TODO: Adaptive time slicing?
51			DSRaiseIRQ(dscore->ipc->cpu, dscore->ipc->memory.io, DS_IRQ_IPC_NOT_EMPTY);
52		}
53	} else if (fullness == 64) {
54		dscore->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTFillSendFull(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1]);
55		dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTFillRecvFull(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1]);
56	}
57}
58
59int32_t DSIPCReadFIFO(struct DSCommon* dscore) {
60	if (!DSIPCFIFOCNTIsEnable(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1])) {
61		return 0;
62	}
63	int32_t value = ((int32_t*) dscore->ipc->memory.io)[DS_REG_IPCFIFOSEND_LO >> 2]; // TODO: actual last value
64	CircleBufferRead32(&dscore->fifo, &value);
65	mLOG(DS_IPC, DEBUG, "Read from ARM%c: %08X", (dscore == &dscore->p->ds7) ? '7' : '9', value);
66	size_t fullness = CircleBufferSize(&dscore->fifo);
67	dscore->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTClearRecvFull(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1]);
68	dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTClearSendFull(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1]);
69	if (fullness == 0) {
70		dscore->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTFillRecvEmpty(dscore->memory.io[DS_REG_IPCFIFOCNT >> 1]);
71		dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1] = DSIPCFIFOCNTFillSendEmpty(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1]);
72		if (DSIPCFIFOCNTIsSendIRQ(dscore->ipc->memory.io[DS_REG_IPCFIFOCNT >> 1])) {
73			// TODO: Adaptive time slicing?
74			DSRaiseIRQ(dscore->ipc->cpu, dscore->ipc->memory.io, DS_IRQ_IPC_NOT_EMPTY);
75		}
76	}
77	return value;
78}