1#ifndef ISA_INLINES_H
 2#define ISA_INLINES_H
 3
 4#define ARM_COND_EQ (cpu->cpsr.z)
 5#define ARM_COND_NE (!cpu->cpsr.z)
 6#define ARM_COND_CS (cpu->cpsr.c)
 7#define ARM_COND_CC (!cpu->cpsr.c)
 8#define ARM_COND_MI (cpu->cpsr.n)
 9#define ARM_COND_PL (!cpu->cpsr.n)
10#define ARM_COND_VS (cpu->cpsr.v)
11#define ARM_COND_VC (!cpu->cpsr.v)
12#define ARM_COND_HI (cpu->cpsr.c && !cpu->cpsr.z)
13#define ARM_COND_LS (!cpu->cpsr.c || cpu->cpsr.z)
14#define ARM_COND_GE (!cpu->cpsr.n == !cpu->cpsr.v)
15#define ARM_COND_LT (!cpu->cpsr.n != !cpu->cpsr.v)
16#define ARM_COND_GT (!cpu->cpsr.z && !cpu->cpsr.n == !cpu->cpsr.v)
17#define ARM_COND_LE (cpu->cpsr.z || !cpu->cpsr.n != !cpu->cpsr.v)
18#define ARM_COND_AL 1
19
20#define ARM_SIGN(I) ((I) >> 31)
21#define ARM_ROR(I, ROTATE) (((I) >> ROTATE) | (I << (32 - ROTATE)))
22
23#define ARM_CARRY_FROM(M, N, D) ((ARM_SIGN((M) | (N))) && !(ARM_SIGN(D)))
24#define ARM_BORROW_FROM(M, N, D) (((uint32_t) (M)) >= ((uint32_t) (N)))
25#define ARM_V_ADDITION(M, N, D) (!(ARM_SIGN((M) ^ (N))) && (ARM_SIGN((M) ^ (D))) && (ARM_SIGN((N) ^ (D))))
26#define ARM_V_SUBTRACTION(M, N, D) ((ARM_SIGN((M) ^ (N))) && (ARM_SIGN((M) ^ (D))))
27
28static inline int _ARMModeHasSPSR(enum PrivilegeMode mode) {
29	return mode != MODE_SYSTEM && mode != MODE_USER;
30}
31
32static inline void _ARMSetMode(struct ARMCore* cpu, enum ExecutionMode executionMode) {
33	if (executionMode == cpu->executionMode) {
34		return;
35	}
36
37	cpu->executionMode = executionMode;
38	switch (executionMode) {
39	case MODE_ARM:
40		cpu->cpsr.t = 0;
41		break;
42	case MODE_THUMB:
43		cpu->cpsr.t = 1;
44	}
45}
46
47static inline void _ARMReadCPSR(struct ARMCore* cpu) {
48	_ARMSetMode(cpu, cpu->cpsr.t);
49	ARMSetPrivilegeMode(cpu, cpu->cpsr.priv);
50}
51
52#endif