src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include "bios.h"
7
8#include "gba/gba.h"
9#include "gba/io.h"
10#include "gba/memory.h"
11#include "isa-inlines.h"
12
13const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
14const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
15
16mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS");
17
18static void _unLz77(struct GBA* gba, int width);
19static void _unHuffman(struct GBA* gba);
20static void _unRl(struct GBA* gba, int width);
21static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
22
23static void _SoftReset(struct GBA* gba) {
24 struct ARMCore* cpu = gba->cpu;
25 ARMSetPrivilegeMode(cpu, MODE_IRQ);
26 cpu->spsr.packed = 0;
27 cpu->gprs[ARM_LR] = 0;
28 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
29 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
30 cpu->spsr.packed = 0;
31 cpu->gprs[ARM_LR] = 0;
32 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
33 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
34 cpu->gprs[ARM_LR] = 0;
35 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
36 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
37 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
38 if (flag) {
39 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
40 } else {
41 cpu->gprs[ARM_PC] = BASE_CART0;
42 }
43 _ARMSetMode(cpu, MODE_ARM);
44 int currentCycles = 0;
45 ARM_WRITE_PC;
46}
47
48static void _RegisterRamReset(struct GBA* gba) {
49 uint32_t registers = gba->cpu->gprs[0];
50 struct ARMCore* cpu = gba->cpu;
51 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
52 if (registers & 0x01) {
53 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
54 }
55 if (registers & 0x02) {
56 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
57 }
58 if (registers & 0x04) {
59 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
60 }
61 if (registers & 0x08) {
62 memset(gba->video.renderer->vram, 0, SIZE_VRAM);
63 }
64 if (registers & 0x10) {
65 memset(gba->video.oam.raw, 0, SIZE_OAM);
66 }
67 if (registers & 0x20) {
68 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
69 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
70 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
71 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
72 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV, 0, 0);
73 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS, 0, 0);
74 }
75 if (registers & 0x40) {
76 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
77 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
78 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
79 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
80 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
81 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
82 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
86 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
87 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
88 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
89 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
90 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
91 }
92 if (registers & 0x80) {
93 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
94 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
104 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
105 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
106 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
107 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
108 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
111 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
112 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
113 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
114 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
117 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
118 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
119 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
122 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
125 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
126 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
128 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
131 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
132 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
165 }
166}
167
168static void _BgAffineSet(struct GBA* gba) {
169 struct ARMCore* cpu = gba->cpu;
170 int i = cpu->gprs[2];
171 float ox, oy;
172 float cx, cy;
173 float sx, sy;
174 float theta;
175 int offset = cpu->gprs[0];
176 int destination = cpu->gprs[1];
177 float a, b, c, d;
178 float rx, ry;
179 while (i--) {
180 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
181 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
182 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
183 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
184 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
185 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
186 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
187 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
188 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
189 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
190 offset += 20;
191 // Rotation
192 a = d = cosf(theta);
193 b = c = sinf(theta);
194 // Scale
195 a *= sx;
196 b *= -sx;
197 c *= sy;
198 d *= sy;
199 // Translate
200 rx = ox - (a * cx + b * cy);
201 ry = oy - (c * cx + d * cy);
202 cpu->memory.store16(cpu, destination, a * 256, 0);
203 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
204 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
205 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
206 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
207 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
208 destination += 16;
209 }
210}
211
212static void _ObjAffineSet(struct GBA* gba) {
213 struct ARMCore* cpu = gba->cpu;
214 int i = cpu->gprs[2];
215 float sx, sy;
216 float theta;
217 int offset = cpu->gprs[0];
218 int destination = cpu->gprs[1];
219 int diff = cpu->gprs[3];
220 float a, b, c, d;
221 while (i--) {
222 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
223 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
224 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
225 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
226 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
227 offset += 8;
228 // Rotation
229 a = d = cosf(theta);
230 b = c = sinf(theta);
231 // Scale
232 a *= sx;
233 b *= -sx;
234 c *= sy;
235 d *= sy;
236 cpu->memory.store16(cpu, destination, a * 256, 0);
237 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
238 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
239 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
240 destination += diff * 4;
241 }
242}
243
244static void _MidiKey2Freq(struct GBA* gba) {
245 struct ARMCore* cpu = gba->cpu;
246 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
247 cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
248}
249
250static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
251 struct ARMCore* cpu = gba->cpu;
252 if (denom != 0) {
253 div_t result = div(num, denom);
254 cpu->gprs[0] = result.quot;
255 cpu->gprs[1] = result.rem;
256 cpu->gprs[3] = abs(result.quot);
257 } else {
258 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
259 // If abs(num) > 1, this should hang, but that would be painful to
260 // emulate in HLE, and no game will get into a state where it hangs...
261 cpu->gprs[0] = (num < 0) ? -1 : 1;
262 cpu->gprs[1] = num;
263 cpu->gprs[3] = 1;
264 }
265}
266
267void GBASwi16(struct ARMCore* cpu, int immediate) {
268 struct GBA* gba = (struct GBA*) cpu->master;
269 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
270 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
271
272 if (gba->memory.fullBios) {
273 ARMRaiseSWI(cpu);
274 return;
275 }
276 switch (immediate) {
277 case 0x0:
278 _SoftReset(gba);
279 break;
280 case 0x1:
281 _RegisterRamReset(gba);
282 break;
283 case 0x2:
284 GBAHalt(gba);
285 break;
286 case 0x3:
287 GBAStop(gba);
288 break;
289 case 0x05:
290 // VBlankIntrWait
291 // Fall through:
292 case 0x04:
293 // IntrWait
294 ARMRaiseSWI(cpu);
295 break;
296 case 0x6:
297 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
298 break;
299 case 0x7:
300 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
301 break;
302 case 0x8:
303 cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
304 break;
305 case 0xA:
306 cpu->gprs[0] = atan2f(cpu->gprs[1] / 16384.f, cpu->gprs[0] / 16384.f) / (2 * M_PI) * 0x10000;
307 break;
308 case 0xB:
309 case 0xC:
310 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
311 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
312 return;
313 }
314 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
315 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
316 }
317 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
318 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
319 }
320 ARMRaiseSWI(cpu);
321 break;
322 case 0xD:
323 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
324 cpu->gprs[1] = 1;
325 cpu->gprs[3] = SIZE_BIOS;
326 break;
327 case 0xE:
328 _BgAffineSet(gba);
329 break;
330 case 0xF:
331 _ObjAffineSet(gba);
332 break;
333 case 0x11:
334 case 0x12:
335 if (cpu->gprs[0] < BASE_WORKING_RAM) {
336 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
337 break;
338 }
339 switch (cpu->gprs[1] >> BASE_OFFSET) {
340 default:
341 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
342 // Fall through
343 case REGION_WORKING_RAM:
344 case REGION_WORKING_IRAM:
345 case REGION_VRAM:
346 _unLz77(gba, immediate == 0x11 ? 1 : 2);
347 break;
348 }
349 break;
350 case 0x13:
351 if (cpu->gprs[0] < BASE_WORKING_RAM) {
352 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
353 break;
354 }
355 switch (cpu->gprs[1] >> BASE_OFFSET) {
356 default:
357 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
358 // Fall through
359 case REGION_WORKING_RAM:
360 case REGION_WORKING_IRAM:
361 case REGION_VRAM:
362 _unHuffman(gba);
363 break;
364 }
365 break;
366 case 0x14:
367 case 0x15:
368 if (cpu->gprs[0] < BASE_WORKING_RAM) {
369 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
370 break;
371 }
372 switch (cpu->gprs[1] >> BASE_OFFSET) {
373 default:
374 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
375 // Fall through
376 case REGION_WORKING_RAM:
377 case REGION_WORKING_IRAM:
378 case REGION_VRAM:
379 _unRl(gba, immediate == 0x14 ? 1 : 2);
380 break;
381 }
382 break;
383 case 0x16:
384 case 0x17:
385 case 0x18:
386 if (cpu->gprs[0] < BASE_WORKING_RAM) {
387 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
388 break;
389 }
390 switch (cpu->gprs[1] >> BASE_OFFSET) {
391 default:
392 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
393 // Fall through
394 case REGION_WORKING_RAM:
395 case REGION_WORKING_IRAM:
396 case REGION_VRAM:
397 _unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
398 break;
399 }
400 break;
401 case 0x19:
402 // SoundBias is mostly meaningless here
403 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
404 break;
405 case 0x1F:
406 _MidiKey2Freq(gba);
407 break;
408 default:
409 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
410 }
411 gba->memory.biosPrefetch = 0xE3A02004;
412}
413
414void GBASwi32(struct ARMCore* cpu, int immediate) {
415 GBASwi16(cpu, immediate >> 16);
416}
417
418uint32_t GBAChecksum(uint32_t* memory, size_t size) {
419 size_t i;
420 uint32_t sum = 0;
421 for (i = 0; i < size; i += 4) {
422 sum += memory[i >> 2];
423 }
424 return sum;
425}
426
427static void _unLz77(struct GBA* gba, int width) {
428 struct ARMCore* cpu = gba->cpu;
429 uint32_t source = cpu->gprs[0];
430 uint32_t dest = cpu->gprs[1];
431 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
432 // We assume the signature byte (0x10) is correct
433 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
434 source += 4;
435 int blocksRemaining = 0;
436 uint32_t disp;
437 int bytes;
438 int byte;
439 int halfword = 0;
440 while (remaining > 0) {
441 if (blocksRemaining) {
442 if (blockheader & 0x80) {
443 // Compressed
444 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
445 source += 2;
446 disp = dest - (block & 0x0FFF) - 1;
447 bytes = (block >> 12) + 3;
448 while (bytes-- && remaining) {
449 --remaining;
450 if (width == 2) {
451 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
452 if (dest & 1) {
453 byte >>= (disp & 1) * 8;
454 halfword |= byte << 8;
455 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
456 } else {
457 byte >>= (disp & 1) * 8;
458 halfword = byte & 0xFF;
459 }
460 } else {
461 byte = cpu->memory.load8(cpu, disp, 0);
462 cpu->memory.store8(cpu, dest, byte, 0);
463 }
464 ++disp;
465 ++dest;
466 }
467 } else {
468 // Uncompressed
469 byte = cpu->memory.load8(cpu, source, 0);
470 ++source;
471 if (width == 2) {
472 if (dest & 1) {
473 halfword |= byte << 8;
474 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
475 } else {
476 halfword = byte;
477 }
478 } else {
479 cpu->memory.store8(cpu, dest, byte, 0);
480 }
481 ++dest;
482 --remaining;
483 }
484 blockheader <<= 1;
485 --blocksRemaining;
486 } else {
487 blockheader = cpu->memory.load8(cpu, source, 0);
488 ++source;
489 blocksRemaining = 8;
490 }
491 }
492 cpu->gprs[0] = source;
493 cpu->gprs[1] = dest;
494 cpu->gprs[3] = 0;
495}
496
497DECL_BITFIELD(HuffmanNode, uint8_t);
498DECL_BITS(HuffmanNode, Offset, 0, 6);
499DECL_BIT(HuffmanNode, RTerm, 6);
500DECL_BIT(HuffmanNode, LTerm, 7);
501
502static void _unHuffman(struct GBA* gba) {
503 struct ARMCore* cpu = gba->cpu;
504 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
505 uint32_t dest = cpu->gprs[1];
506 uint32_t header = cpu->memory.load32(cpu, source, 0);
507 int remaining = header >> 8;
508 int bits = header & 0xF;
509 if (bits == 0) {
510 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
511 bits = 8;
512 }
513 if (32 % bits || bits == 1) {
514 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
515 return;
516 }
517 // We assume the signature byte (0x20) is correct
518 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
519 int block = 0;
520 uint32_t treeBase = source + 5;
521 source += 5 + treesize;
522 uint32_t nPointer = treeBase;
523 HuffmanNode node;
524 int bitsRemaining;
525 int readBits;
526 int bitsSeen = 0;
527 node = cpu->memory.load8(cpu, nPointer, 0);
528 while (remaining > 0) {
529 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
530 source += 4;
531 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
532 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
533 if (bitstream & 0x80000000) {
534 // Go right
535 if (HuffmanNodeIsRTerm(node)) {
536 readBits = cpu->memory.load8(cpu, next + 1, 0);
537 } else {
538 nPointer = next + 1;
539 node = cpu->memory.load8(cpu, nPointer, 0);
540 continue;
541 }
542 } else {
543 // Go left
544 if (HuffmanNodeIsLTerm(node)) {
545 readBits = cpu->memory.load8(cpu, next, 0);
546 } else {
547 nPointer = next;
548 node = cpu->memory.load8(cpu, nPointer, 0);
549 continue;
550 }
551 }
552
553 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
554 bitsSeen += bits;
555 nPointer = treeBase;
556 node = cpu->memory.load8(cpu, nPointer, 0);
557 if (bitsSeen == 32) {
558 bitsSeen = 0;
559 cpu->memory.store32(cpu, dest, block, 0);
560 dest += 4;
561 remaining -= 4;
562 block = 0;
563 }
564 }
565 }
566 cpu->gprs[0] = source;
567 cpu->gprs[1] = dest;
568}
569
570static void _unRl(struct GBA* gba, int width) {
571 struct ARMCore* cpu = gba->cpu;
572 uint32_t source = cpu->gprs[0];
573 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
574 int padding = (4 - remaining) & 0x3;
575 // We assume the signature byte (0x30) is correct
576 int blockheader;
577 int block;
578 source += 4;
579 uint32_t dest = cpu->gprs[1];
580 int halfword = 0;
581 while (remaining > 0) {
582 blockheader = cpu->memory.load8(cpu, source, 0);
583 ++source;
584 if (blockheader & 0x80) {
585 // Compressed
586 blockheader &= 0x7F;
587 blockheader += 3;
588 block = cpu->memory.load8(cpu, source, 0);
589 ++source;
590 while (blockheader-- && remaining) {
591 --remaining;
592 if (width == 2) {
593 if (dest & 1) {
594 halfword |= block << 8;
595 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
596 } else {
597 halfword = block;
598 }
599 } else {
600 cpu->memory.store8(cpu, dest, block, 0);
601 }
602 ++dest;
603 }
604 } else {
605 // Uncompressed
606 blockheader++;
607 while (blockheader-- && remaining) {
608 --remaining;
609 int byte = cpu->memory.load8(cpu, source, 0);
610 ++source;
611 if (width == 2) {
612 if (dest & 1) {
613 halfword |= byte << 8;
614 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
615 } else {
616 halfword = byte;
617 }
618 } else {
619 cpu->memory.store8(cpu, dest, byte, 0);
620 }
621 ++dest;
622 }
623 }
624 }
625 if (width == 2) {
626 if (dest & 1) {
627 --padding;
628 ++dest;
629 }
630 for (; padding > 0; padding -= 2, dest += 2) {
631 cpu->memory.store16(cpu, dest, 0, 0);
632 }
633 } else {
634 while (padding--) {
635 cpu->memory.store8(cpu, dest, 0, 0);
636 ++dest;
637 }
638 }
639 cpu->gprs[0] = source;
640 cpu->gprs[1] = dest;
641}
642
643static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
644 struct ARMCore* cpu = gba->cpu;
645 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
646 uint32_t dest = cpu->gprs[1];
647 uint32_t header = cpu->memory.load32(cpu, source, 0);
648 int remaining = header >> 8;
649 // We assume the signature nybble (0x8) is correct
650 uint16_t halfword = 0;
651 uint16_t old = 0;
652 source += 4;
653 while (remaining > 0) {
654 uint16_t new;
655 if (inwidth == 1) {
656 new = cpu->memory.load8(cpu, source, 0);
657 } else {
658 new = cpu->memory.load16(cpu, source, 0);
659 }
660 new += old;
661 if (outwidth > inwidth) {
662 halfword >>= 8;
663 halfword |= (new << 8);
664 if (source & 1) {
665 cpu->memory.store16(cpu, dest, halfword, 0);
666 dest += outwidth;
667 remaining -= outwidth;
668 }
669 } else if (outwidth == 1) {
670 cpu->memory.store8(cpu, dest, new, 0);
671 dest += outwidth;
672 remaining -= outwidth;
673 } else {
674 cpu->memory.store16(cpu, dest, new, 0);
675 dest += outwidth;
676 remaining -= outwidth;
677 }
678 old = new;
679 source += inwidth;
680 }
681 cpu->gprs[0] = source;
682 cpu->gprs[1] = dest;
683}