all repos — mgba @ 5ce943c5801e1621be8754183d4b34dd12899fc7

mGBA Game Boy Advance Emulator

src/gb/timer.c (view raw)

  1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/gb/timer.h>
  7
  8#include <mgba/internal/lr35902/lr35902.h>
  9#include <mgba/internal/gb/gb.h>
 10#include <mgba/internal/gb/io.h>
 11#include <mgba/internal/gb/serialize.h>
 12
 13void _GBTimerIRQ(struct mTiming* timing, void* context, uint32_t cyclesLate) {
 14	UNUSED(timing);
 15	UNUSED(cyclesLate);
 16	struct GBTimer* timer = context;
 17	timer->p->memory.io[REG_TIMA] = timer->p->memory.io[REG_TMA];
 18	timer->p->memory.io[REG_IF] |= (1 << GB_IRQ_TIMER);
 19	GBUpdateIRQs(timer->p);
 20}
 21
 22static void _GBTimerDivIncrement(struct GBTimer* timer, uint32_t cyclesLate) {
 23	while (timer->nextDiv >= GB_DMG_DIV_PERIOD) {
 24		timer->nextDiv -= GB_DMG_DIV_PERIOD;
 25
 26		// Make sure to trigger when the correct bit is a falling edge
 27		if (timer->timaPeriod > 0 && (timer->internalDiv & (timer->timaPeriod - 1)) == timer->timaPeriod - 1) {
 28			++timer->p->memory.io[REG_TIMA];
 29			if (!timer->p->memory.io[REG_TIMA]) {
 30				mTimingSchedule(&timer->p->timing, &timer->irq, 4 - cyclesLate);
 31			}
 32		}
 33		++timer->internalDiv;
 34		timer->p->memory.io[REG_DIV] = timer->internalDiv >> 4;
 35	}
 36}
 37
 38void _GBTimerUpdate(struct mTiming* timing, void* context, uint32_t cyclesLate) {
 39	struct GBTimer* timer = context;
 40	timer->nextDiv += cyclesLate;
 41	_GBTimerDivIncrement(timer, cyclesLate);
 42	// Batch div increments
 43	int divsToGo = 16 - (timer->internalDiv & 15);
 44	int timaToGo = INT_MAX;
 45	if (timer->timaPeriod) {
 46		timaToGo = timer->timaPeriod - (timer->internalDiv & (timer->timaPeriod - 1));
 47	}
 48	if (timaToGo < divsToGo) {
 49		divsToGo = timaToGo;
 50	}
 51	timer->nextDiv = GB_DMG_DIV_PERIOD * divsToGo;
 52	mTimingSchedule(timing, &timer->event, timer->nextDiv - cyclesLate);
 53}
 54
 55void GBTimerReset(struct GBTimer* timer) {
 56	timer->event.context = timer;
 57	timer->event.name = "GB Timer";
 58	timer->event.callback = _GBTimerUpdate;
 59	timer->event.priority = 0x20;
 60	timer->irq.context = timer;
 61	timer->irq.name = "GB Timer IRQ";
 62	timer->irq.callback = _GBTimerIRQ;
 63	timer->event.priority = 0x21;
 64
 65	timer->nextDiv = GB_DMG_DIV_PERIOD; // TODO: GBC differences
 66	timer->timaPeriod = 1024 >> 4;
 67	timer->internalDiv = 0;
 68}
 69
 70void GBTimerDivReset(struct GBTimer* timer) {
 71	timer->nextDiv -= mTimingUntil(&timer->p->timing, &timer->event);
 72	mTimingDeschedule(&timer->p->timing, &timer->event);
 73	_GBTimerDivIncrement(timer, (timer->p->cpu->executionState + 1) & 3);
 74	if (timer->internalDiv & (timer->timaPeriod >> 1)) {
 75		++timer->p->memory.io[REG_TIMA];
 76		if (!timer->p->memory.io[REG_TIMA]) {
 77			mTimingSchedule(&timer->p->timing, &timer->irq, 4 - ((timer->p->cpu->executionState + 1) & 3));
 78		}
 79	}
 80	timer->p->memory.io[REG_DIV] = 0;
 81	timer->internalDiv = 0;
 82	timer->nextDiv = GB_DMG_DIV_PERIOD;
 83	mTimingSchedule(&timer->p->timing, &timer->event, timer->nextDiv - ((timer->p->cpu->executionState + 1) & 3));
 84}
 85
 86uint8_t GBTimerUpdateTAC(struct GBTimer* timer, GBRegisterTAC tac) {
 87	if (GBRegisterTACIsRun(tac)) {
 88		switch (GBRegisterTACGetClock(tac)) {
 89		case 0:
 90			timer->timaPeriod = 1024 >> 4;
 91			break;
 92		case 1:
 93			timer->timaPeriod = 16 >> 4;
 94			break;
 95		case 2:
 96			timer->timaPeriod = 64 >> 4;
 97			break;
 98		case 3:
 99			timer->timaPeriod = 256 >> 4;
100			break;
101		}
102
103		timer->nextDiv -= mTimingUntil(&timer->p->timing, &timer->event);
104		mTimingDeschedule(&timer->p->timing, &timer->event);
105		_GBTimerDivIncrement(timer, (timer->p->cpu->executionState + 1) & 3);
106		timer->nextDiv += GB_DMG_DIV_PERIOD;
107		mTimingSchedule(&timer->p->timing, &timer->event, timer->nextDiv);
108	} else {
109		timer->timaPeriod = 0;
110	}
111	return tac;
112}
113
114void GBTimerSerialize(const struct GBTimer* timer, struct GBSerializedState* state) {
115	STORE_32LE(timer->nextDiv, 0, &state->timer.nextDiv);
116	STORE_32LE(timer->internalDiv, 0, &state->timer.internalDiv);
117	STORE_32LE(timer->timaPeriod, 0, &state->timer.timaPeriod);
118	STORE_32LE(timer->event.when - mTimingCurrentTime(&timer->p->timing), 0, &state->timer.nextEvent);
119	STORE_32LE(timer->irq.when - mTimingCurrentTime(&timer->p->timing), 0, &state->timer.nextIRQ);
120	GBSerializedTimerFlags flags = GBSerializedTimerFlagsSetIrqPending(0, mTimingIsScheduled(&timer->p->timing, &timer->irq));
121	state->timer.flags = flags;
122}
123
124void GBTimerDeserialize(struct GBTimer* timer, const struct GBSerializedState* state) {
125	LOAD_32LE(timer->nextDiv, 0, &state->timer.nextDiv);
126	LOAD_32LE(timer->internalDiv, 0, &state->timer.internalDiv);
127	LOAD_32LE(timer->timaPeriod, 0, &state->timer.timaPeriod);
128
129	uint32_t when;
130	LOAD_32LE(when, 0, &state->timer.nextEvent);
131	mTimingSchedule(&timer->p->timing, &timer->event, when);
132
133	GBSerializedTimerFlags flags = state->timer.flags;
134
135	if (GBSerializedTimerFlagsIsIrqPending(flags)) {
136		LOAD_32LE(when, 0, &state->timer.nextIRQ);
137		mTimingSchedule(&timer->p->timing, &timer->irq, when);
138	}
139}