src/isa-thumb.c (view raw)
1#include "isa-thumb.h"
2
3static const ThumbInstruction _thumbTable[0x400];
4
5// Instruction definitions
6// Beware pre-processor insanity
7
8#define APPLY(F, ...) F(__VA_ARGS__)
9
10#define COUNT_1(EMITTER, PREFIX, ...) \
11 EMITTER(PREFIX ## 0, 0, __VA_ARGS__) \
12 EMITTER(PREFIX ## 1, 1, __VA_ARGS__)
13
14#define COUNT_2(EMITTER, PREFIX, ...) \
15 COUNT_1(EMITTER, PREFIX, __VA_ARGS__) \
16 EMITTER(PREFIX ## 2, 2, __VA_ARGS__) \
17 EMITTER(PREFIX ## 3, 3, __VA_ARGS__)
18
19#define COUNT_3(EMITTER, PREFIX, ...) \
20 COUNT_2(EMITTER, PREFIX, __VA_ARGS__) \
21 EMITTER(PREFIX ## 4, 4, __VA_ARGS__) \
22 EMITTER(PREFIX ## 5, 5, __VA_ARGS__) \
23 EMITTER(PREFIX ## 6, 6, __VA_ARGS__) \
24 EMITTER(PREFIX ## 7, 7, __VA_ARGS__)
25
26#define COUNT_4(EMITTER, PREFIX, ...) \
27 COUNT_3(EMITTER, PREFIX, __VA_ARGS__) \
28 EMITTER(PREFIX ## 8, 8, __VA_ARGS__) \
29 EMITTER(PREFIX ## 9, 9, __VA_ARGS__) \
30 EMITTER(PREFIX ## A, 10, __VA_ARGS__) \
31 EMITTER(PREFIX ## B, 11, __VA_ARGS__) \
32 EMITTER(PREFIX ## C, 12, __VA_ARGS__) \
33 EMITTER(PREFIX ## D, 13, __VA_ARGS__) \
34 EMITTER(PREFIX ## E, 14, __VA_ARGS__) \
35 EMITTER(PREFIX ## F, 15, __VA_ARGS__)
36
37#define COUNT_5(EMITTER, PREFIX, ...) \
38 COUNT_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
39 EMITTER(PREFIX ## 10, 16, __VA_ARGS__) \
40 EMITTER(PREFIX ## 11, 17, __VA_ARGS__) \
41 EMITTER(PREFIX ## 12, 18, __VA_ARGS__) \
42 EMITTER(PREFIX ## 13, 19, __VA_ARGS__) \
43 EMITTER(PREFIX ## 14, 20, __VA_ARGS__) \
44 EMITTER(PREFIX ## 15, 21, __VA_ARGS__) \
45 EMITTER(PREFIX ## 16, 22, __VA_ARGS__) \
46 EMITTER(PREFIX ## 17, 23, __VA_ARGS__) \
47 EMITTER(PREFIX ## 18, 24, __VA_ARGS__) \
48 EMITTER(PREFIX ## 19, 25, __VA_ARGS__) \
49 EMITTER(PREFIX ## 1A, 26, __VA_ARGS__) \
50 EMITTER(PREFIX ## 1B, 27, __VA_ARGS__) \
51 EMITTER(PREFIX ## 1C, 28, __VA_ARGS__) \
52 EMITTER(PREFIX ## 1D, 29, __VA_ARGS__) \
53 EMITTER(PREFIX ## 1E, 30, __VA_ARGS__) \
54 EMITTER(PREFIX ## 1F, 31, __VA_ARGS__) \
55
56#define THUMB_WRITE_PC \
57 cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB) + WORD_SIZE_THUMB
58
59#define DEFINE_INSTRUCTION_THUMB(NAME, BODY) \
60 static void _ThumbInstruction ## NAME (struct ARMCore* cpu, uint16_t opcode) { \
61 BODY; \
62 }
63
64#define DEFINE_SHIFT_1_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
65 DEFINE_INSTRUCTION_THUMB(NAME, \
66 int immediate = IMMEDIATE; \
67 BODY;)
68
69#define DEFINE_SHIFT_1_INSTRUCTION_THUMB(NAME, BODY) \
70 COUNT_5(DEFINE_SHIFT_1_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
71
72DEFINE_SHIFT_1_INSTRUCTION_THUMB(LSL, )
73DEFINE_SHIFT_1_INSTRUCTION_THUMB(LSR, )
74DEFINE_SHIFT_1_INSTRUCTION_THUMB(ASR, )
75
76#define DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB(NAME, RM, BODY) \
77 DEFINE_INSTRUCTION_THUMB(NAME, \
78 int rm = RM; \
79 BODY;)
80
81#define DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(NAME, BODY) \
82 COUNT_3(DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB, NAME ## 3_R, BODY)
83
84DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(ADD, )
85DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(SUB, )
86
87#define DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
88 DEFINE_INSTRUCTION_THUMB(NAME, \
89 int immediate = IMMEDIATE; \
90 BODY;)
91
92#define DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(NAME, BODY) \
93 COUNT_3(DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
94
95DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(ADD, )
96DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(SUB, )
97
98#define DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB(NAME, RD, BODY) \
99 DEFINE_INSTRUCTION_THUMB(NAME, \
100 int rd = RD; \
101 BODY;)
102
103#define DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(NAME, BODY) \
104 COUNT_3(DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB, NAME ## _R, BODY)
105
106DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(ADD2, )
107DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(CMP1, )
108DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(MOV1, )
109DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(SUB2, )
110
111#define DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NAME, BODY) \
112 DEFINE_INSTRUCTION_THUMB(NAME, \
113 int rd = opcode & 0x0007; \
114 int rn = (opcode >> 3) & 0x0007; \
115 BODY;)
116
117DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(AND, )
118DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(EOR, )
119DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, )
120DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, )
121DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ASR2, )
122DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ADC, )
123DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(SBC, )
124DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ROR, )
125DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(TST, )
126DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NEG, )
127DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMP2, )
128DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMN, )
129DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ORR, )
130DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MUL, )
131DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(BIC, )
132DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MVN, )
133
134#define DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME, H1, H2, BODY) \
135 DEFINE_INSTRUCTION_THUMB(NAME, \
136 int rd = opcode & 0x0007 | H1; \
137 int rm = (opcode >> 3) & 0x0007 | H2; \
138 BODY;)
139
140#define DEFINE_INSTRUCTION_WITH_HIGH_THUMB(NAME, BODY) \
141 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 00, 0, 0, BODY) \
142 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 01, 0, 8, BODY) \
143 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 10, 8, 0, BODY) \
144 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 11, 8, 8, BODY)
145
146DEFINE_INSTRUCTION_WITH_HIGH_THUMB(ADD4, )
147DEFINE_INSTRUCTION_WITH_HIGH_THUMB(CMP3, )
148DEFINE_INSTRUCTION_WITH_HIGH_THUMB(MOV3, )
149
150DEFINE_INSTRUCTION_THUMB(ILL, )
151
152#define DECLARE_INSTRUCTION_THUMB(EMITTER, NAME) \
153 EMITTER ## NAME
154
155#define DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, NAME) \
156 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 00), \
157 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 01), \
158 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 10), \
159 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 11)
160
161#define DUMMY(X, ...) X,
162#define DUMMY_4(...) \
163 DUMMY(__VA_ARGS__) \
164 DUMMY(__VA_ARGS__) \
165 DUMMY(__VA_ARGS__) \
166 DUMMY(__VA_ARGS__)
167
168#define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
169 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
170 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
171 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
172 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
173 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
174 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
175 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
176 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
177 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
178 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
179 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
180 DECLARE_INSTRUCTION_THUMB(EMITTER, AND), \
181 DECLARE_INSTRUCTION_THUMB(EMITTER, EOR), \
182 DECLARE_INSTRUCTION_THUMB(EMITTER, LSL2), \
183 DECLARE_INSTRUCTION_THUMB(EMITTER, LSR2), \
184 DECLARE_INSTRUCTION_THUMB(EMITTER, ASR2), \
185 DECLARE_INSTRUCTION_THUMB(EMITTER, ADC), \
186 DECLARE_INSTRUCTION_THUMB(EMITTER, SBC), \
187 DECLARE_INSTRUCTION_THUMB(EMITTER, ROR), \
188 DECLARE_INSTRUCTION_THUMB(EMITTER, TST), \
189 DECLARE_INSTRUCTION_THUMB(EMITTER, NEG), \
190 DECLARE_INSTRUCTION_THUMB(EMITTER, CMP2), \
191 DECLARE_INSTRUCTION_THUMB(EMITTER, CMN), \
192 DECLARE_INSTRUCTION_THUMB(EMITTER, ORR), \
193 DECLARE_INSTRUCTION_THUMB(EMITTER, MUL), \
194 DECLARE_INSTRUCTION_THUMB(EMITTER, BIC), \
195 DECLARE_INSTRUCTION_THUMB(EMITTER, MVN), \
196 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, ADD4), \
197 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, CMP3), \
198 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, MOV3), \
199 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
200 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
201 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
202 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
203 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)
204
205static const ThumbInstruction _thumbTable[0x400] = {
206 DECLARE_THUMB_EMITTER_BLOCK(_ThumbInstruction)
207};