all repos — mgba @ 5efacfa097d75f5fcd0672f8b98a1bcc36e4ccbb

mGBA Game Boy Advance Emulator

src/ds/video.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/ds/video.h>
  7
  8#include <mgba/core/sync.h>
  9#include <mgba/internal/arm/macros.h>
 10#include <mgba/internal/ds/ds.h>
 11#include <mgba/internal/ds/memory.h>
 12#include <mgba/internal/gba/video.h>
 13
 14#include <mgba-util/memory.h>
 15
 16mLOG_DEFINE_CATEGORY(DS_VIDEO, "DS Video", "ds.video");
 17
 18static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer);
 19static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer);
 20static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer);
 21static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 22static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 23static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam);
 24static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot);
 25static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y);
 26static void DSVideoDummyRendererDrawScanlineDirectly(struct DSVideoRenderer* renderer, int y, color_t* scanline);
 27static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer);
 28static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels);
 29static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels);
 30
 31static void _startHblank7(struct mTiming*, void* context, uint32_t cyclesLate);
 32static void _startHdraw7(struct mTiming*, void* context, uint32_t cyclesLate);
 33static void _startHblank9(struct mTiming*, void* context, uint32_t cyclesLate);
 34static void _startHdraw9(struct mTiming*, void* context, uint32_t cyclesLate);
 35
 36static const uint32_t _vramSize[9] = {
 37	0x20000,
 38	0x20000,
 39	0x20000,
 40	0x20000,
 41	0x10000,
 42	0x04000,
 43	0x04000,
 44	0x08000,
 45	0x04000
 46};
 47
 48enum DSVRAMBankMode {
 49	MODE_A_BG = 0,
 50	MODE_B_BG = 1,
 51	MODE_A_OBJ = 2,
 52	MODE_B_OBJ = 3,
 53	MODE_LCDC,
 54	MODE_7_VRAM,
 55	MODE_A_BG_EXT_PAL,
 56	MODE_B_BG_EXT_PAL,
 57	MODE_A_OBJ_EXT_PAL,
 58	MODE_B_OBJ_EXT_PAL,
 59	MODE_3D_TEX,
 60	MODE_3D_TEX_PAL,
 61};
 62
 63const struct DSVRAMBankInfo {
 64	int base;
 65	uint32_t mirrorSize;
 66	enum DSVRAMBankMode mode;
 67	int offset[4];
 68} _vramInfo[9][8] = {
 69	{ // A
 70		{ 0x000, 0x40, MODE_LCDC },
 71		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 72		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 73		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 74	},
 75	{ // B
 76		{ 0x008, 0x40, MODE_LCDC },
 77		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 78		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 79		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 80	},
 81	{ // C
 82		{ 0x010, 0x40, MODE_LCDC },
 83		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 84		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 85		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 86		{ 0x000, 0x08, MODE_B_BG },
 87	},
 88	{ // D
 89		{ 0x018, 0x40, MODE_LCDC },
 90		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 91		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 92		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 93		{ 0x000, 0x08, MODE_B_OBJ },
 94	},
 95	{ // E
 96		{ 0x020, 0x40, MODE_LCDC },
 97		{ 0x000, 0x20, MODE_A_BG },
 98		{ 0x000, 0x10, MODE_A_OBJ },
 99		{ 0x000, 0x04, MODE_3D_TEX_PAL },
100		{ 0x000, 0x04, MODE_A_BG_EXT_PAL },
101	},
102	{ // F
103		{ 0x024, 0x40, MODE_LCDC },
104		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
105		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
106		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
107		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
108		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
109	},
110	{ // G
111		{ 0x025, 0x40, MODE_LCDC },
112		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
113		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
114		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
115		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
116		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
117	},
118	{ // H
119		{ 0x026, 0x40, MODE_LCDC },
120		{ 0x000, 0x04, MODE_B_BG },
121		{ 0x000, 0x04, MODE_B_BG_EXT_PAL },
122	},
123	{ // I
124		{ 0x028, 0x40, MODE_LCDC },
125		{ 0x002, 0x04, MODE_B_BG },
126		{ 0x000, 0x01, MODE_B_OBJ },
127		{ 0x000, 0x01, MODE_B_OBJ_EXT_PAL },
128	},
129};
130
131static struct DSVideoRenderer dummyRenderer = {
132	.init = DSVideoDummyRendererInit,
133	.reset = DSVideoDummyRendererReset,
134	.deinit = DSVideoDummyRendererDeinit,
135	.writeVideoRegister = DSVideoDummyRendererWriteVideoRegister,
136	.writePalette = DSVideoDummyRendererWritePalette,
137	.writeOAM = DSVideoDummyRendererWriteOAM,
138	.invalidateExtPal = DSVideoDummyRendererInvalidateExtPal,
139	.drawScanline = DSVideoDummyRendererDrawScanline,
140	.drawScanlineDirectly = DSVideoDummyRendererDrawScanlineDirectly,
141	.finishFrame = DSVideoDummyRendererFinishFrame,
142	.getPixels = DSVideoDummyRendererGetPixels,
143	.putPixels = DSVideoDummyRendererPutPixels,
144};
145
146void DSVideoInit(struct DSVideo* video) {
147	video->renderer = &dummyRenderer;
148	video->vram = NULL;
149	video->frameskip = 0;
150	video->event7.name = "DS7 Video";
151	video->event7.callback = NULL;
152	video->event7.context = video;
153	video->event7.priority = 8;
154	video->event9.name = "DS9 Video";
155	video->event9.callback = NULL;
156	video->event9.context = video;
157	video->event9.priority = 8;
158}
159
160void DSVideoReset(struct DSVideo* video) {
161	video->vcount = 0;
162	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
163	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
164
165	video->event7.callback = _startHblank7;
166	video->event9.callback = _startHblank9;
167	mTimingSchedule(&video->p->ds7.timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH);
168	mTimingSchedule(&video->p->ds9.timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2);
169
170	video->frameCounter = 0;
171	video->frameskipCounter = 0;
172
173	if (video->vram) {
174		mappedMemoryFree(video->vram, DS_SIZE_VRAM);
175	}
176	video->vram = anonymousMemoryMap(DS_SIZE_VRAM);
177	video->renderer->vram = video->vram;
178
179	video->p->memory.vramBank[0] = &video->vram[0x00000];
180	video->p->memory.vramBank[1] = &video->vram[0x10000];
181	video->p->memory.vramBank[2] = &video->vram[0x20000];
182	video->p->memory.vramBank[3] = &video->vram[0x30000];
183	video->p->memory.vramBank[4] = &video->vram[0x40000];
184	video->p->memory.vramBank[5] = &video->vram[0x48000];
185	video->p->memory.vramBank[6] = &video->vram[0x4A000];
186	video->p->memory.vramBank[7] = &video->vram[0x4C000];
187	video->p->memory.vramBank[8] = &video->vram[0x50000];
188
189	video->renderer->deinit(video->renderer);
190	video->renderer->init(video->renderer);
191}
192
193void DSVideoAssociateRenderer(struct DSVideo* video, struct DSVideoRenderer* renderer) {
194	video->renderer->deinit(video->renderer);
195	video->renderer = renderer;
196	renderer->palette = video->palette;
197	renderer->vram = video->vram;
198	memcpy(renderer->vramABG, video->vramABG, sizeof(renderer->vramABG));
199	memcpy(renderer->vramAOBJ, video->vramAOBJ, sizeof(renderer->vramAOBJ));
200	memcpy(renderer->vramABGExtPal, video->vramABGExtPal, sizeof(renderer->vramABGExtPal));
201	renderer->vramAOBJExtPal = video->vramAOBJExtPal;
202	memcpy(renderer->vramBBG, video->vramBBG, sizeof(renderer->vramBBG));
203	memcpy(renderer->vramBOBJ, video->vramBOBJ, sizeof(renderer->vramBOBJ));
204	memcpy(renderer->vramBBGExtPal, video->vramBBGExtPal, sizeof(renderer->vramBBGExtPal));
205	renderer->vramBOBJExtPal = video->vramBOBJExtPal;
206	renderer->oam = &video->oam;
207	renderer->gx = &video->p->gx;
208	video->renderer->init(video->renderer);
209}
210
211void DSVideoDeinit(struct DSVideo* video) {
212	DSVideoAssociateRenderer(video, &dummyRenderer);
213	mappedMemoryFree(video->vram, DS_SIZE_VRAM);
214}
215
216static void _performCapture(struct DSVideo* video, int y) {
217	DSRegisterDISPCAPCNT dispcap = video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_LO >> 1];
218	dispcap |= video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16;
219	// TODO: Check mode
220	int block = DSRegisterDISPCAPCNTGetWriteBlock(dispcap);
221	if (!video->p->memory.vramMode[block][4]) {
222		return;
223	}
224	uint16_t* vram = &video->vram[0x10000 * block];
225	const color_t* pixelsA;
226	color_t pixels[DS_VIDEO_HORIZONTAL_PIXELS];
227	int width = DS_VIDEO_HORIZONTAL_PIXELS;
228	switch (DSRegisterDISPCAPCNTGetCaptureSize(dispcap)) {
229	case 0:
230		width = DS_VIDEO_HORIZONTAL_PIXELS / 2;
231		break;
232	case 1:
233		if (y >= 64) {
234			return;
235		}
236	case 2:
237		if (y >= 128) {
238			return;
239		}
240	default:
241		break;
242	}
243
244	if (DSRegisterDISPCAPCNTIsSourceA(dispcap)) {
245		// TODO: Process scanline regardless of output type
246		video->p->gx.renderer->getScanline(video->p->gx.renderer, y, &pixelsA);
247	} else {
248		video->renderer->drawScanlineDirectly(video->renderer, y, pixels);
249		pixelsA = pixels;
250	}
251
252	uint32_t base = DSRegisterDISPCAPCNTGetWriteOffset(dispcap) * 0x8000;
253	uint16_t pixel;
254	int x;
255	// TODO: Blending
256	for (x = 0; x < width; ++x) {
257		color_t colorA = pixelsA[x];
258#ifdef COLOR_16_BIT
259#ifdef COLOR_5_6_5
260		pixel = colorA & 0x1F;
261		pixel |= (colorA & 0xFFC0) >> 1;
262#else
263		pixel = colorA;
264#endif
265#else
266		pixel = (colorA >> 9) & 0x7C00;
267		pixel |= (colorA >> 6) & 0x03E0;
268		pixel |= (colorA >> 3) & 0x001F;
269#endif
270		pixel |= 0x8000;
271		STORE_16(pixel, ((x + y * DS_VIDEO_HORIZONTAL_PIXELS) * 2 + base) & 0x1FFFE, vram);
272	}
273}
274
275void _startHdraw7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
276	struct DSVideo* video = context;
277	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
278	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
279	video->event7.callback = _startHblank7;
280	mTimingSchedule(timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
281
282	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
283
284	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
285		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
286		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
287			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VCOUNTER);
288		}
289	} else {
290		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
291	}
292	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
293
294	switch (video->vcount) {
295	case DS_VIDEO_VERTICAL_PIXELS:
296		DSDMARunVblank(&video->p->ds7, -cyclesLate);
297		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
298		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
299			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VBLANK);
300		}
301		break;
302	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
303		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
304		break;
305	}
306}
307
308void _startHblank7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
309	struct DSVideo* video = context;
310	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
311	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
312	video->event7.callback = _startHdraw7;
313	mTimingSchedule(timing, &video->event7, DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
314
315	// Begin Hblank
316	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
317
318	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
319		DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_HBLANK);
320	}
321	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
322}
323
324void _startHdraw9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
325	struct DSVideo* video = context;
326	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
327	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
328	video->event9.callback = _startHblank9;
329	mTimingSchedule(timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2 - cyclesLate);
330
331	++video->vcount;
332	if (video->vcount == DS_VIDEO_VERTICAL_TOTAL_PIXELS) {
333		video->vcount = 0;
334	}
335	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
336
337	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
338		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
339		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
340			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VCOUNTER);
341		}
342	} else {
343		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
344	}
345	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
346
347	// Note: state may be recorded during callbacks, so ensure it is consistent!
348	switch (video->vcount) {
349	case 0:
350		DSFrameStarted(video->p);
351		video->inCapture = DSRegisterDISPCAPCNTIsEnable(video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16);
352		break;
353	case DS_VIDEO_VERTICAL_PIXELS:
354		DSDMARunVblank(&video->p->ds9, -cyclesLate);
355		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
356		video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] = DSRegisterDISPCAPCNTClearEnable(video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16) >> 16;
357		if (video->frameskipCounter <= 0) {
358			video->renderer->finishFrame(video->renderer);
359			DSGXFlush(&video->p->gx);
360		}
361		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
362			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VBLANK);
363		}
364		video->inCapture = false;
365		DSFrameEnded(video->p);
366		--video->frameskipCounter;
367		if (video->frameskipCounter < 0) {
368			mCoreSyncPostFrame(video->p->sync);
369			video->frameskipCounter = video->frameskip;
370		}
371		++video->frameCounter;
372		break;
373	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
374		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
375		break;
376	}
377}
378
379void _startHblank9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
380	struct DSVideo* video = context;
381	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
382	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
383	video->event9.callback = _startHdraw9;
384	mTimingSchedule(timing, &video->event9, (DS9_VIDEO_HBLANK_LENGTH * 2) - cyclesLate);
385
386	// Begin Hblank
387	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
388	if (video->frameskipCounter <= 0) {
389		if (video->vcount < DS_VIDEO_VERTICAL_PIXELS) {
390			video->renderer->drawScanline(video->renderer, video->vcount);
391		}
392		if (video->vcount < DS_VIDEO_VERTICAL_PIXELS - 48) {
393			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48);
394		}
395		if (video->vcount >= DS_VIDEO_VERTICAL_TOTAL_PIXELS - 48) {
396			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48 - DS_VIDEO_VERTICAL_TOTAL_PIXELS);
397		}
398	}
399	if (video->inCapture) {
400		_performCapture(video, video->vcount);
401	}
402
403	if (video->vcount < DS_VIDEO_VERTICAL_PIXELS) {
404		DSDMARunHblank(&video->p->ds9, -cyclesLate);
405	}
406	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
407		DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_HBLANK);
408	}
409	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
410}
411
412void DSVideoWriteDISPSTAT(struct DSCommon* dscore, uint16_t value) {
413	dscore->memory.io[DS_REG_DISPSTAT >> 1] &= 0x7;
414	dscore->memory.io[DS_REG_DISPSTAT >> 1] |= value;
415	// TODO: Does a VCounter IRQ trigger on write?
416}
417
418void DSVideoConfigureVRAM(struct DS* ds, int index, uint8_t value, uint8_t oldValue) {
419	struct DSMemory* memory = &ds->memory;
420	if (value == oldValue) {
421		return;
422	}
423	uint32_t i, j;
424	uint32_t size = _vramSize[index] >> DS_VRAM_OFFSET;
425	struct DSVRAMBankInfo oldInfo = _vramInfo[index][oldValue & 0x7];
426	uint32_t offset = oldInfo.base + oldInfo.offset[(oldValue >> 3) & 3];
427	switch (oldInfo.mode) {
428	case MODE_A_BG:
429		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
430			for (i = 0; i < size; ++i) {
431				if (ds->video.vramABG[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
432					ds->video.vramABG[i + j] = NULL;
433					ds->video.renderer->vramABG[i + j] = NULL;
434				}
435			}
436		}
437		break;
438	case MODE_B_BG:
439		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
440			for (i = 0; i < size; ++i) {
441				if (ds->video.vramBBG[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
442					ds->video.vramBBG[i + j] = NULL;
443					ds->video.renderer->vramBBG[i + j] = NULL;
444				}
445			}
446		}
447		break;
448	case MODE_A_OBJ:
449		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
450			for (i = 0; i < size; ++i) {
451				if (ds->video.vramAOBJ[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
452					ds->video.vramAOBJ[i + j] = NULL;
453					ds->video.renderer->vramAOBJ[i + j] = NULL;
454				}
455			}
456		}
457		break;
458	case MODE_B_OBJ:
459		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
460			for (i = 0; i < size; ++i) {
461				if (ds->video.vramBOBJ[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
462					ds->video.vramBOBJ[i + j] = NULL;
463					ds->video.renderer->vramBOBJ[i + j] = NULL;
464				}
465			}
466		}
467		break;
468	case MODE_A_BG_EXT_PAL:
469		for (i = 0; i < oldInfo.mirrorSize; ++i) {
470			if (ds->video.vramABGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
471				ds->video.vramABGExtPal[offset + i] = NULL;
472				ds->video.renderer->vramABGExtPal[offset + i] = NULL;
473				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
474			}
475		}
476		break;
477	case MODE_B_BG_EXT_PAL:
478		for (i = 0; i < oldInfo.mirrorSize; ++i) {
479			if (ds->video.vramBBGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
480				ds->video.vramBBGExtPal[offset + i] = NULL;
481				ds->video.renderer->vramBBGExtPal[offset + i] = NULL;
482				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
483			}
484		}
485		break;
486	case MODE_A_OBJ_EXT_PAL:
487		if (ds->video.vramAOBJExtPal == memory->vramBank[index]) {
488			ds->video.vramAOBJExtPal = NULL;
489			ds->video.renderer->vramAOBJExtPal = NULL;
490			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
491		}
492		break;
493	case MODE_B_OBJ_EXT_PAL:
494		if (ds->video.vramBOBJExtPal == memory->vramBank[index]) {
495			ds->video.vramBOBJExtPal = NULL;
496			ds->video.renderer->vramBOBJExtPal = NULL;
497			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
498		}
499		break;
500	case MODE_3D_TEX:
501		if (ds->gx.tex[offset] == memory->vramBank[index]) {
502			ds->gx.tex[offset] = NULL;
503			ds->gx.renderer->tex[offset] = NULL;
504			ds->gx.renderer->invalidateTex(ds->gx.renderer, offset);
505		}
506		break;
507	case MODE_3D_TEX_PAL:
508		for (i = 0; i < oldInfo.mirrorSize; ++i) {
509			if (ds->gx.texPal[offset + i] == &memory->vramBank[index][i << 13]) {
510				ds->gx.texPal[offset + i] = NULL;
511				ds->gx.renderer->texPal[offset + i] = NULL;
512			}
513		}
514		break;
515	case MODE_7_VRAM:
516		for (i = 0; i < size; i += 16) {
517			ds->memory.vram7[(offset + i) >> 4] = NULL;
518		}
519		break;
520	case MODE_LCDC:
521		break;
522	}
523
524	struct DSVRAMBankInfo info = _vramInfo[index][value & 0x7];
525	memset(&memory->vramMirror[index], 0, sizeof(memory->vramMirror[index]));
526	memset(&memory->vramMode[index], 0, sizeof(memory->vramMode[index]));
527	if (!(value & 0x80) || !info.mirrorSize) {
528		return;
529	}
530	offset = info.base + info.offset[(value >> 3) & 3];
531	if (info.mode <= MODE_LCDC) {
532		memory->vramMode[index][info.mode] = 0xFFFF;
533		for (j = offset; j < 0x40; j += info.mirrorSize) {
534			for (i = 0; i < size; ++i) {
535				memory->vramMirror[index][i + j] = 1 << index;
536			}
537		}
538	}
539	switch (info.mode) {
540	case MODE_A_BG:
541		for (j = offset; j < 0x20; j += info.mirrorSize) {
542			for (i = 0; i < size; ++i) {
543				ds->video.vramABG[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
544				ds->video.renderer->vramABG[i + j] = ds->video.vramABG[i + j];
545			}
546		}
547		break;
548	case MODE_B_BG:
549		for (j = offset; j < 0x20; j += info.mirrorSize) {
550			for (i = 0; i < size; ++i) {
551				ds->video.vramBBG[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
552				ds->video.renderer->vramBBG[i + j] = ds->video.vramBBG[i + j];
553			}
554		}
555		break;
556	case MODE_A_OBJ:
557		for (j = offset; j < 0x20; j += info.mirrorSize) {
558			for (i = 0; i < size; ++i) {
559				ds->video.vramAOBJ[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
560				ds->video.renderer->vramAOBJ[i + j] = ds->video.vramAOBJ[i + j];
561			}
562		}
563		break;
564	case MODE_B_OBJ:
565		for (j = offset; j < 0x20; j += info.mirrorSize) {
566			for (i = 0; i < size; ++i) {
567				ds->video.vramBOBJ[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
568				ds->video.renderer->vramBOBJ[i + j] = ds->video.vramBOBJ[i + j];
569			}
570		}
571		break;
572	case MODE_A_BG_EXT_PAL:
573		for (i = 0; i < info.mirrorSize; ++i) {
574			ds->video.vramABGExtPal[offset + i] = &memory->vramBank[index][i << 12];
575			ds->video.renderer->vramABGExtPal[offset + i] = ds->video.vramABGExtPal[offset + i];
576			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
577		}
578		break;
579	case MODE_B_BG_EXT_PAL:
580		for (i = 0; i < info.mirrorSize; ++i) {
581			ds->video.vramBBGExtPal[offset + i] = &memory->vramBank[index][i << 12];
582			ds->video.renderer->vramBBGExtPal[offset + i] = ds->video.vramBBGExtPal[offset + i];
583			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
584		}
585		break;
586	case MODE_A_OBJ_EXT_PAL:
587		ds->video.vramAOBJExtPal = memory->vramBank[index];
588		ds->video.renderer->vramAOBJExtPal = ds->video.vramAOBJExtPal;
589		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
590		break;
591	case MODE_B_OBJ_EXT_PAL:
592		ds->video.vramBOBJExtPal = memory->vramBank[index];
593		ds->video.renderer->vramBOBJExtPal = ds->video.vramBOBJExtPal;
594		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
595		break;
596	case MODE_3D_TEX:
597		ds->gx.tex[offset] = memory->vramBank[index];
598		ds->gx.renderer->tex[offset] = ds->gx.tex[offset];
599		ds->gx.renderer->invalidateTex(ds->gx.renderer, offset);
600		break;
601	case MODE_3D_TEX_PAL:
602		for (i = 0; i < info.mirrorSize; ++i) {
603			ds->gx.texPal[offset + i] = &memory->vramBank[index][i << 13];
604			ds->gx.renderer->texPal[offset + i] = ds->gx.texPal[offset + i];
605		}
606		break;
607	case MODE_7_VRAM:
608		for (i = 0; i < size; i += 16) {
609			ds->memory.vram7[(offset + i) >> 4] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 5)];
610		}
611		break;
612	case MODE_LCDC:
613		break;
614	}
615}
616
617static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer) {
618	UNUSED(renderer);
619	// Nothing to do
620}
621
622static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer) {
623	UNUSED(renderer);
624	// Nothing to do
625}
626
627static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer) {
628	UNUSED(renderer);
629	// Nothing to do
630}
631
632static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
633	UNUSED(renderer);
634	return value;
635}
636
637static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
638	UNUSED(renderer);
639	UNUSED(address);
640	UNUSED(value);
641	// Nothing to do
642}
643
644static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam) {
645	UNUSED(renderer);
646	UNUSED(oam);
647	// Nothing to do
648}
649
650static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot) {
651	UNUSED(renderer);
652	UNUSED(obj);
653	UNUSED(engB);
654	// Nothing to do
655}
656
657static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y) {
658	UNUSED(renderer);
659	UNUSED(y);
660	// Nothing to do
661}
662
663static void DSVideoDummyRendererDrawScanlineDirectly(struct DSVideoRenderer* renderer, int y, color_t* scanline) {
664	UNUSED(renderer);
665	UNUSED(y);
666	UNUSED(scanline);
667	// Nothing to do
668}
669
670static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer) {
671	UNUSED(renderer);
672	// Nothing to do
673}
674
675static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels) {
676	UNUSED(renderer);
677	UNUSED(stride);
678	UNUSED(pixels);
679	// Nothing to do
680}
681
682static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels) {
683	UNUSED(renderer);
684	UNUSED(stride);
685	UNUSED(pixels);
686	// Nothing to do
687}