src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/gba/bios.h>
7
8#include <mgba/internal/arm/isa-inlines.h>
9#include <mgba/internal/arm/macros.h>
10#include <mgba/internal/gba/gba.h>
11#include <mgba/internal/gba/io.h>
12#include <mgba/internal/gba/memory.h>
13#include <mgba-util/math.h>
14
15const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
16const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
17
18mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
19
20static void _unLz77(struct GBA* gba, int width);
21static void _unHuffman(struct GBA* gba);
22static void _unRl(struct GBA* gba, int width);
23static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
24static void _unBitPack(struct GBA* gba);
25
26static int _mulWait(int32_t r) {
27 if ((r & 0xFFFFFF00) == 0xFFFFFF00 || !(r & 0xFFFFFF00)) {
28 return 1;
29 } else if ((r & 0xFFFF0000) == 0xFFFF0000 || !(r & 0xFFFF0000)) {
30 return 2;
31 } else if ((r & 0xFF000000) == 0xFF000000 || !(r & 0xFF000000)) {
32 return 3;
33 } else {
34 return 4;
35 }
36}
37
38static void _SoftReset(struct GBA* gba) {
39 struct ARMCore* cpu = gba->cpu;
40 ARMSetPrivilegeMode(cpu, MODE_IRQ);
41 cpu->spsr.packed = 0;
42 cpu->gprs[ARM_LR] = 0;
43 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
44 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
45 cpu->spsr.packed = 0;
46 cpu->gprs[ARM_LR] = 0;
47 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
48 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
49 cpu->gprs[ARM_LR] = 0;
50 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
51 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
52 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
53 if (flag) {
54 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
55 } else {
56 cpu->gprs[ARM_PC] = BASE_CART0;
57 }
58 _ARMSetMode(cpu, MODE_ARM);
59 ARMWritePC(cpu);
60}
61
62static void _RegisterRamReset(struct GBA* gba) {
63 uint32_t registers = gba->cpu->gprs[0];
64 struct ARMCore* cpu = gba->cpu;
65 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
66 if (registers & 0x01) {
67 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
68 }
69 if (registers & 0x02) {
70 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
71 }
72 if (registers & 0x04) {
73 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
74 }
75 if (registers & 0x08) {
76 memset(gba->video.vram, 0, SIZE_VRAM);
77 }
78 if (registers & 0x10) {
79 memset(gba->video.oam.raw, 0, SIZE_OAM);
80 }
81 if (registers & 0x20) {
82 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
86 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
87 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
88 }
89 if (registers & 0x40) {
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
91 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
92 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
93 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
94 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
104 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
105 }
106 if (registers & 0x80) {
107 cpu->memory.store16(cpu, BASE_IO | REG_DISPSTAT, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | REG_VCOUNT, 0, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG0CNT, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG1CNT, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | REG_BG2CNT, 0, 0);
112 cpu->memory.store16(cpu, BASE_IO | REG_BG3CNT, 0, 0);
113 cpu->memory.store16(cpu, BASE_IO | REG_BG0HOFS, 0, 0);
114 cpu->memory.store16(cpu, BASE_IO | REG_BG0VOFS, 0, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG1HOFS, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG1VOFS, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | REG_BG2HOFS, 0, 0);
118 cpu->memory.store16(cpu, BASE_IO | REG_BG2VOFS, 0, 0);
119 cpu->memory.store16(cpu, BASE_IO | REG_BG3HOFS, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | REG_BG3VOFS, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
122 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
125 cpu->memory.store32(cpu, BASE_IO | REG_BG2X_LO, 0, 0);
126 cpu->memory.store32(cpu, BASE_IO | REG_BG2Y_LO, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
128 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
131 cpu->memory.store32(cpu, BASE_IO | REG_BG3X_LO, 0, 0);
132 cpu->memory.store32(cpu, BASE_IO | REG_BG3Y_LO, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | REG_WIN0H, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | REG_WIN1H, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | REG_WIN0V, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | REG_WIN1V, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | REG_WININ, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | REG_WINOUT, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | REG_MOSAIC, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | REG_BLDCNT, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | REG_BLDALPHA, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | REG_BLDY, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | REG_DMA0SAD_LO, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | REG_DMA0SAD_HI, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | REG_DMA0DAD_LO, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | REG_DMA0DAD_HI, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | REG_DMA0CNT_LO, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | REG_DMA0CNT_HI, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | REG_DMA1SAD_LO, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | REG_DMA1SAD_HI, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | REG_DMA1DAD_LO, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | REG_DMA1DAD_HI, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | REG_DMA1CNT_LO, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | REG_DMA1CNT_HI, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | REG_DMA2SAD_LO, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | REG_DMA2SAD_HI, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | REG_DMA2DAD_LO, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | REG_DMA2DAD_HI, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | REG_DMA2CNT_LO, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | REG_DMA2CNT_HI, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | REG_DMA3SAD_LO, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | REG_DMA3SAD_HI, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | REG_DMA3DAD_LO, 0, 0);
164 cpu->memory.store16(cpu, BASE_IO | REG_DMA3DAD_HI, 0, 0);
165 cpu->memory.store16(cpu, BASE_IO | REG_DMA3CNT_LO, 0, 0);
166 cpu->memory.store16(cpu, BASE_IO | REG_DMA3CNT_HI, 0, 0);
167 cpu->memory.store16(cpu, BASE_IO | REG_TM0CNT_LO, 0, 0);
168 cpu->memory.store16(cpu, BASE_IO | REG_TM0CNT_HI, 0, 0);
169 cpu->memory.store16(cpu, BASE_IO | REG_TM1CNT_LO, 0, 0);
170 cpu->memory.store16(cpu, BASE_IO | REG_TM1CNT_HI, 0, 0);
171 cpu->memory.store16(cpu, BASE_IO | REG_TM2CNT_LO, 0, 0);
172 cpu->memory.store16(cpu, BASE_IO | REG_TM2CNT_HI, 0, 0);
173 cpu->memory.store16(cpu, BASE_IO | REG_TM3CNT_LO, 0, 0);
174 cpu->memory.store16(cpu, BASE_IO | REG_TM3CNT_HI, 0, 0);
175 cpu->memory.store16(cpu, BASE_IO | REG_IE, 0, 0);
176 cpu->memory.store16(cpu, BASE_IO | REG_IF, 0xFFFF, 0);
177 cpu->memory.store16(cpu, BASE_IO | REG_WAITCNT, 0, 0);
178 cpu->memory.store16(cpu, BASE_IO | REG_IME, 0, 0);
179 }
180 if (registers & 0x9C) {
181 gba->video.renderer->reset(gba->video.renderer);
182 gba->video.renderer->writeVideoRegister(gba->video.renderer, REG_DISPCNT, gba->memory.io[REG_DISPCNT >> 1]);
183 int i;
184 for (i = REG_BG0CNT; i < REG_SOUND1CNT_LO; i += 2) {
185 gba->video.renderer->writeVideoRegister(gba->video.renderer, i, gba->memory.io[i >> 1]);
186 }
187 }
188}
189
190static void _BgAffineSet(struct GBA* gba) {
191 struct ARMCore* cpu = gba->cpu;
192 int i = cpu->gprs[2];
193 float ox, oy;
194 float cx, cy;
195 float sx, sy;
196 float theta;
197 int offset = cpu->gprs[0];
198 int destination = cpu->gprs[1];
199 float a, b, c, d;
200 float rx, ry;
201 while (i--) {
202 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
203 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
204 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
205 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
206 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
207 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
208 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
209 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
210 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
211 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
212 offset += 20;
213 // Rotation
214 a = d = cosf(theta);
215 b = c = sinf(theta);
216 // Scale
217 a *= sx;
218 b *= -sx;
219 c *= sy;
220 d *= sy;
221 // Translate
222 rx = ox - (a * cx + b * cy);
223 ry = oy - (c * cx + d * cy);
224 cpu->memory.store16(cpu, destination, a * 256, 0);
225 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
226 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
227 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
228 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
229 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
230 destination += 16;
231 }
232}
233
234static void _ObjAffineSet(struct GBA* gba) {
235 struct ARMCore* cpu = gba->cpu;
236 int i = cpu->gprs[2];
237 float sx, sy;
238 float theta;
239 int offset = cpu->gprs[0];
240 int destination = cpu->gprs[1];
241 int diff = cpu->gprs[3];
242 float a, b, c, d;
243 while (i--) {
244 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
245 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
246 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
247 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
248 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
249 offset += 8;
250 // Rotation
251 a = d = cosf(theta);
252 b = c = sinf(theta);
253 // Scale
254 a *= sx;
255 b *= -sx;
256 c *= sy;
257 d *= sy;
258 cpu->memory.store16(cpu, destination, a * 256, 0);
259 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
260 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
261 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
262 destination += diff * 4;
263 }
264}
265
266static void _MidiKey2Freq(struct GBA* gba) {
267 struct ARMCore* cpu = gba->cpu;
268
269 int oldRegion = gba->memory.activeRegion;
270 gba->memory.activeRegion = REGION_BIOS;
271 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
272 gba->memory.activeRegion = oldRegion;
273
274 cpu->gprs[0] = key / exp2f((180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
275}
276
277static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
278 struct ARMCore* cpu = gba->cpu;
279 if (denom != 0 && (denom != -1 || num != INT32_MIN)) {
280 div_t result = div(num, denom);
281 cpu->gprs[0] = result.quot;
282 cpu->gprs[1] = result.rem;
283 cpu->gprs[3] = abs(result.quot);
284 } else if (denom == 0) {
285 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
286 // If abs(num) > 1, this should hang, but that would be painful to
287 // emulate in HLE, and no game will get into a state where it hangs...
288 cpu->gprs[0] = (num < 0) ? -1 : 1;
289 cpu->gprs[1] = num;
290 cpu->gprs[3] = 1;
291 } else {
292 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide INT_MIN by -1!");
293 cpu->gprs[0] = INT32_MIN;
294 cpu->gprs[1] = 0;
295 cpu->gprs[3] = INT32_MIN;
296 }
297 int loops = clz32(denom) - clz32(num);
298 if (loops < 1) {
299 loops = 1;
300 }
301 cpu->cycles += 4 /* prologue */ + 13 * loops + 7 /* epilogue */;
302}
303
304static int16_t _ArcTan(int32_t i, int32_t* r1, int32_t* r3, int32_t* cycles) {
305 int currentCycles = 37;
306 currentCycles += _mulWait(i * i);
307 int32_t a = -((i * i) >> 14);
308 currentCycles += _mulWait(0xA9 * a);
309 int32_t b = ((0xA9 * a) >> 14) + 0x390;
310 currentCycles += _mulWait(b * a);
311 b = ((b * a) >> 14) + 0x91C;
312 currentCycles += _mulWait(b * a);
313 b = ((b * a) >> 14) + 0xFB6;
314 currentCycles += _mulWait(b * a);
315 b = ((b * a) >> 14) + 0x16AA;
316 currentCycles += _mulWait(b * a);
317 b = ((b * a) >> 14) + 0x2081;
318 currentCycles += _mulWait(b * a);
319 b = ((b * a) >> 14) + 0x3651;
320 currentCycles += _mulWait(b * a);
321 b = ((b * a) >> 14) + 0xA2F9;
322 if (r1) {
323 *r1 = a;
324 }
325 if (r3) {
326 *r3 = b;
327 }
328 *cycles += currentCycles;
329 return (i * b) >> 16;
330}
331
332static int16_t _ArcTan2(int32_t x, int32_t y, int32_t* r1, int32_t* cycles) {
333 if (!y) {
334 if (x >= 0) {
335 return 0;
336 }
337 return 0x8000;
338 }
339 if (!x) {
340 if (y >= 0) {
341 return 0x4000;
342 }
343 return 0xC000;
344 }
345 if (y >= 0) {
346 if (x >= 0) {
347 if (x >= y) {
348 return _ArcTan((y << 14) / x, r1, NULL, cycles);
349 }
350 } else if (-x >= y) {
351 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x8000;
352 }
353 return 0x4000 - _ArcTan((x << 14) / y, r1, NULL, cycles);
354 } else {
355 if (x <= 0) {
356 if (-x > -y) {
357 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x8000;
358 }
359 } else if (x >= -y) {
360 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x10000;
361 }
362 return 0xC000 - _ArcTan((x << 14) / y, r1, NULL, cycles);
363 }
364}
365
366static int32_t _Sqrt(uint32_t x, int32_t* cycles) {
367 if (!x) {
368 *cycles += 53;
369 return 0;
370 }
371 int32_t currentCycles = 15;
372 uint32_t lower;
373 uint32_t upper = x;
374 uint32_t bound = 1;
375 while (bound < upper) {
376 upper >>= 1;
377 bound <<= 1;
378 currentCycles += 6;
379 }
380 while (true) {
381 currentCycles += 6;
382 upper = x;
383 uint32_t accum = 0;
384 lower = bound;
385 while (true) {
386 currentCycles += 5;
387 uint32_t oldLower = lower;
388 if (lower <= upper >> 1) {
389 lower <<= 1;
390 }
391 if (oldLower >= upper >> 1) {
392 break;
393 }
394 }
395 while (true) {
396 currentCycles += 8;
397 accum <<= 1;
398 if (upper >= lower) {
399 ++accum;
400 upper -= lower;
401 }
402 if (lower == bound) {
403 break;
404 }
405 lower >>= 1;
406 }
407 uint32_t oldBound = bound;
408 bound += accum;
409 bound >>= 1;
410 if (bound >= oldBound) {
411 bound = oldBound;
412 break;
413 }
414 }
415 *cycles += currentCycles;
416 return bound;
417}
418
419void GBASwi16(struct ARMCore* cpu, int immediate) {
420 struct GBA* gba = (struct GBA*) cpu->master;
421 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
422 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
423
424 switch (immediate) {
425 case 0xFA:
426 GBAPrintFlush(gba);
427 return;
428 }
429
430 if (gba->memory.fullBios) {
431 ARMRaiseSWI(cpu);
432 return;
433 }
434 switch (immediate) {
435 case GBA_SWI_SOFT_RESET:
436 _SoftReset(gba);
437 break;
438 case GBA_SWI_REGISTER_RAM_RESET:
439 _RegisterRamReset(gba);
440 break;
441 case GBA_SWI_HALT:
442 ARMRaiseSWI(cpu);
443 return;
444 case GBA_SWI_STOP:
445 GBAStop(gba);
446 break;
447 case GBA_SWI_VBLANK_INTR_WAIT:
448 // VBlankIntrWait
449 // Fall through:
450 case GBA_SWI_INTR_WAIT:
451 // IntrWait
452 ARMRaiseSWI(cpu);
453 return;
454 case GBA_SWI_DIV:
455 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
456 break;
457 case GBA_SWI_DIV_ARM:
458 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
459 break;
460 case GBA_SWI_SQRT:
461 cpu->gprs[0] = _Sqrt(cpu->gprs[0], &cpu->cycles);
462 break;
463 case GBA_SWI_ARCTAN:
464 cpu->gprs[0] = _ArcTan(cpu->gprs[0], &cpu->gprs[1], &cpu->gprs[3], &cpu->cycles);
465 break;
466 case GBA_SWI_ARCTAN2:
467 cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1], &cpu->gprs[1], &cpu->cycles);
468 cpu->gprs[3] = 0x170;
469 break;
470 case GBA_SWI_CPU_SET:
471 case GBA_SWI_CPU_FAST_SET:
472 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
473 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
474 break;
475 }
476 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
477 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
478 }
479 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
480 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
481 }
482 ARMRaiseSWI(cpu);
483 return;
484 case GBA_SWI_GET_BIOS_CHECKSUM:
485 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
486 cpu->gprs[1] = 1;
487 cpu->gprs[3] = SIZE_BIOS;
488 break;
489 case GBA_SWI_BG_AFFINE_SET:
490 _BgAffineSet(gba);
491 break;
492 case GBA_SWI_OBJ_AFFINE_SET:
493 _ObjAffineSet(gba);
494 break;
495 case GBA_SWI_BIT_UNPACK:
496 if (cpu->gprs[0] < BASE_WORKING_RAM) {
497 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
498 break;
499 }
500 switch (cpu->gprs[1] >> BASE_OFFSET) {
501 default:
502 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
503 // Fall through
504 case REGION_WORKING_RAM:
505 case REGION_WORKING_IRAM:
506 case REGION_VRAM:
507 _unBitPack(gba);
508 break;
509 }
510 break;
511 case GBA_SWI_LZ77_UNCOMP_WRAM:
512 case GBA_SWI_LZ77_UNCOMP_VRAM:
513 if (cpu->gprs[0] < BASE_WORKING_RAM) {
514 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
515 break;
516 }
517 switch (cpu->gprs[1] >> BASE_OFFSET) {
518 default:
519 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
520 // Fall through
521 case REGION_WORKING_RAM:
522 case REGION_WORKING_IRAM:
523 case REGION_VRAM:
524 _unLz77(gba, immediate == GBA_SWI_LZ77_UNCOMP_WRAM ? 1 : 2);
525 break;
526 }
527 break;
528 case GBA_SWI_HUFFMAN_UNCOMP:
529 if (cpu->gprs[0] < BASE_WORKING_RAM) {
530 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
531 break;
532 }
533 switch (cpu->gprs[1] >> BASE_OFFSET) {
534 default:
535 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
536 // Fall through
537 case REGION_WORKING_RAM:
538 case REGION_WORKING_IRAM:
539 case REGION_VRAM:
540 _unHuffman(gba);
541 break;
542 }
543 break;
544 case GBA_SWI_RL_UNCOMP_WRAM:
545 case GBA_SWI_RL_UNCOMP_VRAM:
546 if (cpu->gprs[0] < BASE_WORKING_RAM) {
547 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
548 break;
549 }
550 switch (cpu->gprs[1] >> BASE_OFFSET) {
551 default:
552 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
553 // Fall through
554 case REGION_WORKING_RAM:
555 case REGION_WORKING_IRAM:
556 case REGION_VRAM:
557 _unRl(gba, immediate == GBA_SWI_RL_UNCOMP_WRAM ? 1 : 2);
558 break;
559 }
560 break;
561 case GBA_SWI_DIFF_8BIT_UNFILTER_WRAM:
562 case GBA_SWI_DIFF_8BIT_UNFILTER_VRAM:
563 case GBA_SWI_DIFF_16BIT_UNFILTER:
564 if (cpu->gprs[0] < BASE_WORKING_RAM) {
565 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
566 break;
567 }
568 switch (cpu->gprs[1] >> BASE_OFFSET) {
569 default:
570 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
571 // Fall through
572 case REGION_WORKING_RAM:
573 case REGION_WORKING_IRAM:
574 case REGION_VRAM:
575 _unFilter(gba, immediate == GBA_SWI_DIFF_16BIT_UNFILTER ? 2 : 1, immediate == GBA_SWI_DIFF_8BIT_UNFILTER_WRAM ? 1 : 2);
576 break;
577 }
578 break;
579 case GBA_SWI_SOUND_BIAS:
580 // SoundBias is mostly meaningless here
581 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
582 break;
583 case GBA_SWI_MIDI_KEY_2_FREQ:
584 _MidiKey2Freq(gba);
585 break;
586 case GBA_SWI_SOUND_DRIVER_GET_JUMP_LIST:
587 ARMRaiseSWI(cpu);
588 return;
589 default:
590 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
591 }
592 gba->cpu->cycles += 45 + cpu->memory.activeNonseqCycles16 /* 8 bit load for SWI # */;
593 // Return cycles
594 if (gba->cpu->executionMode == MODE_ARM) {
595 gba->cpu->cycles += cpu->memory.activeNonseqCycles32 + cpu->memory.activeSeqCycles32;
596 } else {
597 gba->cpu->cycles += cpu->memory.activeNonseqCycles16 + cpu->memory.activeSeqCycles16;
598 }
599 gba->memory.biosPrefetch = 0xE3A02004;
600}
601
602void GBASwi32(struct ARMCore* cpu, int immediate) {
603 GBASwi16(cpu, immediate >> 16);
604}
605
606uint32_t GBAChecksum(uint32_t* memory, size_t size) {
607 size_t i;
608 uint32_t sum = 0;
609 for (i = 0; i < size; i += 4) {
610 sum += memory[i >> 2];
611 }
612 return sum;
613}
614
615static void _unLz77(struct GBA* gba, int width) {
616 struct ARMCore* cpu = gba->cpu;
617 uint32_t source = cpu->gprs[0];
618 uint32_t dest = cpu->gprs[1];
619 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
620 // We assume the signature byte (0x10) is correct
621 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
622 source += 4;
623 int blocksRemaining = 0;
624 uint32_t disp;
625 int bytes;
626 int byte;
627 int halfword = 0;
628 while (remaining > 0) {
629 if (blocksRemaining) {
630 if (blockheader & 0x80) {
631 // Compressed
632 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
633 source += 2;
634 disp = dest - (block & 0x0FFF) - 1;
635 bytes = (block >> 12) + 3;
636 while (bytes--) {
637 if (remaining) {
638 --remaining;
639 }
640 if (width == 2) {
641 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
642 if (dest & 1) {
643 byte >>= (disp & 1) * 8;
644 halfword |= byte << 8;
645 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
646 } else {
647 byte >>= (disp & 1) * 8;
648 halfword = byte & 0xFF;
649 }
650 } else {
651 byte = cpu->memory.load8(cpu, disp, 0);
652 cpu->memory.store8(cpu, dest, byte, 0);
653 }
654 ++disp;
655 ++dest;
656 }
657 } else {
658 // Uncompressed
659 byte = cpu->memory.load8(cpu, source, 0);
660 ++source;
661 if (width == 2) {
662 if (dest & 1) {
663 halfword |= byte << 8;
664 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
665 } else {
666 halfword = byte;
667 }
668 } else {
669 cpu->memory.store8(cpu, dest, byte, 0);
670 }
671 ++dest;
672 --remaining;
673 }
674 blockheader <<= 1;
675 --blocksRemaining;
676 } else {
677 blockheader = cpu->memory.load8(cpu, source, 0);
678 ++source;
679 blocksRemaining = 8;
680 }
681 }
682 cpu->gprs[0] = source;
683 cpu->gprs[1] = dest;
684 cpu->gprs[3] = 0;
685}
686
687DECL_BITFIELD(HuffmanNode, uint8_t);
688DECL_BITS(HuffmanNode, Offset, 0, 6);
689DECL_BIT(HuffmanNode, RTerm, 6);
690DECL_BIT(HuffmanNode, LTerm, 7);
691
692static void _unHuffman(struct GBA* gba) {
693 struct ARMCore* cpu = gba->cpu;
694 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
695 uint32_t dest = cpu->gprs[1];
696 uint32_t header = cpu->memory.load32(cpu, source, 0);
697 int remaining = header >> 8;
698 unsigned bits = header & 0xF;
699 if (bits == 0) {
700 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
701 bits = 8;
702 }
703 if (32 % bits || bits == 1) {
704 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
705 return;
706 }
707 // We assume the signature byte (0x20) is correct
708 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
709 int block = 0;
710 uint32_t treeBase = source + 5;
711 source += 5 + treesize;
712 uint32_t nPointer = treeBase;
713 HuffmanNode node;
714 int bitsRemaining;
715 int readBits;
716 int bitsSeen = 0;
717 node = cpu->memory.load8(cpu, nPointer, 0);
718 while (remaining > 0) {
719 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
720 source += 4;
721 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
722 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
723 if (bitstream & 0x80000000) {
724 // Go right
725 if (HuffmanNodeIsRTerm(node)) {
726 readBits = cpu->memory.load8(cpu, next + 1, 0);
727 } else {
728 nPointer = next + 1;
729 node = cpu->memory.load8(cpu, nPointer, 0);
730 continue;
731 }
732 } else {
733 // Go left
734 if (HuffmanNodeIsLTerm(node)) {
735 readBits = cpu->memory.load8(cpu, next, 0);
736 } else {
737 nPointer = next;
738 node = cpu->memory.load8(cpu, nPointer, 0);
739 continue;
740 }
741 }
742
743 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
744 bitsSeen += bits;
745 nPointer = treeBase;
746 node = cpu->memory.load8(cpu, nPointer, 0);
747 if (bitsSeen == 32) {
748 bitsSeen = 0;
749 cpu->memory.store32(cpu, dest, block, 0);
750 dest += 4;
751 remaining -= 4;
752 block = 0;
753 }
754 }
755 }
756 cpu->gprs[0] = source;
757 cpu->gprs[1] = dest;
758}
759
760static void _unRl(struct GBA* gba, int width) {
761 struct ARMCore* cpu = gba->cpu;
762 uint32_t source = cpu->gprs[0];
763 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
764 int padding = (4 - remaining) & 0x3;
765 // We assume the signature byte (0x30) is correct
766 int blockheader;
767 int block;
768 source += 4;
769 uint32_t dest = cpu->gprs[1];
770 int halfword = 0;
771 while (remaining > 0) {
772 blockheader = cpu->memory.load8(cpu, source, 0);
773 ++source;
774 if (blockheader & 0x80) {
775 // Compressed
776 blockheader &= 0x7F;
777 blockheader += 3;
778 block = cpu->memory.load8(cpu, source, 0);
779 ++source;
780 while (blockheader-- && remaining) {
781 --remaining;
782 if (width == 2) {
783 if (dest & 1) {
784 halfword |= block << 8;
785 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
786 } else {
787 halfword = block;
788 }
789 } else {
790 cpu->memory.store8(cpu, dest, block, 0);
791 }
792 ++dest;
793 }
794 } else {
795 // Uncompressed
796 blockheader++;
797 while (blockheader-- && remaining) {
798 --remaining;
799 int byte = cpu->memory.load8(cpu, source, 0);
800 ++source;
801 if (width == 2) {
802 if (dest & 1) {
803 halfword |= byte << 8;
804 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
805 } else {
806 halfword = byte;
807 }
808 } else {
809 cpu->memory.store8(cpu, dest, byte, 0);
810 }
811 ++dest;
812 }
813 }
814 }
815 if (width == 2) {
816 if (dest & 1) {
817 --padding;
818 ++dest;
819 }
820 for (; padding > 0; padding -= 2, dest += 2) {
821 cpu->memory.store16(cpu, dest, 0, 0);
822 }
823 } else {
824 while (padding--) {
825 cpu->memory.store8(cpu, dest, 0, 0);
826 ++dest;
827 }
828 }
829 cpu->gprs[0] = source;
830 cpu->gprs[1] = dest;
831}
832
833static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
834 struct ARMCore* cpu = gba->cpu;
835 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
836 uint32_t dest = cpu->gprs[1];
837 uint32_t header = cpu->memory.load32(cpu, source, 0);
838 int remaining = header >> 8;
839 // We assume the signature nybble (0x8) is correct
840 uint16_t halfword = 0;
841 uint16_t old = 0;
842 source += 4;
843 while (remaining > 0) {
844 uint16_t new;
845 if (inwidth == 1) {
846 new = cpu->memory.load8(cpu, source, 0);
847 } else {
848 new = cpu->memory.load16(cpu, source, 0);
849 }
850 new += old;
851 if (outwidth > inwidth) {
852 halfword >>= 8;
853 halfword |= (new << 8);
854 if (source & 1) {
855 cpu->memory.store16(cpu, dest, halfword, 0);
856 dest += outwidth;
857 remaining -= outwidth;
858 }
859 } else if (outwidth == 1) {
860 cpu->memory.store8(cpu, dest, new, 0);
861 dest += outwidth;
862 remaining -= outwidth;
863 } else {
864 cpu->memory.store16(cpu, dest, new, 0);
865 dest += outwidth;
866 remaining -= outwidth;
867 }
868 old = new;
869 source += inwidth;
870 }
871 cpu->gprs[0] = source;
872 cpu->gprs[1] = dest;
873}
874
875static void _unBitPack(struct GBA* gba) {
876 struct ARMCore* cpu = gba->cpu;
877 uint32_t source = cpu->gprs[0];
878 uint32_t dest = cpu->gprs[1];
879 uint32_t info = cpu->gprs[2];
880 unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
881 unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
882 unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
883 switch (sourceWidth) {
884 case 1:
885 case 2:
886 case 4:
887 case 8:
888 break;
889 default:
890 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
891 return;
892 }
893 switch (destWidth) {
894 case 1:
895 case 2:
896 case 4:
897 case 8:
898 case 16:
899 case 32:
900 break;
901 default:
902 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
903 return;
904 }
905 uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
906 uint8_t in = 0;
907 uint32_t out = 0;
908 int bitsRemaining = 0;
909 int bitsEaten = 0;
910 while (sourceLen > 0 || bitsRemaining) {
911 if (!bitsRemaining) {
912 in = cpu->memory.load8(cpu, source, 0);
913 bitsRemaining = 8;
914 ++source;
915 --sourceLen;
916 }
917 unsigned scaled = in & ((1 << sourceWidth) - 1);
918 in >>= sourceWidth;
919 if (scaled || bias & 0x80000000) {
920 scaled += bias & 0x7FFFFFFF;
921 }
922 bitsRemaining -= sourceWidth;
923 out |= scaled << bitsEaten;
924 bitsEaten += destWidth;
925 if (bitsEaten == 32) {
926 cpu->memory.store32(cpu, dest, out, 0);
927 bitsEaten = 0;
928 out = 0;
929 dest += 4;
930 }
931 }
932 cpu->gprs[0] = source;
933 cpu->gprs[1] = dest;
934}