1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include "memory.h"
  7
  8#include "gb/gb.h"
  9
 10#include "util/memory.h"
 11
 12static void GBSetActiveRegion(struct LR35902Core* cpu, uint16_t address) {
 13	// TODO
 14}
 15
 16void GBMemoryInit(struct GB* gb) {
 17	struct LR35902Core* cpu = gb->cpu;
 18	cpu->memory.load16 = GBLoad16;
 19	cpu->memory.load8 = GBLoad8;
 20	cpu->memory.store16 = GBStore16;
 21	cpu->memory.store8 = GBStore8;
 22	cpu->memory.setActiveRegion = GBSetActiveRegion;
 23
 24	gb->memory.wram = 0;
 25	gb->memory.wramBank = 0;
 26	gb->memory.rom = 0;
 27	gb->memory.romBank = 0;
 28	gb->memory.romSize = 0;
 29}
 30
 31void GBMemoryDeinit(struct GB* gb) {
 32	mappedMemoryFree(gb->memory.wram, GB_SIZE_WORKING_RAM);
 33	if (gb->memory.rom) {
 34		mappedMemoryFree(gb->memory.rom, gb->memory.romSize);
 35	}
 36}
 37
 38void GBMemoryReset(struct GB* gb) {
 39	if (gb->memory.wram) {
 40		mappedMemoryFree(gb->memory.wram, GB_SIZE_WORKING_RAM);
 41	}
 42	gb->memory.wram = anonymousMemoryMap(GB_SIZE_WORKING_RAM);
 43	gb->memory.wramBank = &gb->memory.wram[GB_SIZE_WORKING_RAM_BANK0];
 44	gb->memory.romBank = &gb->memory.rom[GB_BASE_CART_BANK0];
 45
 46	if (!gb->memory.wram) {
 47		GBMemoryDeinit(gb);
 48	}
 49}
 50
 51uint16_t GBLoad16(struct LR35902Core* cpu, uint16_t address) {
 52	// TODO
 53}
 54
 55uint8_t GBLoad8(struct LR35902Core* cpu, uint16_t address) {
 56	struct GB* gb = (struct GB*) cpu->master;
 57	struct GBMemory* memory = &gb->memory;
 58	switch (address >> 12) {
 59	case GB_REGION_CART_BANK0:
 60	case GB_REGION_CART_BANK0 + 1:
 61	case GB_REGION_CART_BANK0 + 2:
 62	case GB_REGION_CART_BANK0 + 3:
 63		return memory->rom[address & (GB_SIZE_CART_BANK0 - 1)];
 64	case GB_REGION_CART_BANK1:
 65	case GB_REGION_CART_BANK1 + 1:
 66	case GB_REGION_CART_BANK1 + 2:
 67	case GB_REGION_CART_BANK1 + 3:
 68		return memory->romBank[address & (GB_SIZE_CART_BANK0 - 1)];
 69	case GB_REGION_VRAM:
 70	case GB_REGION_VRAM + 1:
 71		// TODO
 72		return 0;
 73	case GB_REGION_EXTERNAL_RAM:
 74	case GB_REGION_EXTERNAL_RAM + 1:
 75		// TODO
 76		return 0;
 77	case GB_REGION_WORKING_RAM_BANK0:
 78	case GB_REGION_WORKING_RAM_BANK0 + 2:
 79		return memory->wram[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)];
 80	case GB_REGION_WORKING_RAM_BANK1:
 81		return memory->wramBank[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)];
 82	default:
 83		// TODO
 84		return 0;
 85	}
 86}
 87
 88void GBStore16(struct LR35902Core* cpu, uint16_t address, int16_t value) {
 89	// TODO
 90}
 91
 92void GBStore8(struct LR35902Core* cpu, uint16_t address, int8_t value) {
 93	struct GB* gb = (struct GB*) cpu->master;
 94	struct GBMemory* memory = &gb->memory;
 95	switch (address >> 12) {
 96	case GB_REGION_CART_BANK0:
 97	case GB_REGION_CART_BANK0 + 1:
 98	case GB_REGION_CART_BANK0 + 2:
 99	case GB_REGION_CART_BANK0 + 3:
100		// TODO
101		return;
102	case GB_REGION_CART_BANK1:
103	case GB_REGION_CART_BANK1 + 1:
104	case GB_REGION_CART_BANK1 + 2:
105	case GB_REGION_CART_BANK1 + 3:
106		// TODO
107		return;
108	case GB_REGION_VRAM:
109	case GB_REGION_VRAM + 1:
110		// TODO
111		return;
112	case GB_REGION_EXTERNAL_RAM:
113	case GB_REGION_EXTERNAL_RAM + 1:
114		// TODO
115		return;
116	case GB_REGION_WORKING_RAM_BANK0:
117	case GB_REGION_WORKING_RAM_BANK0 + 2:
118		memory->wram[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)] = value;
119		return;
120	case GB_REGION_WORKING_RAM_BANK1:
121		memory->wramBank[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)] = value;
122		return;
123	default:
124		// TODO
125		return;
126	}
127}
128
129uint16_t GBView16(struct LR35902Core* cpu, uint16_t address);
130uint8_t GBView8(struct LR35902Core* cpu, uint16_t address);
131
132void GBPatch16(struct LR35902Core* cpu, uint16_t address, int16_t value, int16_t* old);
133void GBPatch8(struct LR35902Core* cpu, uint16_t address, int8_t value, int8_t* old);