1#define nop andeq r0, r0
  2
  3.text
  4
  5b resetBase
  6b undefBase
  7b swiBase
  8b pabtBase
  9b dabtBase
 10nop
 11b irqBase
 12b fiqBase
 13
 14resetBase:
 15mov pc, #0x8000000
 16
 17swiBase:
 18cmp    sp, #0
 19moveq  sp, #0x04000000
 20subeq  sp, #0x20
 21stmfd  sp!, {r11-r12, lr}
 22ldrb   r11, [lr, #-2]
 23mov    r12, #swiTable
 24ldr    r11, [r12, r11, lsl #2]
 25cmp    r11, #0
 26mrs    r12, spsr
 27stmfd  sp!, {r12}
 28and    r12, #0x80
 29orr    r12, #0x1F
 30msr    cpsr, r12
 31stmfd  sp!, {lr}
 32mov    lr, pc
 33bxne   r11
 34ldmfd  sp!, {lr}
 35msr    cpsr, #0x93
 36ldmfd  sp!, {r12}
 37msr    spsr, r12
 38ldmfd  sp!, {r11-r12, lr}
 39movs   pc, lr
 40
 41swiTable:
 42.word SoftReset
 43.word RegisterRamReset
 44.word Halt
 45.word Stop
 46.word IntrWait
 47.word VBlankIntrWait
 48.word Div
 49.word DivArm
 50.word Sqrt
 51.word ArcTan
 52.word ArcTan2
 53.word CpuSet
 54.word CpuFastSet
 55# ... The rest of this table isn't needed if the rest aren't implemented
 56
 57irqBase:
 58stmfd  sp!, {r0-r3, r12, lr}
 59mov    r0, #0x04000000
 60add    lr, pc, #0
 61ldr    pc, [r0, #-4]
 62ldmfd  sp!, {r0-r3, r12, lr}
 63subs   pc, lr, #4
 64
 65VBlankIntrWait:
 66mov    r0, #1
 67mov    r1, #1
 68IntrWait:
 69stmfd  sp!, {r2-r3, lr}
 70mov    r12, #0x04000000
 71# See if we want to return immediately
 72cmp    r0, #0
 73mov    r0, #0
 74mov    r2, #1
 75beq    1f
 76ldrh   r3, [r12, #-8]
 77bic    r3, r1
 78strh   r3, [r12, #-8]
 79# Halt
 800:
 81strb   r0, [r12, #0x301]
 821:
 83# Check which interrupts were acknowledged
 84strb   r0, [r12, #0x208]
 85ldrh   r3, [r12, #-8]
 86ands   r3, r1
 87eorne  r3, r1
 88strneh r3, [r12, #-8]
 89strb   r2, [r12, #0x208]
 90beq    0b
 91ldmfd  sp!, {r2-r3, pc}
 92
 93CpuSet:
 94stmfd  sp!, {lr}
 95mov    r3, r2, lsl #12
 96tst    r2, #0x01000000
 97beq    0f
 98# Fill
 99tst    r2, #0x04000000
100beq    1f
101# Word
102add    r3, r1, r3, lsr #10
103ldmia  r0!, {r2}
1042:
105cmp    r1, r3
106stmltia  r1!, {r2}
107blt    2b
108b      3f
109# Halfword
1101:
111bic    r0, #1
112bic    r1, #1
113add    r3, r1, r3, lsr #11
114ldrh   r2, [r0]
1152:
116cmp    r1, r3
117strlth r2, [r1], #2
118blt    2b
119b      3f
120# Copy
1210:
122tst    r2, #0x04000000
123beq    1f
124# Word
125add    r3, r1, r3, lsr #10
1262:
127cmp    r1, r3
128ldmltia r0!, {r2}
129stmltia r1!, {r2}
130blt    2b
131b      3f
132# Halfword
1331:
134add    r3, r1, r3, lsr #11
135bic    r0, #1
136bic    r1, #1
1372:
138cmp    r1, r3
139ldrlth r2, [r0], #2
140strlth r2, [r1], #2
141blt    2b
1423:
143ldmfd  sp!, {pc}
144
145CpuFastSet:
146stmfd  sp!, {r4-r10, lr}
147tst    r2, #0x01000000
148mov    r3, r2, lsl #12
149add    r2, r1, r3, lsr #10
150beq    0f
151# Fill
152ldr    r3, [r0]
153mov    r4, r3
154mov    r5, r3
155mov    r6, r3
156mov    r7, r3
157mov    r8, r3
158mov    r9, r3
159mov    r10, r3
1601:
161cmp    r1, r2
162stmltia r1!, {r3-r10}
163blt    1b
164b      2f
165# Copy
1660:
167cmp    r1, r2
168ldmltia r0!, {r3-r10}
169stmltia r1!, {r3-r10}
170blt    0b
1712:
172ldmfd  sp!, {r4-r10, pc}