1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#ifndef GBA_MEMORY_H
  7#define GBA_MEMORY_H
  8
  9#include <mgba-util/common.h>
 10
 11CXX_GUARD_START
 12
 13#include <mgba/core/timing.h>
 14
 15#include <mgba/internal/arm/arm.h>
 16#include <mgba/internal/gba/dma.h>
 17#include <mgba/internal/gba/hardware.h>
 18#include <mgba/internal/gba/savedata.h>
 19#include <mgba/internal/gba/vfame.h>
 20
 21enum GBAMemoryRegion {
 22	REGION_BIOS = 0x0,
 23	REGION_WORKING_RAM = 0x2,
 24	REGION_WORKING_IRAM = 0x3,
 25	REGION_IO = 0x4,
 26	REGION_PALETTE_RAM = 0x5,
 27	REGION_VRAM = 0x6,
 28	REGION_OAM = 0x7,
 29	REGION_CART0 = 0x8,
 30	REGION_CART0_EX = 0x9,
 31	REGION_CART1 = 0xA,
 32	REGION_CART1_EX = 0xB,
 33	REGION_CART2 = 0xC,
 34	REGION_CART2_EX = 0xD,
 35	REGION_CART_SRAM = 0xE,
 36	REGION_CART_SRAM_MIRROR = 0xF
 37};
 38
 39enum GBAMemoryBase {
 40	BASE_BIOS = 0x00000000,
 41	BASE_WORKING_RAM = 0x02000000,
 42	BASE_WORKING_IRAM = 0x03000000,
 43	BASE_IO = 0x04000000,
 44	BASE_PALETTE_RAM = 0x05000000,
 45	BASE_VRAM = 0x06000000,
 46	BASE_OAM = 0x07000000,
 47	BASE_CART0 = 0x08000000,
 48	BASE_CART0_EX = 0x09000000,
 49	BASE_CART1 = 0x0A000000,
 50	BASE_CART1_EX = 0x0B000000,
 51	BASE_CART2 = 0x0C000000,
 52	BASE_CART2_EX = 0x0D000000,
 53	BASE_CART_SRAM = 0x0E000000,
 54	BASE_CART_SRAM_MIRROR = 0x0F000000
 55};
 56
 57enum {
 58	SIZE_BIOS = 0x00004000,
 59	SIZE_WORKING_RAM = 0x00040000,
 60	SIZE_WORKING_IRAM = 0x00008000,
 61	SIZE_IO = 0x00000400,
 62	SIZE_PALETTE_RAM = 0x00000400,
 63	SIZE_VRAM = 0x00018000,
 64	SIZE_OAM = 0x00000400,
 65	SIZE_CART0 = 0x02000000,
 66	SIZE_CART1 = 0x02000000,
 67	SIZE_CART2 = 0x02000000,
 68	SIZE_CART_SRAM = 0x00008000,
 69	SIZE_CART_FLASH512 = 0x00010000,
 70	SIZE_CART_FLASH1M = 0x00020000,
 71	SIZE_CART_EEPROM = 0x00002000,
 72	SIZE_CART_EEPROM512 = 0x00000200
 73};
 74
 75enum {
 76	OFFSET_MASK = 0x00FFFFFF,
 77	BASE_OFFSET = 24
 78};
 79
 80mLOG_DECLARE_CATEGORY(GBA_MEM);
 81
 82struct GBAMemory {
 83	uint32_t* bios;
 84	uint32_t* wram;
 85	uint32_t* iwram;
 86	uint32_t* rom;
 87	uint16_t io[512];
 88
 89	struct GBACartridgeHardware hw;
 90	struct GBASavedata savedata;
 91	struct GBAVFameCart vfame;
 92	size_t romSize;
 93	uint32_t romMask;
 94	uint16_t romID;
 95	int fullBios;
 96
 97	char waitstatesSeq32[256];
 98	char waitstatesSeq16[256];
 99	char waitstatesNonseq32[256];
100	char waitstatesNonseq16[256];
101	int activeRegion;
102	bool prefetch;
103	uint32_t lastPrefetchedPc;
104	uint32_t biosPrefetch;
105
106	struct GBADMA dma[4];
107	struct mTimingEvent dmaEvent;
108	int activeDMA;
109	uint32_t dmaTransferRegister;
110
111	bool mirroring;
112};
113
114struct GBA;
115void GBAMemoryInit(struct GBA* gba);
116void GBAMemoryDeinit(struct GBA* gba);
117
118void GBAMemoryReset(struct GBA* gba);
119
120uint32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
121uint32_t GBALoad16(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
122uint32_t GBALoad8(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
123
124uint32_t GBALoadBad(struct ARMCore* cpu);
125
126void GBAStore32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycleCounter);
127void GBAStore16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycleCounter);
128void GBAStore8(struct ARMCore* cpu, uint32_t address, int8_t value, int* cycleCounter);
129
130uint32_t GBAView32(struct ARMCore* cpu, uint32_t address);
131uint16_t GBAView16(struct ARMCore* cpu, uint32_t address);
132uint8_t GBAView8(struct ARMCore* cpu, uint32_t address);
133
134void GBAPatch32(struct ARMCore* cpu, uint32_t address, int32_t value, int32_t* old);
135void GBAPatch16(struct ARMCore* cpu, uint32_t address, int16_t value, int16_t* old);
136void GBAPatch8(struct ARMCore* cpu, uint32_t address, int8_t value, int8_t* old);
137
138uint32_t GBALoadMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction,
139                         int* cycleCounter);
140uint32_t GBAStoreMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction,
141                          int* cycleCounter);
142
143void GBAAdjustWaitstates(struct GBA* gba, uint16_t parameters);
144
145struct GBASerializedState;
146void GBAMemorySerialize(const struct GBAMemory* memory, struct GBASerializedState* state);
147void GBAMemoryDeserialize(struct GBAMemory* memory, const struct GBASerializedState* state);
148
149CXX_GUARD_END
150
151#endif