src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include "bios.h"
7
8#include "arm/isa-inlines.h"
9#include "arm/macros.h"
10#include "gba/gba.h"
11#include "gba/io.h"
12#include "gba/memory.h"
13
14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
16
17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS");
18
19static void _unLz77(struct GBA* gba, int width);
20static void _unHuffman(struct GBA* gba);
21static void _unRl(struct GBA* gba, int width);
22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
23
24static void _SoftReset(struct GBA* gba) {
25 struct ARMCore* cpu = gba->cpu;
26 ARMSetPrivilegeMode(cpu, MODE_IRQ);
27 cpu->spsr.packed = 0;
28 cpu->gprs[ARM_LR] = 0;
29 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
30 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
31 cpu->spsr.packed = 0;
32 cpu->gprs[ARM_LR] = 0;
33 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
34 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
35 cpu->gprs[ARM_LR] = 0;
36 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
37 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
38 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
39 if (flag) {
40 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
41 } else {
42 cpu->gprs[ARM_PC] = BASE_CART0;
43 }
44 _ARMSetMode(cpu, MODE_ARM);
45 int currentCycles = 0;
46 ARM_WRITE_PC;
47}
48
49static void _RegisterRamReset(struct GBA* gba) {
50 uint32_t registers = gba->cpu->gprs[0];
51 struct ARMCore* cpu = gba->cpu;
52 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
53 if (registers & 0x01) {
54 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
55 }
56 if (registers & 0x02) {
57 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
58 }
59 if (registers & 0x04) {
60 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
61 }
62 if (registers & 0x08) {
63 memset(gba->video.renderer->vram, 0, SIZE_VRAM);
64 }
65 if (registers & 0x10) {
66 memset(gba->video.oam.raw, 0, SIZE_OAM);
67 }
68 if (registers & 0x20) {
69 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
70 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
71 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
72 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
73 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
74 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
75 }
76 if (registers & 0x40) {
77 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
78 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
79 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
80 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
81 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
82 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
86 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
87 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
88 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
89 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
91 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
92 }
93 if (registers & 0x80) {
94 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
104 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
105 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
106 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
107 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
112 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
113 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
114 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
118 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
119 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
122 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
125 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
126 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
128 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
131 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
132 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
165 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
166 }
167}
168
169static void _BgAffineSet(struct GBA* gba) {
170 struct ARMCore* cpu = gba->cpu;
171 int i = cpu->gprs[2];
172 float ox, oy;
173 float cx, cy;
174 float sx, sy;
175 float theta;
176 int offset = cpu->gprs[0];
177 int destination = cpu->gprs[1];
178 float a, b, c, d;
179 float rx, ry;
180 while (i--) {
181 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
182 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
183 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
184 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
185 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
186 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
187 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
188 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
189 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
190 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
191 offset += 20;
192 // Rotation
193 a = d = cosf(theta);
194 b = c = sinf(theta);
195 // Scale
196 a *= sx;
197 b *= -sx;
198 c *= sy;
199 d *= sy;
200 // Translate
201 rx = ox - (a * cx + b * cy);
202 ry = oy - (c * cx + d * cy);
203 cpu->memory.store16(cpu, destination, a * 256, 0);
204 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
205 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
206 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
207 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
208 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
209 destination += 16;
210 }
211}
212
213static void _ObjAffineSet(struct GBA* gba) {
214 struct ARMCore* cpu = gba->cpu;
215 int i = cpu->gprs[2];
216 float sx, sy;
217 float theta;
218 int offset = cpu->gprs[0];
219 int destination = cpu->gprs[1];
220 int diff = cpu->gprs[3];
221 float a, b, c, d;
222 while (i--) {
223 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
224 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
225 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
226 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
227 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
228 offset += 8;
229 // Rotation
230 a = d = cosf(theta);
231 b = c = sinf(theta);
232 // Scale
233 a *= sx;
234 b *= -sx;
235 c *= sy;
236 d *= sy;
237 cpu->memory.store16(cpu, destination, a * 256, 0);
238 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
239 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
240 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
241 destination += diff * 4;
242 }
243}
244
245static void _MidiKey2Freq(struct GBA* gba) {
246 struct ARMCore* cpu = gba->cpu;
247 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
248 cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
249}
250
251static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
252 struct ARMCore* cpu = gba->cpu;
253 if (denom != 0) {
254 div_t result = div(num, denom);
255 cpu->gprs[0] = result.quot;
256 cpu->gprs[1] = result.rem;
257 cpu->gprs[3] = abs(result.quot);
258 } else {
259 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
260 // If abs(num) > 1, this should hang, but that would be painful to
261 // emulate in HLE, and no game will get into a state where it hangs...
262 cpu->gprs[0] = (num < 0) ? -1 : 1;
263 cpu->gprs[1] = num;
264 cpu->gprs[3] = 1;
265 }
266}
267
268static int16_t _ArcTan(int16_t i) {
269 int32_t a = -((i * i) >> 14);
270 int32_t b = ((0xA9 * a) >> 14) + 0x390;
271 b = ((b * a) >> 14) + 0x91C;
272 b = ((b * a) >> 14) + 0xFB6;
273 b = ((b * a) >> 14) + 0x16AA;
274 b = ((b * a) >> 14) + 0x2081;
275 b = ((b * a) >> 14) + 0x3651;
276 b = ((b * a) >> 14) + 0xA2F9;
277 return (i * b) >> 16;
278}
279
280static int16_t _ArcTan2(int16_t x, int16_t y) {
281 if (!y) {
282 if (x >= 0) {
283 return 0;
284 }
285 return 0x8000;
286 }
287 if (!x) {
288 if (y >= 0) {
289 return 0x4000;
290 }
291 return 0xC000;
292 }
293 if (y >= 0) {
294 if (x >= 0) {
295 if (x >= y) {
296 return _ArcTan((y << 14)/ x);
297 }
298 } else if (-x >= y) {
299 return _ArcTan((y << 14) / x) + 0x8000;
300 }
301 return 0x4000 - _ArcTan((x << 14) / y);
302 } else {
303 if (x <= 0) {
304 if (-x > -y) {
305 return _ArcTan((y << 14) / x) + 0x8000;
306 }
307 } else if (x >= -y) {
308 return _ArcTan((y << 14) / x) + 0x10000;
309 }
310 return 0xC000 - _ArcTan((x << 14 / y));
311 }
312}
313
314void GBASwi16(struct ARMCore* cpu, int immediate) {
315 struct GBA* gba = (struct GBA*) cpu->master;
316 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
317 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
318
319 if (gba->memory.fullBios) {
320 ARMRaiseSWI(cpu);
321 return;
322 }
323 switch (immediate) {
324 case 0x0:
325 _SoftReset(gba);
326 break;
327 case 0x1:
328 _RegisterRamReset(gba);
329 break;
330 case 0x2:
331 GBAHalt(gba);
332 break;
333 case 0x3:
334 GBAStop(gba);
335 break;
336 case 0x05:
337 // VBlankIntrWait
338 // Fall through:
339 case 0x04:
340 // IntrWait
341 ARMRaiseSWI(cpu);
342 break;
343 case 0x6:
344 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
345 break;
346 case 0x7:
347 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
348 break;
349 case 0x8:
350 cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
351 break;
352 case 0x9:
353 cpu->gprs[0] = _ArcTan(cpu->gprs[0]);
354 case 0xA:
355 cpu->gprs[0] = _ArcTan2(cpu->gprs[0], cpu->gprs[1]);
356 break;
357 case 0xB:
358 case 0xC:
359 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
360 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
361 return;
362 }
363 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
364 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
365 }
366 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
367 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
368 }
369 ARMRaiseSWI(cpu);
370 break;
371 case 0xD:
372 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
373 cpu->gprs[1] = 1;
374 cpu->gprs[3] = SIZE_BIOS;
375 break;
376 case 0xE:
377 _BgAffineSet(gba);
378 break;
379 case 0xF:
380 _ObjAffineSet(gba);
381 break;
382 case 0x11:
383 case 0x12:
384 if (cpu->gprs[0] < BASE_WORKING_RAM) {
385 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
386 break;
387 }
388 switch (cpu->gprs[1] >> BASE_OFFSET) {
389 default:
390 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
391 // Fall through
392 case REGION_WORKING_RAM:
393 case REGION_WORKING_IRAM:
394 case REGION_VRAM:
395 _unLz77(gba, immediate == 0x11 ? 1 : 2);
396 break;
397 }
398 break;
399 case 0x13:
400 if (cpu->gprs[0] < BASE_WORKING_RAM) {
401 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
402 break;
403 }
404 switch (cpu->gprs[1] >> BASE_OFFSET) {
405 default:
406 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
407 // Fall through
408 case REGION_WORKING_RAM:
409 case REGION_WORKING_IRAM:
410 case REGION_VRAM:
411 _unHuffman(gba);
412 break;
413 }
414 break;
415 case 0x14:
416 case 0x15:
417 if (cpu->gprs[0] < BASE_WORKING_RAM) {
418 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
419 break;
420 }
421 switch (cpu->gprs[1] >> BASE_OFFSET) {
422 default:
423 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
424 // Fall through
425 case REGION_WORKING_RAM:
426 case REGION_WORKING_IRAM:
427 case REGION_VRAM:
428 _unRl(gba, immediate == 0x14 ? 1 : 2);
429 break;
430 }
431 break;
432 case 0x16:
433 case 0x17:
434 case 0x18:
435 if (cpu->gprs[0] < BASE_WORKING_RAM) {
436 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
437 break;
438 }
439 switch (cpu->gprs[1] >> BASE_OFFSET) {
440 default:
441 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
442 // Fall through
443 case REGION_WORKING_RAM:
444 case REGION_WORKING_IRAM:
445 case REGION_VRAM:
446 _unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
447 break;
448 }
449 break;
450 case 0x19:
451 // SoundBias is mostly meaningless here
452 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
453 break;
454 case 0x1F:
455 _MidiKey2Freq(gba);
456 break;
457 default:
458 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
459 }
460 gba->memory.biosPrefetch = 0xE3A02004;
461}
462
463void GBASwi32(struct ARMCore* cpu, int immediate) {
464 GBASwi16(cpu, immediate >> 16);
465}
466
467uint32_t GBAChecksum(uint32_t* memory, size_t size) {
468 size_t i;
469 uint32_t sum = 0;
470 for (i = 0; i < size; i += 4) {
471 sum += memory[i >> 2];
472 }
473 return sum;
474}
475
476static void _unLz77(struct GBA* gba, int width) {
477 struct ARMCore* cpu = gba->cpu;
478 uint32_t source = cpu->gprs[0];
479 uint32_t dest = cpu->gprs[1];
480 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
481 // We assume the signature byte (0x10) is correct
482 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
483 source += 4;
484 int blocksRemaining = 0;
485 uint32_t disp;
486 int bytes;
487 int byte;
488 int halfword = 0;
489 while (remaining > 0) {
490 if (blocksRemaining) {
491 if (blockheader & 0x80) {
492 // Compressed
493 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
494 source += 2;
495 disp = dest - (block & 0x0FFF) - 1;
496 bytes = (block >> 12) + 3;
497 while (bytes-- && remaining) {
498 --remaining;
499 if (width == 2) {
500 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
501 if (dest & 1) {
502 byte >>= (disp & 1) * 8;
503 halfword |= byte << 8;
504 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
505 } else {
506 byte >>= (disp & 1) * 8;
507 halfword = byte & 0xFF;
508 }
509 } else {
510 byte = cpu->memory.load8(cpu, disp, 0);
511 cpu->memory.store8(cpu, dest, byte, 0);
512 }
513 ++disp;
514 ++dest;
515 }
516 } else {
517 // Uncompressed
518 byte = cpu->memory.load8(cpu, source, 0);
519 ++source;
520 if (width == 2) {
521 if (dest & 1) {
522 halfword |= byte << 8;
523 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
524 } else {
525 halfword = byte;
526 }
527 } else {
528 cpu->memory.store8(cpu, dest, byte, 0);
529 }
530 ++dest;
531 --remaining;
532 }
533 blockheader <<= 1;
534 --blocksRemaining;
535 } else {
536 blockheader = cpu->memory.load8(cpu, source, 0);
537 ++source;
538 blocksRemaining = 8;
539 }
540 }
541 cpu->gprs[0] = source;
542 cpu->gprs[1] = dest;
543 cpu->gprs[3] = 0;
544}
545
546DECL_BITFIELD(HuffmanNode, uint8_t);
547DECL_BITS(HuffmanNode, Offset, 0, 6);
548DECL_BIT(HuffmanNode, RTerm, 6);
549DECL_BIT(HuffmanNode, LTerm, 7);
550
551static void _unHuffman(struct GBA* gba) {
552 struct ARMCore* cpu = gba->cpu;
553 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
554 uint32_t dest = cpu->gprs[1];
555 uint32_t header = cpu->memory.load32(cpu, source, 0);
556 int remaining = header >> 8;
557 int bits = header & 0xF;
558 if (bits == 0) {
559 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
560 bits = 8;
561 }
562 if (32 % bits || bits == 1) {
563 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
564 return;
565 }
566 // We assume the signature byte (0x20) is correct
567 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
568 int block = 0;
569 uint32_t treeBase = source + 5;
570 source += 5 + treesize;
571 uint32_t nPointer = treeBase;
572 HuffmanNode node;
573 int bitsRemaining;
574 int readBits;
575 int bitsSeen = 0;
576 node = cpu->memory.load8(cpu, nPointer, 0);
577 while (remaining > 0) {
578 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
579 source += 4;
580 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
581 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
582 if (bitstream & 0x80000000) {
583 // Go right
584 if (HuffmanNodeIsRTerm(node)) {
585 readBits = cpu->memory.load8(cpu, next + 1, 0);
586 } else {
587 nPointer = next + 1;
588 node = cpu->memory.load8(cpu, nPointer, 0);
589 continue;
590 }
591 } else {
592 // Go left
593 if (HuffmanNodeIsLTerm(node)) {
594 readBits = cpu->memory.load8(cpu, next, 0);
595 } else {
596 nPointer = next;
597 node = cpu->memory.load8(cpu, nPointer, 0);
598 continue;
599 }
600 }
601
602 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
603 bitsSeen += bits;
604 nPointer = treeBase;
605 node = cpu->memory.load8(cpu, nPointer, 0);
606 if (bitsSeen == 32) {
607 bitsSeen = 0;
608 cpu->memory.store32(cpu, dest, block, 0);
609 dest += 4;
610 remaining -= 4;
611 block = 0;
612 }
613 }
614 }
615 cpu->gprs[0] = source;
616 cpu->gprs[1] = dest;
617}
618
619static void _unRl(struct GBA* gba, int width) {
620 struct ARMCore* cpu = gba->cpu;
621 uint32_t source = cpu->gprs[0];
622 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
623 int padding = (4 - remaining) & 0x3;
624 // We assume the signature byte (0x30) is correct
625 int blockheader;
626 int block;
627 source += 4;
628 uint32_t dest = cpu->gprs[1];
629 int halfword = 0;
630 while (remaining > 0) {
631 blockheader = cpu->memory.load8(cpu, source, 0);
632 ++source;
633 if (blockheader & 0x80) {
634 // Compressed
635 blockheader &= 0x7F;
636 blockheader += 3;
637 block = cpu->memory.load8(cpu, source, 0);
638 ++source;
639 while (blockheader-- && remaining) {
640 --remaining;
641 if (width == 2) {
642 if (dest & 1) {
643 halfword |= block << 8;
644 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
645 } else {
646 halfword = block;
647 }
648 } else {
649 cpu->memory.store8(cpu, dest, block, 0);
650 }
651 ++dest;
652 }
653 } else {
654 // Uncompressed
655 blockheader++;
656 while (blockheader-- && remaining) {
657 --remaining;
658 int byte = cpu->memory.load8(cpu, source, 0);
659 ++source;
660 if (width == 2) {
661 if (dest & 1) {
662 halfword |= byte << 8;
663 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
664 } else {
665 halfword = byte;
666 }
667 } else {
668 cpu->memory.store8(cpu, dest, byte, 0);
669 }
670 ++dest;
671 }
672 }
673 }
674 if (width == 2) {
675 if (dest & 1) {
676 --padding;
677 ++dest;
678 }
679 for (; padding > 0; padding -= 2, dest += 2) {
680 cpu->memory.store16(cpu, dest, 0, 0);
681 }
682 } else {
683 while (padding--) {
684 cpu->memory.store8(cpu, dest, 0, 0);
685 ++dest;
686 }
687 }
688 cpu->gprs[0] = source;
689 cpu->gprs[1] = dest;
690}
691
692static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
693 struct ARMCore* cpu = gba->cpu;
694 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
695 uint32_t dest = cpu->gprs[1];
696 uint32_t header = cpu->memory.load32(cpu, source, 0);
697 int remaining = header >> 8;
698 // We assume the signature nybble (0x8) is correct
699 uint16_t halfword = 0;
700 uint16_t old = 0;
701 source += 4;
702 while (remaining > 0) {
703 uint16_t new;
704 if (inwidth == 1) {
705 new = cpu->memory.load8(cpu, source, 0);
706 } else {
707 new = cpu->memory.load16(cpu, source, 0);
708 }
709 new += old;
710 if (outwidth > inwidth) {
711 halfword >>= 8;
712 halfword |= (new << 8);
713 if (source & 1) {
714 cpu->memory.store16(cpu, dest, halfword, 0);
715 dest += outwidth;
716 remaining -= outwidth;
717 }
718 } else if (outwidth == 1) {
719 cpu->memory.store8(cpu, dest, new, 0);
720 dest += outwidth;
721 remaining -= outwidth;
722 } else {
723 cpu->memory.store16(cpu, dest, new, 0);
724 dest += outwidth;
725 remaining -= outwidth;
726 }
727 old = new;
728 source += inwidth;
729 }
730 cpu->gprs[0] = source;
731 cpu->gprs[1] = dest;
732}