1#ifndef GBA_SERIALIZE_H
  2#define GBA_SERIALIZE_H
  3
  4#include "common.h"
  5
  6#include "gba.h"
  7
  8const uint32_t GBA_SAVESTATE_MAGIC;
  9
 10/* Savestate format:
 11 * 0x00000 - 0x00003: Version Magic (0x01000000)
 12 * 0x00004 - 0x00007: BIOS checksum (e.g. 0xBAAE187F for official BIOS)
 13 * 0x00008 - 0x0000B: ROM CRC32
 14 * 0x0000C - 0x0000F: Reserved (leave zero)
 15 * 0x00010 - 0x0001B: Game title (e.g. METROID4USA)
 16 * 0x0001C - 0x0001F: Game code (e.g. AMTE)
 17 * 0x00020 - 0x0012F: CPU state:
 18 * | 0x00020 - 0x0005F: GPRs
 19 * | 0x00060 - 0x00063: CPSR
 20 * | 0x00064 - 0x00067: SPSR
 21 * | 0x00068 - 0x0006B: Cycles since last event
 22 * | 0x0006C - 0x0006F: Cycles until next event
 23 * | 0x00070 - 0x00117: Banked registers
 24 * | 0x00118 - 0x0012F: Banked SPSRs
 25 * 0x00130 - 0x00143: Audio channel 1 state
 26 * | 0x00130 - 0x00133: Next envelope step
 27 * | 0x00134 - 0x00137: Next square wave step
 28 * | 0x00138 - 0x0013B: Next sweep step
 29 * | 0x0013C - 0x0013F: Channel end cycle
 30 * | 0x00140 - 0x00143: Next event
 31 * 0x00144 - 0x00153: Audio channel 2 state
 32 * | 0x00144 - 0x00147: Next envelope step
 33 * | 0x00148 - 0x0014B: Next square wave step
 34 * | 0x0014C - 0x0014F: Channel end cycle
 35 * | 0x00150 - 0x00153: Next event
 36 * 0x00154 - 0x0017B: Audio channel 3 state
 37 * | 0x00154 - 0x00173: Wave banks
 38 * | 0x00174 - 0x00177: Channel end cycle
 39 * | 0x00178 - 0x0017B: Next event
 40 * 0x0017C - 0x0018B: Audio channel 4 state
 41 * | 0x0017C - 0x0017F: Linear feedback shift register state
 42 * | 0x00180 - 0x00183: Next enveleope step
 43 * | 0x00184 - 0x00187: Channel end cycle
 44 * | 0x00188 - 0x0018B: Next event
 45 * 0x0018C - 0x001AB: Audio FIFO 1
 46 * 0x001AC - 0x001CB: Audio FIFO 2
 47 * 0x001CC - 0x001DF: Audio miscellaneous state
 48 * | 0x001CC - 0x001CF: Next event
 49 * | 0x001D0 - 0x001D3: Event diff
 50 * | 0x001D4 - 0x001D7: Next sample
 51 * | 0x001D8 - 0x001DB: FIFO size
 52 * | 0x001DC - 0x001DC: Channel 1 envelope state
 53 *   | bits 0 - 3: Current volume
 54 *   | bit 4: Is dead?
 55 *   | bit 5: Is high?
 56 *   | bits 6 - 7: Reserved
 57 * | 0x001DD - 0x001DD: Channel 2 envelope state
 58 *   | bits 0 - 3: Current volume
 59 *   | bit 4: Is dead?
 60 *   | bit 5: Is high?
 61 *   | bits 6 - 7: Reserved
 62 * | 0x001DE - 0x001DE: Channel 4 envelope state
 63 *   | bits 0 - 3: Current volume
 64 *   | bit 4: Is dead?
 65 *   | bits 5 - 7: Reserved
 66 * | 0x001DF - 0x001DF: Reserved
 67 * 0x001E0 - 0x001FF: Video miscellaneous state
 68 * | 0x001E0 - 0x001E3: Next event
 69 * | 0x001E4 - 0x001E7: Event diff
 70 * | 0x001E8 - 0x001EB: Last hblank
 71 * | 0x001EC - 0x001EF: Next hblank
 72 * | 0x001F0 - 0x001F3: Next hblank IRQ
 73 * | 0x001F4 - 0x001F7: Next vblank IRQ
 74 * | 0x001F8 - 0x001FB: Next vcounter IRQ
 75 * | 0x001FC - 0x001FF: Reserved
 76 * 0x00200 - 0x00213: Timer 0
 77 * | 0x00200 - 0x00201: Reload value
 78 * | 0x00202 - 0x00203: Old reload value
 79 * | 0x00204 - 0x00207: Last event
 80 * | 0x00208 - 0x0020B: Next event
 81 * | 0x0020C - 0x0020F: Overflow interval
 82 * | 0x00210 - 0x00213: Miscellaenous flags
 83 * 0x00214 - 0x00227: Timer 1
 84 * | 0x00214 - 0x00215: Reload value
 85 * | 0x00216 - 0x00217: Old reload value
 86 * | 0x00218 - 0x0021B: Last event
 87 * | 0x0021C - 0x0021F: Next event
 88 * | 0x00220 - 0x00223: Overflow interval
 89 * | 0x00224 - 0x00227: Miscellaenous flags
 90 * 0x00228 - 0x0023B: Timer 2
 91 * | 0x00228 - 0x00229: Reload value
 92 * | 0x0022A - 0x0022B: Old reload value
 93 * | 0x0022C - 0x0022F: Last event
 94 * | 0x00230 - 0x00233: Next event
 95 * | 0x00234 - 0x00237: Overflow interval
 96 * | 0x00238 - 0x0023B: Miscellaenous flags
 97 * 0x0023C - 0x00250: Timer 3
 98 * | 0x0023C - 0x0023D: Reload value
 99 * | 0x0023E - 0x0023F: Old reload value
100 * | 0x00240 - 0x00243: Last event
101 * | 0x00244 - 0x00247: Next event
102 * | 0x00248 - 0x0024B: Overflow interval
103 * | 0x0024C - 0x0024F: Miscellaenous flags
104 * 0x00250 - 0x0025F: DMA 0
105 * | 0x00250 - 0x00253: DMA next source
106 * | 0x00254 - 0x00257: DMA next destination
107 * | 0x00258 - 0x0025B: DMA next count
108 * | 0x0025C - 0x0025F: DMA next event
109 * 0x00260 - 0x0026F: DMA 1
110 * | 0x00260 - 0x00263: DMA next source
111 * | 0x00264 - 0x00267: DMA next destination
112 * | 0x00268 - 0x0026B: DMA next count
113 * | 0x0026C - 0x0026F: DMA next event
114 * 0x00270 - 0x0027F: DMA 2
115 * | 0x00270 - 0x00273: DMA next source
116 * | 0x00274 - 0x00277: DMA next destination
117 * | 0x00278 - 0x0027B: DMA next count
118 * | 0x0027C - 0x0027F: DMA next event
119 * 0x00280 - 0x0028F: DMA 3
120 * | 0x00280 - 0x00283: DMA next source
121 * | 0x00284 - 0x00287: DMA next destination
122 * | 0x00288 - 0x0028B: DMA next count
123 * | 0x0028C - 0x0028F: DMA next event
124 * 0x00290 - 0x003FF: Reserved (leave zero)
125 * 0x00400 - 0x007FF: I/O memory
126 * 0x00800 - 0x00BFF: Palette
127 * 0x00C00 - 0x00FFF: OAM
128 * 0x01000 - 0x18FFF: VRAM
129 * 0x19000 - 0x20FFF: IWRAM
130 * 0x21000 - 0x60FFF: WRAM
131 * Total size: 0x61000 (397,312) bytes
132 */
133
134struct GBASerializedState {
135	uint32_t versionMagic;
136	uint32_t biosChecksum;
137	uint32_t romCrc32;
138	uint32_t reservedHeader;
139
140	char title[12];
141	uint32_t id;
142
143	struct {
144		int32_t gprs[16];
145		union PSR cpsr;
146		union PSR spsr;
147
148		int32_t cycles;
149		int32_t nextEvent;
150
151		int32_t bankedRegisters[6][7];
152		int32_t bankedSPSRs[6];
153	} cpu;
154
155	struct {
156		struct {
157			int32_t envelopeNextStep;
158			int32_t waveNextStep;
159			int32_t sweepNextStep;
160			int32_t endTime;
161			int32_t nextEvent;
162		} ch1;
163		struct {
164			int32_t envelopeNextStep;
165			int32_t waveNextStep;
166			int32_t endTime;
167			int32_t nextEvent;
168		} ch2;
169		struct {
170			uint32_t wavebanks[8];
171			int32_t endTime;
172			int32_t nextEvent;
173		} ch3;
174		struct {
175			int32_t lfsr;
176			int32_t envelopeNextStep;
177			int32_t endTime;
178			int32_t nextEvent;
179		} ch4;
180		uint8_t fifoA[32];
181		uint8_t fifoB[32];
182		int32_t nextEvent;
183		int32_t eventDiff;
184		int32_t nextSample;
185		int32_t fifoSize;
186		unsigned ch1Volume : 4;
187		unsigned ch1Dead : 1;
188		unsigned ch1Hi : 1;
189		unsigned : 2;
190		unsigned ch2Volume : 4;
191		unsigned ch2Dead : 1;
192		unsigned ch2Hi : 1;
193		unsigned : 2;
194		unsigned ch4Volume : 4;
195		unsigned ch4Dead : 1;
196		unsigned : 3;
197		unsigned : 8;
198	} audio;
199
200	struct {
201		int32_t nextEvent;
202		int32_t eventDiff;
203		int32_t lastHblank;
204		int32_t nextHblank;
205		int32_t nextHblankIRQ;
206		int32_t nextVblankIRQ;
207		int32_t nextVcounterIRQ;
208		int32_t : 32;
209	} video;
210
211	struct GBATimer timers[4];
212
213	struct {
214		uint32_t nextSource;
215		uint32_t nextDest;
216		int32_t nextCount;
217		int32_t nextEvent;
218	} dma[4];
219
220	uint32_t reservedGpio[92];
221
222	uint16_t io[SIZE_IO >> 1];
223	uint16_t pram[SIZE_PALETTE_RAM >> 1];
224	uint16_t oam[SIZE_OAM >> 1];
225	uint16_t vram[SIZE_VRAM >> 1];
226	uint8_t iwram[SIZE_WORKING_IRAM];
227	uint8_t wram[SIZE_WORKING_RAM];
228};
229
230struct VFile;
231
232void GBASerialize(struct GBA* gba, struct GBASerializedState* state);
233void GBADeserialize(struct GBA* gba, struct GBASerializedState* state);
234
235bool GBASaveState(struct GBA* gba, int slot);
236bool GBALoadState(struct GBA* gba, int slot);
237
238struct GBASerializedState* GBAMapState(struct VFile* vf);
239void GBAUnmapState(struct VFile* vf, struct GBASerializedState* state);
240
241struct GBASerializedState* GBAAllocateState(void);
242void GBADeallocateState(struct GBASerializedState* state);
243
244struct GBAThread;
245void GBARecordFrame(struct GBAThread* thread);
246void GBARewind(struct GBAThread* thread, int nStates);
247
248#endif