all repos — mgba @ 7c4a220bbbb37ee974bb3e43bf02a96d66d3e7e6

mGBA Game Boy Advance Emulator

src/ds/video.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/ds/video.h>
  7
  8#include <mgba/core/sync.h>
  9#include <mgba/internal/arm/macros.h>
 10#include <mgba/internal/ds/ds.h>
 11#include <mgba/internal/ds/memory.h>
 12#include <mgba/internal/gba/video.h>
 13
 14#include <mgba-util/memory.h>
 15
 16mLOG_DEFINE_CATEGORY(DS_VIDEO, "DS Video", "ds.video");
 17
 18static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer);
 19static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer);
 20static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer);
 21static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 22static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 23static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam);
 24static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot);
 25static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y);
 26static void DSVideoDummyRendererDrawScanlineDirectly(struct DSVideoRenderer* renderer, int y, color_t* scanline);
 27static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer);
 28static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels);
 29static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels);
 30
 31static void _startHblank7(struct mTiming*, void* context, uint32_t cyclesLate);
 32static void _startHdraw7(struct mTiming*, void* context, uint32_t cyclesLate);
 33static void _startHblank9(struct mTiming*, void* context, uint32_t cyclesLate);
 34static void _startHdraw9(struct mTiming*, void* context, uint32_t cyclesLate);
 35
 36static const uint32_t _vramSize[9] = {
 37	0x20000,
 38	0x20000,
 39	0x20000,
 40	0x20000,
 41	0x10000,
 42	0x04000,
 43	0x04000,
 44	0x08000,
 45	0x04000
 46};
 47
 48enum DSVRAMBankMode {
 49	MODE_A_BG = 0,
 50	MODE_B_BG = 1,
 51	MODE_A_OBJ = 2,
 52	MODE_B_OBJ = 3,
 53	MODE_LCDC,
 54	MODE_7_VRAM,
 55	MODE_A_BG_EXT_PAL,
 56	MODE_B_BG_EXT_PAL,
 57	MODE_A_OBJ_EXT_PAL,
 58	MODE_B_OBJ_EXT_PAL,
 59	MODE_3D_TEX,
 60	MODE_3D_TEX_PAL,
 61};
 62
 63const struct DSVRAMBankInfo {
 64	int base;
 65	uint32_t mirrorSize;
 66	enum DSVRAMBankMode mode;
 67	int offset[4];
 68} _vramInfo[9][8] = {
 69	{ // A
 70		{ 0x000, 0x40, MODE_LCDC },
 71		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 72		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 73		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 74	},
 75	{ // B
 76		{ 0x008, 0x40, MODE_LCDC },
 77		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 78		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 79		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 80	},
 81	{ // C
 82		{ 0x010, 0x40, MODE_LCDC },
 83		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 84		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 85		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 86		{ 0x000, 0x08, MODE_B_BG },
 87	},
 88	{ // D
 89		{ 0x018, 0x40, MODE_LCDC },
 90		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 91		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 92		{ 0x000, 0x01, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 93		{ 0x000, 0x08, MODE_B_OBJ },
 94	},
 95	{ // E
 96		{ 0x020, 0x40, MODE_LCDC },
 97		{ 0x000, 0x20, MODE_A_BG },
 98		{ 0x000, 0x10, MODE_A_OBJ },
 99		{ 0x000, 0x04, MODE_3D_TEX_PAL },
100		{ 0x000, 0x04, MODE_A_BG_EXT_PAL },
101	},
102	{ // F
103		{ 0x024, 0x40, MODE_LCDC },
104		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
105		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
106		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
107		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
108		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
109	},
110	{ // G
111		{ 0x025, 0x40, MODE_LCDC },
112		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
113		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
114		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
115		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
116		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
117	},
118	{ // H
119		{ 0x026, 0x40, MODE_LCDC },
120		{ 0x000, 0x04, MODE_B_BG },
121		{ 0x000, 0x04, MODE_B_BG_EXT_PAL },
122	},
123	{ // I
124		{ 0x028, 0x40, MODE_LCDC },
125		{ 0x002, 0x04, MODE_B_BG },
126		{ 0x000, 0x01, MODE_B_OBJ },
127		{ 0x000, 0x01, MODE_B_OBJ_EXT_PAL },
128	},
129};
130
131static struct DSVideoRenderer dummyRenderer = {
132	.init = DSVideoDummyRendererInit,
133	.reset = DSVideoDummyRendererReset,
134	.deinit = DSVideoDummyRendererDeinit,
135	.writeVideoRegister = DSVideoDummyRendererWriteVideoRegister,
136	.writePalette = DSVideoDummyRendererWritePalette,
137	.writeOAM = DSVideoDummyRendererWriteOAM,
138	.invalidateExtPal = DSVideoDummyRendererInvalidateExtPal,
139	.drawScanline = DSVideoDummyRendererDrawScanline,
140	.drawScanlineDirectly = DSVideoDummyRendererDrawScanlineDirectly,
141	.finishFrame = DSVideoDummyRendererFinishFrame,
142	.getPixels = DSVideoDummyRendererGetPixels,
143	.putPixels = DSVideoDummyRendererPutPixels,
144};
145
146void DSVideoInit(struct DSVideo* video) {
147	video->renderer = &dummyRenderer;
148	video->vram = NULL;
149	video->frameskip = 0;
150	video->event7.name = "DS7 Video";
151	video->event7.callback = NULL;
152	video->event7.context = video;
153	video->event7.priority = 8;
154	video->event9.name = "DS9 Video";
155	video->event9.callback = NULL;
156	video->event9.context = video;
157	video->event9.priority = 8;
158}
159
160void DSVideoReset(struct DSVideo* video) {
161	video->vcount = 0;
162	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
163	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
164
165	video->event7.callback = _startHblank7;
166	video->event9.callback = _startHblank9;
167	mTimingSchedule(&video->p->ds7.timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH);
168	mTimingSchedule(&video->p->ds9.timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2);
169
170	video->frameCounter = 0;
171	video->frameskipCounter = 0;
172
173	if (video->vram) {
174		mappedMemoryFree(video->vram, DS_SIZE_VRAM);
175	}
176	video->vram = anonymousMemoryMap(DS_SIZE_VRAM);
177	video->renderer->vram = video->vram;
178
179	video->p->memory.vramBank[0] = &video->vram[0x00000];
180	video->p->memory.vramBank[1] = &video->vram[0x10000];
181	video->p->memory.vramBank[2] = &video->vram[0x20000];
182	video->p->memory.vramBank[3] = &video->vram[0x30000];
183	video->p->memory.vramBank[4] = &video->vram[0x40000];
184	video->p->memory.vramBank[5] = &video->vram[0x48000];
185	video->p->memory.vramBank[6] = &video->vram[0x4A000];
186	video->p->memory.vramBank[7] = &video->vram[0x4C000];
187	video->p->memory.vramBank[8] = &video->vram[0x50000];
188
189	video->renderer->deinit(video->renderer);
190	video->renderer->init(video->renderer);
191}
192
193void DSVideoAssociateRenderer(struct DSVideo* video, struct DSVideoRenderer* renderer) {
194	video->renderer->deinit(video->renderer);
195	video->renderer = renderer;
196	renderer->palette = video->palette;
197	renderer->vram = video->vram;
198	memcpy(renderer->vramABG, video->vramABG, sizeof(renderer->vramABG));
199	memcpy(renderer->vramAOBJ, video->vramAOBJ, sizeof(renderer->vramAOBJ));
200	memcpy(renderer->vramABGExtPal, video->vramABGExtPal, sizeof(renderer->vramABGExtPal));
201	renderer->vramAOBJExtPal = video->vramAOBJExtPal;
202	memcpy(renderer->vramBBG, video->vramBBG, sizeof(renderer->vramBBG));
203	memcpy(renderer->vramBOBJ, video->vramBOBJ, sizeof(renderer->vramBOBJ));
204	memcpy(renderer->vramBBGExtPal, video->vramBBGExtPal, sizeof(renderer->vramBBGExtPal));
205	renderer->vramBOBJExtPal = video->vramBOBJExtPal;
206	renderer->oam = &video->oam;
207	renderer->gx = &video->p->gx;
208	video->renderer->init(video->renderer);
209}
210
211void DSVideoDeinit(struct DSVideo* video) {
212	DSVideoAssociateRenderer(video, &dummyRenderer);
213	mappedMemoryFree(video->vram, DS_SIZE_VRAM);
214}
215
216static void _performCapture(struct DSVideo* video, int y) {
217	DSRegisterDISPCAPCNT dispcap = video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_LO >> 1];
218	dispcap |= video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16;
219	// TODO: Check mode
220	int block = DSRegisterDISPCAPCNTGetWriteBlock(dispcap);
221	if (!video->p->memory.vramMode[block][4]) {
222		return;
223	}
224	uint16_t* vram = &video->vram[0x10000 * block];
225	const color_t* pixelsA;
226	color_t pixels[DS_VIDEO_HORIZONTAL_PIXELS];
227	int width = DS_VIDEO_HORIZONTAL_PIXELS;
228	switch (DSRegisterDISPCAPCNTGetCaptureSize(dispcap)) {
229	case 0:
230		width = DS_VIDEO_HORIZONTAL_PIXELS / 2;
231		break;
232	case 1:
233		if (y >= 64) {
234			return;
235		}
236	case 2:
237		if (y >= 128) {
238			return;
239		}
240	default:
241		break;
242	}
243
244	if (DSRegisterDISPCAPCNTIsSourceA(dispcap)) {
245		// TODO: Process scanline regardless of output type
246		video->p->gx.renderer->getScanline(video->p->gx.renderer, y, &pixelsA);
247	} else {
248		video->renderer->drawScanlineDirectly(video->renderer, y, pixels);
249		pixelsA = pixels;
250	}
251
252	uint32_t base = DSRegisterDISPCAPCNTGetWriteOffset(dispcap) * 0x8000;
253	uint16_t pixel;
254	int x;
255	// TODO: Blending
256	for (x = 0; x < width; ++x) {
257		color_t colorA = pixelsA[x];
258#ifdef COLOR_16_BIT
259#ifdef COLOR_5_6_5
260		pixel = colorA & 0x1F;
261		pixel |= (colorA & 0xFFC0) >> 1;
262#else
263		pixel = colorA;
264#endif
265#else
266		pixel = (colorA >> 9) & 0x7C00;
267		pixel |= (colorA >> 6) & 0x03E0;
268		pixel |= (colorA >> 3) & 0x001F;
269#endif
270		STORE_16(pixel, ((x + y * DS_VIDEO_HORIZONTAL_PIXELS) * 2 + base) & 0x1FFFE, vram);
271	}
272}
273
274void _startHdraw7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
275	struct DSVideo* video = context;
276	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
277	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
278	video->event7.callback = _startHblank7;
279	mTimingSchedule(timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
280
281	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
282
283	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
284		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
285		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
286			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VCOUNTER);
287		}
288	} else {
289		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
290	}
291	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
292
293	switch (video->vcount) {
294	case DS_VIDEO_VERTICAL_PIXELS:
295		DSDMARunVblank(&video->p->ds7, -cyclesLate);
296		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
297		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
298			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VBLANK);
299		}
300		break;
301	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
302		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
303		break;
304	}
305}
306
307void _startHblank7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
308	struct DSVideo* video = context;
309	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
310	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
311	video->event7.callback = _startHdraw7;
312	mTimingSchedule(timing, &video->event7, DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
313
314	// Begin Hblank
315	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
316
317	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
318		DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_HBLANK);
319	}
320	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
321}
322
323void _startHdraw9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
324	struct DSVideo* video = context;
325	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
326	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
327	video->event9.callback = _startHblank9;
328	mTimingSchedule(timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2 - cyclesLate);
329
330	++video->vcount;
331	if (video->vcount == DS_VIDEO_VERTICAL_TOTAL_PIXELS) {
332		video->vcount = 0;
333	}
334	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
335
336	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
337		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
338		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
339			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VCOUNTER);
340		}
341	} else {
342		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
343	}
344	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
345
346	// Note: state may be recorded during callbacks, so ensure it is consistent!
347	switch (video->vcount) {
348	case 0:
349		DSFrameStarted(video->p);
350		video->inCapture = DSRegisterDISPCAPCNTIsEnable(video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16);
351		break;
352	case DS_VIDEO_VERTICAL_PIXELS:
353		DSDMARunVblank(&video->p->ds9, -cyclesLate);
354		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
355		video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] = DSRegisterDISPCAPCNTClearEnable(video->p->ds9.memory.io[DS9_REG_DISPCAPCNT_HI >> 1] << 16) >> 16;
356		if (video->frameskipCounter <= 0) {
357			video->renderer->finishFrame(video->renderer);
358			DSGXFlush(&video->p->gx);
359		}
360		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
361			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VBLANK);
362		}
363		video->inCapture = false;
364		DSFrameEnded(video->p);
365		--video->frameskipCounter;
366		if (video->frameskipCounter < 0) {
367			mCoreSyncPostFrame(video->p->sync);
368			video->frameskipCounter = video->frameskip;
369		}
370		++video->frameCounter;
371		break;
372	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
373		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
374		break;
375	}
376}
377
378void _startHblank9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
379	struct DSVideo* video = context;
380	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
381	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
382	video->event9.callback = _startHdraw9;
383	mTimingSchedule(timing, &video->event9, (DS9_VIDEO_HBLANK_LENGTH * 2) - cyclesLate);
384
385	// Begin Hblank
386	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
387	if (video->frameskipCounter <= 0) {
388		if (video->vcount < DS_VIDEO_VERTICAL_PIXELS) {
389			video->renderer->drawScanline(video->renderer, video->vcount);
390		}
391		if (video->vcount < DS_VIDEO_VERTICAL_PIXELS - 48) {
392			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48);
393		}
394		if (video->vcount >= DS_VIDEO_VERTICAL_TOTAL_PIXELS - 48) {
395			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48 - DS_VIDEO_VERTICAL_TOTAL_PIXELS);
396		}
397	}
398	if (video->inCapture) {
399		_performCapture(video, video->vcount);
400	}
401
402	if (video->vcount < DS_VIDEO_VERTICAL_PIXELS) {
403		DSDMARunHblank(&video->p->ds9, -cyclesLate);
404	}
405	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
406		DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_HBLANK);
407	}
408	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
409}
410
411void DSVideoWriteDISPSTAT(struct DSCommon* dscore, uint16_t value) {
412	dscore->memory.io[DS_REG_DISPSTAT >> 1] &= 0x7;
413	dscore->memory.io[DS_REG_DISPSTAT >> 1] |= value;
414	// TODO: Does a VCounter IRQ trigger on write?
415}
416
417void DSVideoConfigureVRAM(struct DS* ds, int index, uint8_t value, uint8_t oldValue) {
418	struct DSMemory* memory = &ds->memory;
419	if (value == oldValue) {
420		return;
421	}
422	uint32_t i, j;
423	uint32_t size = _vramSize[index] >> DS_VRAM_OFFSET;
424	struct DSVRAMBankInfo oldInfo = _vramInfo[index][oldValue & 0x7];
425	uint32_t offset = oldInfo.base + oldInfo.offset[(oldValue >> 3) & 3];
426	switch (oldInfo.mode) {
427	case MODE_A_BG:
428		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
429			for (i = 0; i < size; ++i) {
430				if (ds->video.vramABG[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
431					ds->video.vramABG[i + j] = NULL;
432					ds->video.renderer->vramABG[i + j] = NULL;
433				}
434			}
435		}
436		break;
437	case MODE_B_BG:
438		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
439			for (i = 0; i < size; ++i) {
440				if (ds->video.vramBBG[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
441					ds->video.vramBBG[i + j] = NULL;
442					ds->video.renderer->vramBBG[i + j] = NULL;
443				}
444			}
445		}
446		break;
447	case MODE_A_OBJ:
448		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
449			for (i = 0; i < size; ++i) {
450				if (ds->video.vramAOBJ[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
451					ds->video.vramAOBJ[i + j] = NULL;
452					ds->video.renderer->vramAOBJ[i + j] = NULL;
453				}
454			}
455		}
456		break;
457	case MODE_B_OBJ:
458		for (j = offset; j < 0x20; j += oldInfo.mirrorSize) {
459			for (i = 0; i < size; ++i) {
460				if (ds->video.vramBOBJ[i + j] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
461					ds->video.vramBOBJ[i + j] = NULL;
462					ds->video.renderer->vramBOBJ[i + j] = NULL;
463				}
464			}
465		}
466		break;
467	case MODE_A_BG_EXT_PAL:
468		for (i = 0; i < oldInfo.mirrorSize; ++i) {
469			if (ds->video.vramABGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
470				ds->video.vramABGExtPal[offset + i] = NULL;
471				ds->video.renderer->vramABGExtPal[offset + i] = NULL;
472				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
473			}
474		}
475		break;
476	case MODE_B_BG_EXT_PAL:
477		for (i = 0; i < oldInfo.mirrorSize; ++i) {
478			if (ds->video.vramBBGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
479				ds->video.vramBBGExtPal[offset + i] = NULL;
480				ds->video.renderer->vramBBGExtPal[offset + i] = NULL;
481				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
482			}
483		}
484		break;
485	case MODE_A_OBJ_EXT_PAL:
486		if (ds->video.vramAOBJExtPal == memory->vramBank[index]) {
487			ds->video.vramAOBJExtPal = NULL;
488			ds->video.renderer->vramAOBJExtPal = NULL;
489			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
490		}
491		break;
492	case MODE_B_OBJ_EXT_PAL:
493		if (ds->video.vramBOBJExtPal == memory->vramBank[index]) {
494			ds->video.vramBOBJExtPal = NULL;
495			ds->video.renderer->vramBOBJExtPal = NULL;
496			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
497		}
498		break;
499	case MODE_3D_TEX:
500		if (ds->gx.tex[offset] == memory->vramBank[index]) {
501			ds->gx.tex[offset] = NULL;
502			ds->gx.renderer->tex[offset] = NULL;
503			ds->gx.renderer->invalidateTex(ds->gx.renderer, offset);
504		}
505		break;
506	case MODE_3D_TEX_PAL:
507		for (i = 0; i < oldInfo.mirrorSize; ++i) {
508			if (ds->gx.texPal[offset + i] == &memory->vramBank[index][i << 13]) {
509				ds->gx.texPal[offset + i] = NULL;
510				ds->gx.renderer->texPal[offset + i] = NULL;
511			}
512		}
513		break;
514	case MODE_7_VRAM:
515		for (i = 0; i < size; i += 16) {
516			ds->memory.vram7[(offset + i) >> 4] = NULL;
517		}
518		break;
519	case MODE_LCDC:
520		break;
521	}
522
523	struct DSVRAMBankInfo info = _vramInfo[index][value & 0x7];
524	memset(&memory->vramMirror[index], 0, sizeof(memory->vramMirror[index]));
525	memset(&memory->vramMode[index], 0, sizeof(memory->vramMode[index]));
526	if (!(value & 0x80) || !info.mirrorSize) {
527		return;
528	}
529	offset = info.base + info.offset[(value >> 3) & 3];
530	if (info.mode <= MODE_LCDC) {
531		memory->vramMode[index][info.mode] = 0xFFFF;
532		for (j = offset; j < 0x40; j += info.mirrorSize) {
533			for (i = 0; i < size; ++i) {
534				memory->vramMirror[index][i + j] = 1 << index;
535			}
536		}
537	}
538	switch (info.mode) {
539	case MODE_A_BG:
540		for (j = offset; j < 0x20; j += info.mirrorSize) {
541			for (i = 0; i < size; ++i) {
542				ds->video.vramABG[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
543				ds->video.renderer->vramABG[i + j] = ds->video.vramABG[i + j];
544			}
545		}
546		break;
547	case MODE_B_BG:
548		for (j = offset; j < 0x20; j += info.mirrorSize) {
549			for (i = 0; i < size; ++i) {
550				ds->video.vramBBG[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
551				ds->video.renderer->vramBBG[i + j] = ds->video.vramBBG[i + j];
552			}
553		}
554		break;
555	case MODE_A_OBJ:
556		for (j = offset; j < 0x20; j += info.mirrorSize) {
557			for (i = 0; i < size; ++i) {
558				ds->video.vramAOBJ[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
559				ds->video.renderer->vramAOBJ[i + j] = ds->video.vramAOBJ[i + j];
560			}
561		}
562		break;
563	case MODE_B_OBJ:
564		for (j = offset; j < 0x20; j += info.mirrorSize) {
565			for (i = 0; i < size; ++i) {
566				ds->video.vramBOBJ[i + j] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
567				ds->video.renderer->vramBOBJ[i + j] = ds->video.vramBOBJ[i + j];
568			}
569		}
570		break;
571	case MODE_A_BG_EXT_PAL:
572		for (i = 0; i < info.mirrorSize; ++i) {
573			ds->video.vramABGExtPal[offset + i] = &memory->vramBank[index][i << 12];
574			ds->video.renderer->vramABGExtPal[offset + i] = ds->video.vramABGExtPal[offset + i];
575			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
576		}
577		break;
578	case MODE_B_BG_EXT_PAL:
579		for (i = 0; i < info.mirrorSize; ++i) {
580			ds->video.vramBBGExtPal[offset + i] = &memory->vramBank[index][i << 12];
581			ds->video.renderer->vramBBGExtPal[offset + i] = ds->video.vramBBGExtPal[offset + i];
582			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
583		}
584		break;
585	case MODE_A_OBJ_EXT_PAL:
586		ds->video.vramAOBJExtPal = memory->vramBank[index];
587		ds->video.renderer->vramAOBJExtPal = ds->video.vramAOBJExtPal;
588		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
589		break;
590	case MODE_B_OBJ_EXT_PAL:
591		ds->video.vramBOBJExtPal = memory->vramBank[index];
592		ds->video.renderer->vramBOBJExtPal = ds->video.vramBOBJExtPal;
593		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
594		break;
595	case MODE_3D_TEX:
596		ds->gx.tex[offset] = memory->vramBank[index];
597		ds->gx.renderer->tex[offset] = ds->gx.tex[offset];
598		ds->gx.renderer->invalidateTex(ds->gx.renderer, offset);
599		break;
600	case MODE_3D_TEX_PAL:
601		for (i = 0; i < info.mirrorSize; ++i) {
602			ds->gx.texPal[offset + i] = &memory->vramBank[index][i << 13];
603			ds->gx.renderer->texPal[offset + i] = ds->gx.texPal[offset + i];
604		}
605		break;
606	case MODE_7_VRAM:
607		for (i = 0; i < size; i += 16) {
608			ds->memory.vram7[(offset + i) >> 4] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 5)];
609		}
610		break;
611	case MODE_LCDC:
612		break;
613	}
614}
615
616static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer) {
617	UNUSED(renderer);
618	// Nothing to do
619}
620
621static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer) {
622	UNUSED(renderer);
623	// Nothing to do
624}
625
626static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer) {
627	UNUSED(renderer);
628	// Nothing to do
629}
630
631static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
632	UNUSED(renderer);
633	return value;
634}
635
636static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
637	UNUSED(renderer);
638	UNUSED(address);
639	UNUSED(value);
640	// Nothing to do
641}
642
643static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam) {
644	UNUSED(renderer);
645	UNUSED(oam);
646	// Nothing to do
647}
648
649static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot) {
650	UNUSED(renderer);
651	UNUSED(obj);
652	UNUSED(engB);
653	// Nothing to do
654}
655
656static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y) {
657	UNUSED(renderer);
658	UNUSED(y);
659	// Nothing to do
660}
661
662static void DSVideoDummyRendererDrawScanlineDirectly(struct DSVideoRenderer* renderer, int y, color_t* scanline) {
663	UNUSED(renderer);
664	UNUSED(y);
665	UNUSED(scanline);
666	// Nothing to do
667}
668
669static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer) {
670	UNUSED(renderer);
671	// Nothing to do
672}
673
674static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels) {
675	UNUSED(renderer);
676	UNUSED(stride);
677	UNUSED(pixels);
678	// Nothing to do
679}
680
681static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels) {
682	UNUSED(renderer);
683	UNUSED(stride);
684	UNUSED(pixels);
685	// Nothing to do
686}