all repos — mgba @ 8061bbfd96bc6bc79cdbd260b7e25ea1e42f46b6

mGBA Game Boy Advance Emulator

src/gba/bios.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include "bios.h"
  7
  8#include "gba/gba.h"
  9#include "gba/io.h"
 10#include "gba/memory.h"
 11#include "isa-inlines.h"
 12
 13const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
 14const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
 15
 16static void _unLz77(struct GBA* gba, int width);
 17static void _unHuffman(struct GBA* gba);
 18static void _unRl(struct GBA* gba, int width);
 19static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
 20
 21static void _SoftReset(struct GBA* gba) {
 22	struct ARMCore* cpu = gba->cpu;
 23	ARMSetPrivilegeMode(cpu, MODE_IRQ);
 24	cpu->spsr.packed = 0;
 25	cpu->gprs[ARM_LR] = 0;
 26	cpu->gprs[ARM_SP] = SP_BASE_IRQ;
 27	ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
 28	cpu->spsr.packed = 0;
 29	cpu->gprs[ARM_LR] = 0;
 30	cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
 31	ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
 32	cpu->gprs[ARM_LR] = 0;
 33	cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
 34	int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
 35	memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
 36	if (flag) {
 37		cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
 38	} else {
 39		cpu->gprs[ARM_PC] = BASE_CART0;
 40	}
 41	_ARMSetMode(cpu, MODE_ARM);
 42	int currentCycles = 0;
 43	ARM_WRITE_PC;
 44}
 45
 46static void _RegisterRamReset(struct GBA* gba) {
 47	uint32_t registers = gba->cpu->gprs[0];
 48	struct ARMCore* cpu = gba->cpu;
 49	cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
 50	if (registers & 0x01) {
 51		memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
 52	}
 53	if (registers & 0x02) {
 54		memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
 55	}
 56	if (registers & 0x04) {
 57		memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
 58	}
 59	if (registers & 0x08) {
 60		memset(gba->video.renderer->vram, 0, SIZE_VRAM);
 61	}
 62	if (registers & 0x10) {
 63		memset(gba->video.oam.raw, 0, SIZE_OAM);
 64	}
 65	if (registers & 0x20) {
 66		cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
 67		cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
 68		cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
 69		cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
 70		cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV, 0, 0);
 71		cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS, 0, 0);
 72	}
 73	if (registers & 0x40) {
 74		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
 75		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
 76		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
 77		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
 78		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
 79		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
 80		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
 81		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
 82		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
 83		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
 84		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
 85		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
 86		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
 87		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
 88		memset(gba->audio.ch3.wavedata, 0, sizeof(gba->audio.ch3.wavedata));
 89	}
 90	if (registers & 0x80) {
 91		cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
 92		cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
 93		cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
 94		cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
 95		cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
 96		cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
 97		cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
 98		cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
 99		cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
100		cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
101		cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
102		cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
103		cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
104		cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
105		cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
106		cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
107		cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
108		cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
109		cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
110		cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
111		cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
112		cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
113		cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
114		cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
115		cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
116		cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
117		cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
118		cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
119		cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
120		cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
121		cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
122		cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
123		cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
124		cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
125		cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
126		cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
127		cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
128		cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
129		cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
130		cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
131		cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
132		cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
133		cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
134		cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
135		cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
136		cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
137		cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
138		cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
139		cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
140		cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
141		cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
142		cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
143		cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
144		cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
145		cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
146		cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
147		cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
148		cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
149		cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
150		cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
151		cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
152		cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
153		cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
154		cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
155		cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
156		cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
157		cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
158		cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
159		cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
160		cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
161		cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
162		cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
163	}
164}
165
166static void _BgAffineSet(struct GBA* gba) {
167	struct ARMCore* cpu = gba->cpu;
168	int i = cpu->gprs[2];
169	float ox, oy;
170	float cx, cy;
171	float sx, sy;
172	float theta;
173	int offset = cpu->gprs[0];
174	int destination = cpu->gprs[1];
175	float a, b, c, d;
176	float rx, ry;
177	while (i--) {
178		// [ sx   0  0 ]   [ cos(theta)  -sin(theta)  0 ]   [ 1  0  cx - ox ]   [ A B rx ]
179		// [  0  sy  0 ] * [ sin(theta)   cos(theta)  0 ] * [ 0  1  cy - oy ] = [ C D ry ]
180		// [  0   0  1 ]   [     0            0       1 ]   [ 0  0     1    ]   [ 0 0  1 ]
181		ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
182		oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
183		cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
184		cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
185		sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
186		sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
187		theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
188		offset += 20;
189		// Rotation
190		a = d = cosf(theta);
191		b = c = sinf(theta);
192		// Scale
193		a *= sx;
194		b *= -sx;
195		c *= sy;
196		d *= sy;
197		// Translate
198		rx = ox - (a * cx + b * cy);
199		ry = oy - (c * cx + d * cy);
200		cpu->memory.store16(cpu, destination, a * 256, 0);
201		cpu->memory.store16(cpu, destination + 2, b * 256, 0);
202		cpu->memory.store16(cpu, destination + 4, c * 256, 0);
203		cpu->memory.store16(cpu, destination + 6, d * 256, 0);
204		cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
205		cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
206		destination += 16;
207	}
208}
209
210static void _ObjAffineSet(struct GBA* gba) {
211	struct ARMCore* cpu = gba->cpu;
212	int i = cpu->gprs[2];
213	float sx, sy;
214	float theta;
215	int offset = cpu->gprs[0];
216	int destination = cpu->gprs[1];
217	int diff = cpu->gprs[3];
218	float a, b, c, d;
219	while (i--) {
220		// [ sx   0 ]   [ cos(theta)  -sin(theta) ]   [ A B ]
221		// [  0  sy ] * [ sin(theta)   cos(theta) ] = [ C D ]
222		sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
223		sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
224		theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
225		offset += 8;
226		// Rotation
227		a = d = cosf(theta);
228		b = c = sinf(theta);
229		// Scale
230		a *= sx;
231		b *= -sx;
232		c *= sy;
233		d *= sy;
234		cpu->memory.store16(cpu, destination, a * 256, 0);
235		cpu->memory.store16(cpu, destination + diff, b * 256, 0);
236		cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
237		cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
238		destination += diff * 4;
239	}
240}
241
242static void _MidiKey2Freq(struct GBA* gba) {
243	struct ARMCore* cpu = gba->cpu;
244	uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
245	cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
246}
247
248static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
249	struct ARMCore* cpu = gba->cpu;
250	if (denom != 0) {
251		div_t result = div(num, denom);
252		cpu->gprs[0] = result.quot;
253		cpu->gprs[1] = result.rem;
254		cpu->gprs[3] = abs(result.quot);
255	} else {
256		GBALog(gba, GBA_LOG_GAME_ERROR, "Attempting to divide %i by zero!", num);
257		// If abs(num) > 1, this should hang, but that would be painful to
258		// emulate in HLE, and no game will get into a state where it hangs...
259		cpu->gprs[0] = (num < 0) ? -1 : 1;
260		cpu->gprs[1] = num;
261		cpu->gprs[3] = 1;
262	}
263}
264
265void GBASwi16(struct ARMCore* cpu, int immediate) {
266	struct GBA* gba = (struct GBA*) cpu->master;
267	GBALog(gba, GBA_LOG_SWI, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
268	    immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
269
270	if (gba->memory.fullBios) {
271		ARMRaiseSWI(cpu);
272		return;
273	}
274	switch (immediate) {
275	case 0x0:
276		_SoftReset(gba);
277		break;
278	case 0x1:
279		_RegisterRamReset(gba);
280		break;
281	case 0x2:
282		GBAHalt(gba);
283		break;
284	case 0x3:
285		GBAStop(gba);
286		break;
287	case 0x05:
288	// VBlankIntrWait
289	// Fall through:
290	case 0x04:
291		// IntrWait
292		ARMRaiseSWI(cpu);
293		break;
294	case 0x6:
295		_Div(gba, cpu->gprs[0], cpu->gprs[1]);
296		break;
297	case 0x7:
298		_Div(gba, cpu->gprs[1], cpu->gprs[0]);
299		break;
300	case 0x8:
301		cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
302		break;
303	case 0xA:
304		cpu->gprs[0] = atan2f(cpu->gprs[1] / 16384.f, cpu->gprs[0] / 16384.f) / (2 * M_PI) * 0x10000;
305		break;
306	case 0xB:
307	case 0xC:
308		if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
309			GBALog(gba, GBA_LOG_GAME_ERROR, "Cannot CpuSet from BIOS");
310			return;
311		}
312		if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
313			GBALog(gba, GBA_LOG_GAME_ERROR, "Misaligned CpuSet source");
314		}
315		if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
316			GBALog(gba, GBA_LOG_GAME_ERROR, "Misaligned CpuSet destination");
317		}
318		ARMRaiseSWI(cpu);
319		break;
320	case 0xD:
321		cpu->gprs[0] = GBA_BIOS_CHECKSUM;
322		cpu->gprs[1] = 1;
323		cpu->gprs[3] = SIZE_BIOS;
324		break;
325	case 0xE:
326		_BgAffineSet(gba);
327		break;
328	case 0xF:
329		_ObjAffineSet(gba);
330		break;
331	case 0x11:
332	case 0x12:
333		if (cpu->gprs[0] < BASE_WORKING_RAM) {
334			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad LZ77 source");
335			break;
336		}
337		switch (cpu->gprs[1] >> BASE_OFFSET) {
338		default:
339			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad LZ77 destination");
340		// Fall through
341		case REGION_WORKING_RAM:
342		case REGION_WORKING_IRAM:
343		case REGION_VRAM:
344			_unLz77(gba, immediate == 0x11 ? 1 : 2);
345			break;
346		}
347		break;
348	case 0x13:
349		if (cpu->gprs[0] < BASE_WORKING_RAM) {
350			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad Huffman source");
351			break;
352		}
353		switch (cpu->gprs[1] >> BASE_OFFSET) {
354		default:
355			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad Huffman destination");
356		// Fall through
357		case REGION_WORKING_RAM:
358		case REGION_WORKING_IRAM:
359		case REGION_VRAM:
360			_unHuffman(gba);
361			break;
362		}
363		break;
364	case 0x14:
365	case 0x15:
366		if (cpu->gprs[0] < BASE_WORKING_RAM) {
367			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad RL source");
368			break;
369		}
370		switch (cpu->gprs[1] >> BASE_OFFSET) {
371		default:
372			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad RL destination");
373		// Fall through
374		case REGION_WORKING_RAM:
375		case REGION_WORKING_IRAM:
376		case REGION_VRAM:
377			_unRl(gba, immediate == 0x14 ? 1 : 2);
378			break;
379		}
380		break;
381	case 0x16:
382	case 0x17:
383	case 0x18:
384		if (cpu->gprs[0] < BASE_WORKING_RAM) {
385			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad UnFilter source");
386			break;
387		}
388		switch (cpu->gprs[1] >> BASE_OFFSET) {
389		default:
390			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad UnFilter destination");
391		// Fall through
392		case REGION_WORKING_RAM:
393		case REGION_WORKING_IRAM:
394		case REGION_VRAM:
395			_unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
396			break;
397		}
398		break;
399	case 0x19:
400		// SoundBias is mostly meaningless here
401		GBALog(gba, GBA_LOG_STUB, "Stub software interrupt: SoundBias (19)");
402		break;
403	case 0x1F:
404		_MidiKey2Freq(gba);
405		break;
406	default:
407		GBALog(gba, GBA_LOG_STUB, "Stub software interrupt: %02X", immediate);
408	}
409	gba->memory.biosPrefetch = 0xE3A02004;
410}
411
412void GBASwi32(struct ARMCore* cpu, int immediate) {
413	GBASwi16(cpu, immediate >> 16);
414}
415
416uint32_t GBAChecksum(uint32_t* memory, size_t size) {
417	size_t i;
418	uint32_t sum = 0;
419	for (i = 0; i < size; i += 4) {
420		sum += memory[i >> 2];
421	}
422	return sum;
423}
424
425static void _unLz77(struct GBA* gba, int width) {
426	struct ARMCore* cpu = gba->cpu;
427	uint32_t source = cpu->gprs[0];
428	uint32_t dest = cpu->gprs[1];
429	int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
430	// We assume the signature byte (0x10) is correct
431	int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
432	source += 4;
433	int blocksRemaining = 0;
434	uint32_t disp;
435	int bytes;
436	int byte;
437	int halfword = 0;
438	while (remaining > 0) {
439		if (blocksRemaining) {
440			if (blockheader & 0x80) {
441				// Compressed
442				int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
443				source += 2;
444				disp = dest - (block & 0x0FFF) - 1;
445				bytes = (block >> 12) + 3;
446				while (bytes-- && remaining) {
447					--remaining;
448					if (width == 2) {
449						byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
450						if (dest & 1) {
451							byte >>= (disp & 1) * 8;
452							halfword |= byte << 8;
453							cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
454						} else {
455							byte >>= (disp & 1) * 8;
456							halfword = byte & 0xFF;
457						}
458					} else {
459						byte = cpu->memory.load8(cpu, disp, 0);
460						cpu->memory.store8(cpu, dest, byte, 0);
461					}
462					++disp;
463					++dest;
464				}
465			} else {
466				// Uncompressed
467				byte = cpu->memory.load8(cpu, source, 0);
468				++source;
469				if (width == 2) {
470					if (dest & 1) {
471						halfword |= byte << 8;
472						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
473					} else {
474						halfword = byte;
475					}
476				} else {
477					cpu->memory.store8(cpu, dest, byte, 0);
478				}
479				++dest;
480				--remaining;
481			}
482			blockheader <<= 1;
483			--blocksRemaining;
484		} else {
485			blockheader = cpu->memory.load8(cpu, source, 0);
486			++source;
487			blocksRemaining = 8;
488		}
489	}
490	cpu->gprs[0] = source;
491	cpu->gprs[1] = dest;
492	cpu->gprs[3] = 0;
493}
494
495DECL_BITFIELD(HuffmanNode, uint8_t);
496DECL_BITS(HuffmanNode, Offset, 0, 6);
497DECL_BIT(HuffmanNode, RTerm, 6);
498DECL_BIT(HuffmanNode, LTerm, 7);
499
500static void _unHuffman(struct GBA* gba) {
501	struct ARMCore* cpu = gba->cpu;
502	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
503	uint32_t dest = cpu->gprs[1];
504	uint32_t header = cpu->memory.load32(cpu, source, 0);
505	int remaining = header >> 8;
506	int bits = header & 0xF;
507	if (bits == 0) {
508		GBALog(gba, GBA_LOG_GAME_ERROR, "Invalid Huffman bits");
509		bits = 8;
510	}
511	if (32 % bits || bits == 1) {
512		GBALog(gba, GBA_LOG_STUB, "Unimplemented unaligned Huffman");
513		return;
514	}
515	// We assume the signature byte (0x20) is correct
516	int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
517	int block = 0;
518	uint32_t treeBase = source + 5;
519	source += 5 + treesize;
520	uint32_t nPointer = treeBase;
521	HuffmanNode node;
522	int bitsRemaining;
523	int readBits;
524	int bitsSeen = 0;
525	node = cpu->memory.load8(cpu, nPointer, 0);
526	while (remaining > 0) {
527		uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
528		source += 4;
529		for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
530			uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
531			if (bitstream & 0x80000000) {
532				// Go right
533				if (HuffmanNodeIsRTerm(node)) {
534					readBits = cpu->memory.load8(cpu, next + 1, 0);
535				} else {
536					nPointer = next + 1;
537					node = cpu->memory.load8(cpu, nPointer, 0);
538					continue;
539				}
540			} else {
541				// Go left
542				if (HuffmanNodeIsLTerm(node)) {
543					readBits = cpu->memory.load8(cpu, next, 0);
544				} else {
545					nPointer = next;
546					node = cpu->memory.load8(cpu, nPointer, 0);
547					continue;
548				}
549			}
550
551			block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
552			bitsSeen += bits;
553			nPointer = treeBase;
554			node = cpu->memory.load8(cpu, nPointer, 0);
555			if (bitsSeen == 32) {
556				bitsSeen = 0;
557				cpu->memory.store32(cpu, dest, block, 0);
558				dest += 4;
559				remaining -= 4;
560				block = 0;
561			}
562		}
563	}
564	cpu->gprs[0] = source;
565	cpu->gprs[1] = dest;
566}
567
568static void _unRl(struct GBA* gba, int width) {
569	struct ARMCore* cpu = gba->cpu;
570	uint32_t source = cpu->gprs[0];
571	int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
572	int padding = (4 - remaining) & 0x3;
573	// We assume the signature byte (0x30) is correct
574	int blockheader;
575	int block;
576	source += 4;
577	uint32_t dest = cpu->gprs[1];
578	int halfword = 0;
579	while (remaining > 0) {
580		blockheader = cpu->memory.load8(cpu, source, 0);
581		++source;
582		if (blockheader & 0x80) {
583			// Compressed
584			blockheader &= 0x7F;
585			blockheader += 3;
586			block = cpu->memory.load8(cpu, source, 0);
587			++source;
588			while (blockheader-- && remaining) {
589				--remaining;
590				if (width == 2) {
591					if (dest & 1) {
592						halfword |= block << 8;
593						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
594					} else {
595						halfword = block;
596					}
597				} else {
598					cpu->memory.store8(cpu, dest, block, 0);
599				}
600				++dest;
601			}
602		} else {
603			// Uncompressed
604			blockheader++;
605			while (blockheader-- && remaining) {
606				--remaining;
607				int byte = cpu->memory.load8(cpu, source, 0);
608				++source;
609				if (width == 2) {
610					if (dest & 1) {
611						halfword |= byte << 8;
612						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
613					} else {
614						halfword = byte;
615					}
616				} else {
617					cpu->memory.store8(cpu, dest, byte, 0);
618				}
619				++dest;
620			}
621		}
622	}
623	if (width == 2) {
624		if (dest & 1) {
625			--padding;
626			++dest;
627		}
628		for (; padding > 0; padding -= 2, dest += 2) {
629			cpu->memory.store16(cpu, dest, 0, 0);
630		}
631	} else {
632		while (padding--) {
633			cpu->memory.store8(cpu, dest, 0, 0);
634			++dest;
635		}
636	}
637	cpu->gprs[0] = source;
638	cpu->gprs[1] = dest;
639}
640
641static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
642	struct ARMCore* cpu = gba->cpu;
643	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
644	uint32_t dest = cpu->gprs[1];
645	uint32_t header = cpu->memory.load32(cpu, source, 0);
646	int remaining = header >> 8;
647	// We assume the signature nybble (0x8) is correct
648	uint16_t halfword = 0;
649	uint16_t old = 0;
650	source += 4;
651	while (remaining > 0) {
652		uint16_t new;
653		if (inwidth == 1) {
654			new = cpu->memory.load8(cpu, source, 0);
655		} else {
656			new = cpu->memory.load16(cpu, source, 0);
657		}
658		new += old;
659		if (outwidth > inwidth) {
660			halfword >>= 8;
661			halfword |= (new << 8);
662			if (source & 1) {
663				cpu->memory.store16(cpu, dest, halfword, 0);
664				dest += outwidth;
665				remaining -= outwidth;
666			}
667		} else if (outwidth == 1) {
668			cpu->memory.store8(cpu, dest, new, 0);
669			dest += outwidth;
670			remaining -= outwidth;
671		} else {
672			cpu->memory.store16(cpu, dest, new, 0);
673			dest += outwidth;
674			remaining -= outwidth;
675		}
676		old = new;
677		source += inwidth;
678	}
679	cpu->gprs[0] = source;
680	cpu->gprs[1] = dest;
681}