src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/gba/bios.h>
7
8#include <mgba/internal/arm/isa-inlines.h>
9#include <mgba/internal/arm/macros.h>
10#include <mgba/internal/gba/gba.h>
11#include <mgba/internal/gba/io.h>
12#include <mgba/internal/gba/memory.h>
13#include <mgba-util/math.h>
14
15const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
16const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
17
18mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
19
20static void _unLz77(struct GBA* gba, int width);
21static void _unHuffman(struct GBA* gba);
22static void _unRl(struct GBA* gba, int width);
23static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
24static void _unBitPack(struct GBA* gba);
25
26static int _mulWait(int32_t r) {
27 if ((r & 0xFFFFFF00) == 0xFFFFFF00 || !(r & 0xFFFFFF00)) {
28 return 1;
29 } else if ((r & 0xFFFF0000) == 0xFFFF0000 || !(r & 0xFFFF0000)) {
30 return 2;
31 } else if ((r & 0xFF000000) == 0xFF000000 || !(r & 0xFF000000)) {
32 return 3;
33 } else {
34 return 4;
35 }
36}
37
38static void _SoftReset(struct GBA* gba) {
39 struct ARMCore* cpu = gba->cpu;
40 ARMSetPrivilegeMode(cpu, MODE_IRQ);
41 cpu->spsr.packed = 0;
42 cpu->gprs[ARM_LR] = 0;
43 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
44 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
45 cpu->spsr.packed = 0;
46 cpu->gprs[ARM_LR] = 0;
47 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
48 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
49 cpu->gprs[ARM_LR] = 0;
50 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
51 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
52 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
53 if (flag) {
54 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
55 } else {
56 cpu->gprs[ARM_PC] = BASE_CART0;
57 }
58 _ARMSetMode(cpu, MODE_ARM);
59 ARMWritePC(cpu);
60}
61
62static void _RegisterRamReset(struct GBA* gba) {
63 uint32_t registers = gba->cpu->gprs[0];
64 struct ARMCore* cpu = gba->cpu;
65 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
66 if (registers & 0x01) {
67 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
68 }
69 if (registers & 0x02) {
70 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
71 }
72 if (registers & 0x04) {
73 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
74 }
75 if (registers & 0x08) {
76 memset(gba->video.vram, 0, SIZE_VRAM);
77 }
78 if (registers & 0x10) {
79 memset(gba->video.oam.raw, 0, SIZE_OAM);
80 }
81 if (registers & 0x20) {
82 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
86 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
87 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
88 }
89 if (registers & 0x40) {
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
91 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
92 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
93 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
94 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
104 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
105 }
106 if (registers & 0x80) {
107 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
109 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
112 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
113 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
114 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
115 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
118 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
119 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
122 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
125 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
126 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
128 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
131 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
132 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
165 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
166 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
167 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
168 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
169 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
170 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
171 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
172 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
173 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
174 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
175 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
176 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
177 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
178 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
179 }
180 if (registers & 0x9C) {
181 gba->video.renderer->reset(gba->video.renderer);
182 }
183}
184
185static void _BgAffineSet(struct GBA* gba) {
186 struct ARMCore* cpu = gba->cpu;
187 int i = cpu->gprs[2];
188 float ox, oy;
189 float cx, cy;
190 float sx, sy;
191 float theta;
192 int offset = cpu->gprs[0];
193 int destination = cpu->gprs[1];
194 float a, b, c, d;
195 float rx, ry;
196 while (i--) {
197 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
198 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
199 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
200 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
201 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
202 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
203 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
204 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
205 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
206 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
207 offset += 20;
208 // Rotation
209 a = d = cosf(theta);
210 b = c = sinf(theta);
211 // Scale
212 a *= sx;
213 b *= -sx;
214 c *= sy;
215 d *= sy;
216 // Translate
217 rx = ox - (a * cx + b * cy);
218 ry = oy - (c * cx + d * cy);
219 cpu->memory.store16(cpu, destination, a * 256, 0);
220 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
221 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
222 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
223 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
224 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
225 destination += 16;
226 }
227}
228
229static void _ObjAffineSet(struct GBA* gba) {
230 struct ARMCore* cpu = gba->cpu;
231 int i = cpu->gprs[2];
232 float sx, sy;
233 float theta;
234 int offset = cpu->gprs[0];
235 int destination = cpu->gprs[1];
236 int diff = cpu->gprs[3];
237 float a, b, c, d;
238 while (i--) {
239 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
240 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
241 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
242 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
243 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
244 offset += 8;
245 // Rotation
246 a = d = cosf(theta);
247 b = c = sinf(theta);
248 // Scale
249 a *= sx;
250 b *= -sx;
251 c *= sy;
252 d *= sy;
253 cpu->memory.store16(cpu, destination, a * 256, 0);
254 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
255 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
256 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
257 destination += diff * 4;
258 }
259}
260
261static void _MidiKey2Freq(struct GBA* gba) {
262 struct ARMCore* cpu = gba->cpu;
263
264 int oldRegion = gba->memory.activeRegion;
265 gba->memory.activeRegion = REGION_BIOS;
266 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
267 gba->memory.activeRegion = oldRegion;
268
269 cpu->gprs[0] = key / exp2f((180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
270}
271
272static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
273 struct ARMCore* cpu = gba->cpu;
274 if (denom != 0 && (denom != -1 || num != INT32_MIN)) {
275 div_t result = div(num, denom);
276 cpu->gprs[0] = result.quot;
277 cpu->gprs[1] = result.rem;
278 cpu->gprs[3] = abs(result.quot);
279 } else if (denom == 0) {
280 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
281 // If abs(num) > 1, this should hang, but that would be painful to
282 // emulate in HLE, and no game will get into a state where it hangs...
283 cpu->gprs[0] = (num < 0) ? -1 : 1;
284 cpu->gprs[1] = num;
285 cpu->gprs[3] = 1;
286 } else {
287 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide INT_MIN by -1!");
288 cpu->gprs[0] = INT32_MIN;
289 cpu->gprs[1] = 0;
290 cpu->gprs[3] = INT32_MIN;
291 }
292 int loops = clz32(denom) - clz32(num);
293 if (loops < 1) {
294 loops = 1;
295 }
296 cpu->cycles += 4 /* prologue */ + 13 * loops + 7 /* epilogue */;
297}
298
299static int16_t _ArcTan(int32_t i, int32_t* r1, int32_t* r3, int32_t* cycles) {
300 int currentCycles = 37;
301 currentCycles += _mulWait(i * i);
302 int32_t a = -((i * i) >> 14);
303 currentCycles += _mulWait(0xA9 * a);
304 int32_t b = ((0xA9 * a) >> 14) + 0x390;
305 currentCycles += _mulWait(b * a);
306 b = ((b * a) >> 14) + 0x91C;
307 currentCycles += _mulWait(b * a);
308 b = ((b * a) >> 14) + 0xFB6;
309 currentCycles += _mulWait(b * a);
310 b = ((b * a) >> 14) + 0x16AA;
311 currentCycles += _mulWait(b * a);
312 b = ((b * a) >> 14) + 0x2081;
313 currentCycles += _mulWait(b * a);
314 b = ((b * a) >> 14) + 0x3651;
315 currentCycles += _mulWait(b * a);
316 b = ((b * a) >> 14) + 0xA2F9;
317 if (r1) {
318 *r1 = a;
319 }
320 if (r3) {
321 *r3 = b;
322 }
323 *cycles += currentCycles;
324 return (i * b) >> 16;
325}
326
327static int16_t _ArcTan2(int32_t x, int32_t y, int32_t* r1, int32_t* cycles) {
328 if (!y) {
329 if (x >= 0) {
330 return 0;
331 }
332 return 0x8000;
333 }
334 if (!x) {
335 if (y >= 0) {
336 return 0x4000;
337 }
338 return 0xC000;
339 }
340 if (y >= 0) {
341 if (x >= 0) {
342 if (x >= y) {
343 return _ArcTan((y << 14) / x, r1, NULL, cycles);
344 }
345 } else if (-x >= y) {
346 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x8000;
347 }
348 return 0x4000 - _ArcTan((x << 14) / y, r1, NULL, cycles);
349 } else {
350 if (x <= 0) {
351 if (-x > -y) {
352 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x8000;
353 }
354 } else if (x >= -y) {
355 return _ArcTan((y << 14) / x, r1, NULL, cycles) + 0x10000;
356 }
357 return 0xC000 - _ArcTan((x << 14) / y, r1, NULL, cycles);
358 }
359}
360
361static int32_t _Sqrt(uint32_t x, int32_t* cycles) {
362 if (!x) {
363 *cycles += 53;
364 return 0;
365 }
366 int32_t currentCycles = 15;
367 uint32_t lower;
368 uint32_t upper = x;
369 uint32_t bound = 1;
370 while (bound < upper) {
371 upper >>= 1;
372 bound <<= 1;
373 currentCycles += 6;
374 }
375 while (true) {
376 currentCycles += 6;
377 upper = x;
378 uint32_t accum = 0;
379 lower = bound;
380 while (true) {
381 currentCycles += 5;
382 uint32_t oldLower = lower;
383 if (lower <= upper >> 1) {
384 lower <<= 1;
385 }
386 if (oldLower >= upper >> 1) {
387 break;
388 }
389 }
390 while (true) {
391 currentCycles += 8;
392 accum <<= 1;
393 if (upper >= lower) {
394 ++accum;
395 upper -= lower;
396 }
397 if (lower == bound) {
398 break;
399 }
400 lower >>= 1;
401 }
402 uint32_t oldBound = bound;
403 bound += accum;
404 bound >>= 1;
405 if (bound >= oldBound) {
406 bound = oldBound;
407 break;
408 }
409 }
410 *cycles += currentCycles;
411 return bound;
412}
413
414void GBASwi16(struct ARMCore* cpu, int immediate) {
415 struct GBA* gba = (struct GBA*) cpu->master;
416 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
417 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
418
419 switch (immediate) {
420 case 0xFA:
421 GBAPrintFlush(gba);
422 return;
423 }
424
425 if (gba->memory.fullBios) {
426 ARMRaiseSWI(cpu);
427 return;
428 }
429 switch (immediate) {
430 case GBA_SWI_SOFT_RESET:
431 _SoftReset(gba);
432 break;
433 case GBA_SWI_REGISTER_RAM_RESET:
434 _RegisterRamReset(gba);
435 break;
436 case GBA_SWI_HALT:
437 ARMRaiseSWI(cpu);
438 return;
439 case GBA_SWI_STOP:
440 GBAStop(gba);
441 break;
442 case GBA_SWI_VBLANK_INTR_WAIT:
443 // VBlankIntrWait
444 // Fall through:
445 case GBA_SWI_INTR_WAIT:
446 // IntrWait
447 ARMRaiseSWI(cpu);
448 return;
449 case GBA_SWI_DIV:
450 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
451 break;
452 case GBA_SWI_DIV_ARM:
453 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
454 break;
455 case GBA_SWI_SQRT:
456 cpu->gprs[0] = _Sqrt(cpu->gprs[0], &cpu->cycles);
457 break;
458 case GBA_SWI_ARCTAN:
459 cpu->gprs[0] = _ArcTan(cpu->gprs[0], &cpu->gprs[1], &cpu->gprs[3], &cpu->cycles);
460 break;
461 case GBA_SWI_ARCTAN2:
462 cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1], &cpu->gprs[1], &cpu->cycles);
463 cpu->gprs[3] = 0x170;
464 break;
465 case GBA_SWI_CPU_SET:
466 case GBA_SWI_CPU_FAST_SET:
467 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
468 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
469 break;
470 }
471 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
472 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
473 }
474 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
475 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
476 }
477 ARMRaiseSWI(cpu);
478 return;
479 case GBA_SWI_GET_BIOS_CHECKSUM:
480 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
481 cpu->gprs[1] = 1;
482 cpu->gprs[3] = SIZE_BIOS;
483 break;
484 case GBA_SWI_BG_AFFINE_SET:
485 _BgAffineSet(gba);
486 break;
487 case GBA_SWI_OBJ_AFFINE_SET:
488 _ObjAffineSet(gba);
489 break;
490 case GBA_SWI_BIT_UNPACK:
491 if (cpu->gprs[0] < BASE_WORKING_RAM) {
492 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
493 break;
494 }
495 switch (cpu->gprs[1] >> BASE_OFFSET) {
496 default:
497 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
498 // Fall through
499 case REGION_WORKING_RAM:
500 case REGION_WORKING_IRAM:
501 case REGION_VRAM:
502 _unBitPack(gba);
503 break;
504 }
505 break;
506 case GBA_SWI_LZ77_UNCOMP_WRAM:
507 case GBA_SWI_LZ77_UNCOMP_VRAM:
508 if (cpu->gprs[0] < BASE_WORKING_RAM) {
509 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
510 break;
511 }
512 switch (cpu->gprs[1] >> BASE_OFFSET) {
513 default:
514 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
515 // Fall through
516 case REGION_WORKING_RAM:
517 case REGION_WORKING_IRAM:
518 case REGION_VRAM:
519 _unLz77(gba, immediate == GBA_SWI_LZ77_UNCOMP_WRAM ? 1 : 2);
520 break;
521 }
522 break;
523 case GBA_SWI_HUFFMAN_UNCOMP:
524 if (cpu->gprs[0] < BASE_WORKING_RAM) {
525 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
526 break;
527 }
528 switch (cpu->gprs[1] >> BASE_OFFSET) {
529 default:
530 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
531 // Fall through
532 case REGION_WORKING_RAM:
533 case REGION_WORKING_IRAM:
534 case REGION_VRAM:
535 _unHuffman(gba);
536 break;
537 }
538 break;
539 case GBA_SWI_RL_UNCOMP_WRAM:
540 case GBA_SWI_RL_UNCOMP_VRAM:
541 if (cpu->gprs[0] < BASE_WORKING_RAM) {
542 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
543 break;
544 }
545 switch (cpu->gprs[1] >> BASE_OFFSET) {
546 default:
547 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
548 // Fall through
549 case REGION_WORKING_RAM:
550 case REGION_WORKING_IRAM:
551 case REGION_VRAM:
552 _unRl(gba, immediate == GBA_SWI_RL_UNCOMP_WRAM ? 1 : 2);
553 break;
554 }
555 break;
556 case GBA_SWI_DIFF_8BIT_UNFILTER_WRAM:
557 case GBA_SWI_DIFF_8BIT_UNFILTER_VRAM:
558 case GBA_SWI_DIFF_16BIT_UNFILTER:
559 if (cpu->gprs[0] < BASE_WORKING_RAM) {
560 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
561 break;
562 }
563 switch (cpu->gprs[1] >> BASE_OFFSET) {
564 default:
565 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
566 // Fall through
567 case REGION_WORKING_RAM:
568 case REGION_WORKING_IRAM:
569 case REGION_VRAM:
570 _unFilter(gba, immediate == GBA_SWI_DIFF_16BIT_UNFILTER ? 2 : 1, immediate == GBA_SWI_DIFF_8BIT_UNFILTER_WRAM ? 1 : 2);
571 break;
572 }
573 break;
574 case GBA_SWI_SOUND_BIAS:
575 // SoundBias is mostly meaningless here
576 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
577 break;
578 case GBA_SWI_MIDI_KEY_2_FREQ:
579 _MidiKey2Freq(gba);
580 break;
581 case GBA_SWI_SOUND_DRIVER_GET_JUMP_LIST:
582 ARMRaiseSWI(cpu);
583 return;
584 default:
585 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
586 }
587 gba->cpu->cycles += 45 + cpu->memory.activeNonseqCycles16 /* 8 bit load for SWI # */;
588 // Return cycles
589 if (gba->cpu->executionMode == MODE_ARM) {
590 gba->cpu->cycles += cpu->memory.activeNonseqCycles32 + cpu->memory.activeSeqCycles32;
591 } else {
592 gba->cpu->cycles += cpu->memory.activeNonseqCycles16 + cpu->memory.activeSeqCycles16;
593 }
594 gba->memory.biosPrefetch = 0xE3A02004;
595}
596
597void GBASwi32(struct ARMCore* cpu, int immediate) {
598 GBASwi16(cpu, immediate >> 16);
599}
600
601uint32_t GBAChecksum(uint32_t* memory, size_t size) {
602 size_t i;
603 uint32_t sum = 0;
604 for (i = 0; i < size; i += 4) {
605 sum += memory[i >> 2];
606 }
607 return sum;
608}
609
610static void _unLz77(struct GBA* gba, int width) {
611 struct ARMCore* cpu = gba->cpu;
612 uint32_t source = cpu->gprs[0];
613 uint32_t dest = cpu->gprs[1];
614 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
615 // We assume the signature byte (0x10) is correct
616 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
617 source += 4;
618 int blocksRemaining = 0;
619 uint32_t disp;
620 int bytes;
621 int byte;
622 int halfword = 0;
623 while (remaining > 0) {
624 if (blocksRemaining) {
625 if (blockheader & 0x80) {
626 // Compressed
627 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
628 source += 2;
629 disp = dest - (block & 0x0FFF) - 1;
630 bytes = (block >> 12) + 3;
631 while (bytes--) {
632 if (remaining) {
633 --remaining;
634 }
635 if (width == 2) {
636 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
637 if (dest & 1) {
638 byte >>= (disp & 1) * 8;
639 halfword |= byte << 8;
640 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
641 } else {
642 byte >>= (disp & 1) * 8;
643 halfword = byte & 0xFF;
644 }
645 } else {
646 byte = cpu->memory.load8(cpu, disp, 0);
647 cpu->memory.store8(cpu, dest, byte, 0);
648 }
649 ++disp;
650 ++dest;
651 }
652 } else {
653 // Uncompressed
654 byte = cpu->memory.load8(cpu, source, 0);
655 ++source;
656 if (width == 2) {
657 if (dest & 1) {
658 halfword |= byte << 8;
659 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
660 } else {
661 halfword = byte;
662 }
663 } else {
664 cpu->memory.store8(cpu, dest, byte, 0);
665 }
666 ++dest;
667 --remaining;
668 }
669 blockheader <<= 1;
670 --blocksRemaining;
671 } else {
672 blockheader = cpu->memory.load8(cpu, source, 0);
673 ++source;
674 blocksRemaining = 8;
675 }
676 }
677 cpu->gprs[0] = source;
678 cpu->gprs[1] = dest;
679 cpu->gprs[3] = 0;
680}
681
682DECL_BITFIELD(HuffmanNode, uint8_t);
683DECL_BITS(HuffmanNode, Offset, 0, 6);
684DECL_BIT(HuffmanNode, RTerm, 6);
685DECL_BIT(HuffmanNode, LTerm, 7);
686
687static void _unHuffman(struct GBA* gba) {
688 struct ARMCore* cpu = gba->cpu;
689 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
690 uint32_t dest = cpu->gprs[1];
691 uint32_t header = cpu->memory.load32(cpu, source, 0);
692 int remaining = header >> 8;
693 unsigned bits = header & 0xF;
694 if (bits == 0) {
695 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
696 bits = 8;
697 }
698 if (32 % bits || bits == 1) {
699 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
700 return;
701 }
702 // We assume the signature byte (0x20) is correct
703 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
704 int block = 0;
705 uint32_t treeBase = source + 5;
706 source += 5 + treesize;
707 uint32_t nPointer = treeBase;
708 HuffmanNode node;
709 int bitsRemaining;
710 int readBits;
711 int bitsSeen = 0;
712 node = cpu->memory.load8(cpu, nPointer, 0);
713 while (remaining > 0) {
714 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
715 source += 4;
716 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
717 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
718 if (bitstream & 0x80000000) {
719 // Go right
720 if (HuffmanNodeIsRTerm(node)) {
721 readBits = cpu->memory.load8(cpu, next + 1, 0);
722 } else {
723 nPointer = next + 1;
724 node = cpu->memory.load8(cpu, nPointer, 0);
725 continue;
726 }
727 } else {
728 // Go left
729 if (HuffmanNodeIsLTerm(node)) {
730 readBits = cpu->memory.load8(cpu, next, 0);
731 } else {
732 nPointer = next;
733 node = cpu->memory.load8(cpu, nPointer, 0);
734 continue;
735 }
736 }
737
738 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
739 bitsSeen += bits;
740 nPointer = treeBase;
741 node = cpu->memory.load8(cpu, nPointer, 0);
742 if (bitsSeen == 32) {
743 bitsSeen = 0;
744 cpu->memory.store32(cpu, dest, block, 0);
745 dest += 4;
746 remaining -= 4;
747 block = 0;
748 }
749 }
750 }
751 cpu->gprs[0] = source;
752 cpu->gprs[1] = dest;
753}
754
755static void _unRl(struct GBA* gba, int width) {
756 struct ARMCore* cpu = gba->cpu;
757 uint32_t source = cpu->gprs[0];
758 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
759 int padding = (4 - remaining) & 0x3;
760 // We assume the signature byte (0x30) is correct
761 int blockheader;
762 int block;
763 source += 4;
764 uint32_t dest = cpu->gprs[1];
765 int halfword = 0;
766 while (remaining > 0) {
767 blockheader = cpu->memory.load8(cpu, source, 0);
768 ++source;
769 if (blockheader & 0x80) {
770 // Compressed
771 blockheader &= 0x7F;
772 blockheader += 3;
773 block = cpu->memory.load8(cpu, source, 0);
774 ++source;
775 while (blockheader-- && remaining) {
776 --remaining;
777 if (width == 2) {
778 if (dest & 1) {
779 halfword |= block << 8;
780 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
781 } else {
782 halfword = block;
783 }
784 } else {
785 cpu->memory.store8(cpu, dest, block, 0);
786 }
787 ++dest;
788 }
789 } else {
790 // Uncompressed
791 blockheader++;
792 while (blockheader-- && remaining) {
793 --remaining;
794 int byte = cpu->memory.load8(cpu, source, 0);
795 ++source;
796 if (width == 2) {
797 if (dest & 1) {
798 halfword |= byte << 8;
799 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
800 } else {
801 halfword = byte;
802 }
803 } else {
804 cpu->memory.store8(cpu, dest, byte, 0);
805 }
806 ++dest;
807 }
808 }
809 }
810 if (width == 2) {
811 if (dest & 1) {
812 --padding;
813 ++dest;
814 }
815 for (; padding > 0; padding -= 2, dest += 2) {
816 cpu->memory.store16(cpu, dest, 0, 0);
817 }
818 } else {
819 while (padding--) {
820 cpu->memory.store8(cpu, dest, 0, 0);
821 ++dest;
822 }
823 }
824 cpu->gprs[0] = source;
825 cpu->gprs[1] = dest;
826}
827
828static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
829 struct ARMCore* cpu = gba->cpu;
830 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
831 uint32_t dest = cpu->gprs[1];
832 uint32_t header = cpu->memory.load32(cpu, source, 0);
833 int remaining = header >> 8;
834 // We assume the signature nybble (0x8) is correct
835 uint16_t halfword = 0;
836 uint16_t old = 0;
837 source += 4;
838 while (remaining > 0) {
839 uint16_t new;
840 if (inwidth == 1) {
841 new = cpu->memory.load8(cpu, source, 0);
842 } else {
843 new = cpu->memory.load16(cpu, source, 0);
844 }
845 new += old;
846 if (outwidth > inwidth) {
847 halfword >>= 8;
848 halfword |= (new << 8);
849 if (source & 1) {
850 cpu->memory.store16(cpu, dest, halfword, 0);
851 dest += outwidth;
852 remaining -= outwidth;
853 }
854 } else if (outwidth == 1) {
855 cpu->memory.store8(cpu, dest, new, 0);
856 dest += outwidth;
857 remaining -= outwidth;
858 } else {
859 cpu->memory.store16(cpu, dest, new, 0);
860 dest += outwidth;
861 remaining -= outwidth;
862 }
863 old = new;
864 source += inwidth;
865 }
866 cpu->gprs[0] = source;
867 cpu->gprs[1] = dest;
868}
869
870static void _unBitPack(struct GBA* gba) {
871 struct ARMCore* cpu = gba->cpu;
872 uint32_t source = cpu->gprs[0];
873 uint32_t dest = cpu->gprs[1];
874 uint32_t info = cpu->gprs[2];
875 unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
876 unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
877 unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
878 switch (sourceWidth) {
879 case 1:
880 case 2:
881 case 4:
882 case 8:
883 break;
884 default:
885 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
886 return;
887 }
888 switch (destWidth) {
889 case 1:
890 case 2:
891 case 4:
892 case 8:
893 case 16:
894 case 32:
895 break;
896 default:
897 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
898 return;
899 }
900 uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
901 uint8_t in = 0;
902 uint32_t out = 0;
903 int bitsRemaining = 0;
904 int bitsEaten = 0;
905 while (sourceLen > 0 || bitsRemaining) {
906 if (!bitsRemaining) {
907 in = cpu->memory.load8(cpu, source, 0);
908 bitsRemaining = 8;
909 ++source;
910 --sourceLen;
911 }
912 unsigned scaled = in & ((1 << sourceWidth) - 1);
913 in >>= sourceWidth;
914 if (scaled || bias & 0x80000000) {
915 scaled += bias & 0x7FFFFFFF;
916 }
917 bitsRemaining -= sourceWidth;
918 out |= scaled << bitsEaten;
919 bitsEaten += destWidth;
920 if (bitsEaten == 32) {
921 cpu->memory.store32(cpu, dest, out, 0);
922 bitsEaten = 0;
923 out = 0;
924 dest += 4;
925 }
926 }
927 cpu->gprs[0] = source;
928 cpu->gprs[1] = dest;
929}