all repos — mgba @ 92c6b90b03f8c04b53312bf2273d86a9783ee073

mGBA Game Boy Advance Emulator

src/gba/bios.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include "bios.h"
  7
  8#include "gba/gba.h"
  9#include "gba/io.h"
 10#include "gba/memory.h"
 11#include "isa-inlines.h"
 12
 13const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
 14const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
 15
 16static void _unLz77(struct GBA* gba, int width);
 17static void _unHuffman(struct GBA* gba);
 18static void _unRl(struct GBA* gba, int width);
 19static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
 20
 21static void _SoftReset(struct GBA* gba) {
 22	struct ARMCore* cpu = gba->cpu;
 23	ARMSetPrivilegeMode(cpu, MODE_IRQ);
 24	cpu->spsr.packed = 0;
 25	cpu->gprs[ARM_LR] = 0;
 26	cpu->gprs[ARM_SP] = SP_BASE_IRQ;
 27	ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
 28	cpu->spsr.packed = 0;
 29	cpu->gprs[ARM_LR] = 0;
 30	cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
 31	ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
 32	cpu->gprs[ARM_LR] = 0;
 33	cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
 34	int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
 35	memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
 36	if (flag) {
 37		cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
 38	} else {
 39		cpu->gprs[ARM_PC] = BASE_CART0;
 40	}
 41	_ARMSetMode(cpu, MODE_ARM);
 42	int currentCycles = 0;
 43	ARM_WRITE_PC;
 44}
 45
 46static void _RegisterRamReset(struct GBA* gba) {
 47	uint32_t registers = gba->cpu->gprs[0];
 48	struct ARMCore* cpu = gba->cpu;
 49	cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
 50	if (registers & 0x01) {
 51		memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
 52	}
 53	if (registers & 0x02) {
 54		memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
 55	}
 56	if (registers & 0x04) {
 57		memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
 58	}
 59	if (registers & 0x08) {
 60		memset(gba->video.renderer->vram, 0, SIZE_VRAM);
 61	}
 62	if (registers & 0x10) {
 63		memset(gba->video.oam.raw, 0, SIZE_OAM);
 64	}
 65	if (registers & 0x20) {
 66		cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
 67		cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
 68		cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
 69		cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
 70		cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV, 0, 0);
 71		cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS, 0, 0);
 72	}
 73	if (registers & 0x40) {
 74		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
 75		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
 76		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
 77		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
 78		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
 79		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
 80		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
 81		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
 82		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
 83		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
 84		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
 85		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
 86		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
 87		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
 88		memset(gba->audio.psg.ch3.wavedata, 0, sizeof(gba->audio.psg.ch3.wavedata));
 89	}
 90	if (registers & 0x80) {
 91		cpu->memory.store16(cpu, BASE_IO | 0x00, 0, 0);
 92		cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
 93		cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
 94		cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
 95		cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
 96		cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
 97		cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
 98		cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
 99		cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
100		cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
101		cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
102		cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
103		cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
104		cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
105		cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
106		cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
107		cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
108		cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
109		cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
110		cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
111		cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
112		cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
113		cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
114		cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
115		cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
116		cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
117		cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
118		cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
119		cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
120		cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
121		cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
122		cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
123		cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
124		cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
125		cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
126		cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
127		cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
128		cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
129		cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
130		cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
131		cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
132		cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
133		cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
134		cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
135		cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
136		cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
137		cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
138		cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
139		cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
140		cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
141		cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
142		cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
143		cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
144		cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
145		cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
146		cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
147		cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
148		cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
149		cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
150		cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
151		cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
152		cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
153		cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
154		cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
155		cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
156		cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
157		cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
158		cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
159		cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
160		cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
161		cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
162		cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
163		cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
164	}
165}
166
167static void _BgAffineSet(struct GBA* gba) {
168	struct ARMCore* cpu = gba->cpu;
169	int i = cpu->gprs[2];
170	float ox, oy;
171	float cx, cy;
172	float sx, sy;
173	float theta;
174	int offset = cpu->gprs[0];
175	int destination = cpu->gprs[1];
176	float a, b, c, d;
177	float rx, ry;
178	while (i--) {
179		// [ sx   0  0 ]   [ cos(theta)  -sin(theta)  0 ]   [ 1  0  cx - ox ]   [ A B rx ]
180		// [  0  sy  0 ] * [ sin(theta)   cos(theta)  0 ] * [ 0  1  cy - oy ] = [ C D ry ]
181		// [  0   0  1 ]   [     0            0       1 ]   [ 0  0     1    ]   [ 0 0  1 ]
182		ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
183		oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
184		cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
185		cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
186		sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
187		sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
188		theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
189		offset += 20;
190		// Rotation
191		a = d = cosf(theta);
192		b = c = sinf(theta);
193		// Scale
194		a *= sx;
195		b *= -sx;
196		c *= sy;
197		d *= sy;
198		// Translate
199		rx = ox - (a * cx + b * cy);
200		ry = oy - (c * cx + d * cy);
201		cpu->memory.store16(cpu, destination, a * 256, 0);
202		cpu->memory.store16(cpu, destination + 2, b * 256, 0);
203		cpu->memory.store16(cpu, destination + 4, c * 256, 0);
204		cpu->memory.store16(cpu, destination + 6, d * 256, 0);
205		cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
206		cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
207		destination += 16;
208	}
209}
210
211static void _ObjAffineSet(struct GBA* gba) {
212	struct ARMCore* cpu = gba->cpu;
213	int i = cpu->gprs[2];
214	float sx, sy;
215	float theta;
216	int offset = cpu->gprs[0];
217	int destination = cpu->gprs[1];
218	int diff = cpu->gprs[3];
219	float a, b, c, d;
220	while (i--) {
221		// [ sx   0 ]   [ cos(theta)  -sin(theta) ]   [ A B ]
222		// [  0  sy ] * [ sin(theta)   cos(theta) ] = [ C D ]
223		sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
224		sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
225		theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
226		offset += 8;
227		// Rotation
228		a = d = cosf(theta);
229		b = c = sinf(theta);
230		// Scale
231		a *= sx;
232		b *= -sx;
233		c *= sy;
234		d *= sy;
235		cpu->memory.store16(cpu, destination, a * 256, 0);
236		cpu->memory.store16(cpu, destination + diff, b * 256, 0);
237		cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
238		cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
239		destination += diff * 4;
240	}
241}
242
243static void _MidiKey2Freq(struct GBA* gba) {
244	struct ARMCore* cpu = gba->cpu;
245	uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
246	cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
247}
248
249static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
250	struct ARMCore* cpu = gba->cpu;
251	if (denom != 0) {
252		div_t result = div(num, denom);
253		cpu->gprs[0] = result.quot;
254		cpu->gprs[1] = result.rem;
255		cpu->gprs[3] = abs(result.quot);
256	} else {
257		GBALog(gba, GBA_LOG_GAME_ERROR, "Attempting to divide %i by zero!", num);
258		// If abs(num) > 1, this should hang, but that would be painful to
259		// emulate in HLE, and no game will get into a state where it hangs...
260		cpu->gprs[0] = (num < 0) ? -1 : 1;
261		cpu->gprs[1] = num;
262		cpu->gprs[3] = 1;
263	}
264}
265
266void GBASwi16(struct ARMCore* cpu, int immediate) {
267	struct GBA* gba = (struct GBA*) cpu->master;
268	GBALog(gba, GBA_LOG_SWI, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
269	    immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
270
271	if (gba->memory.fullBios) {
272		ARMRaiseSWI(cpu);
273		return;
274	}
275	switch (immediate) {
276	case 0x0:
277		_SoftReset(gba);
278		break;
279	case 0x1:
280		_RegisterRamReset(gba);
281		break;
282	case 0x2:
283		GBAHalt(gba);
284		break;
285	case 0x3:
286		GBAStop(gba);
287		break;
288	case 0x05:
289	// VBlankIntrWait
290	// Fall through:
291	case 0x04:
292		// IntrWait
293		ARMRaiseSWI(cpu);
294		break;
295	case 0x6:
296		_Div(gba, cpu->gprs[0], cpu->gprs[1]);
297		break;
298	case 0x7:
299		_Div(gba, cpu->gprs[1], cpu->gprs[0]);
300		break;
301	case 0x8:
302		cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
303		break;
304	case 0xA:
305		cpu->gprs[0] = atan2f(cpu->gprs[1] / 16384.f, cpu->gprs[0] / 16384.f) / (2 * M_PI) * 0x10000;
306		break;
307	case 0xB:
308	case 0xC:
309		if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
310			GBALog(gba, GBA_LOG_GAME_ERROR, "Cannot CpuSet from BIOS");
311			return;
312		}
313		if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
314			GBALog(gba, GBA_LOG_GAME_ERROR, "Misaligned CpuSet source");
315		}
316		if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
317			GBALog(gba, GBA_LOG_GAME_ERROR, "Misaligned CpuSet destination");
318		}
319		ARMRaiseSWI(cpu);
320		break;
321	case 0xD:
322		cpu->gprs[0] = GBA_BIOS_CHECKSUM;
323		cpu->gprs[1] = 1;
324		cpu->gprs[3] = SIZE_BIOS;
325		break;
326	case 0xE:
327		_BgAffineSet(gba);
328		break;
329	case 0xF:
330		_ObjAffineSet(gba);
331		break;
332	case 0x11:
333	case 0x12:
334		if (cpu->gprs[0] < BASE_WORKING_RAM) {
335			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad LZ77 source");
336			break;
337		}
338		switch (cpu->gprs[1] >> BASE_OFFSET) {
339		default:
340			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad LZ77 destination");
341		// Fall through
342		case REGION_WORKING_RAM:
343		case REGION_WORKING_IRAM:
344		case REGION_VRAM:
345			_unLz77(gba, immediate == 0x11 ? 1 : 2);
346			break;
347		}
348		break;
349	case 0x13:
350		if (cpu->gprs[0] < BASE_WORKING_RAM) {
351			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad Huffman source");
352			break;
353		}
354		switch (cpu->gprs[1] >> BASE_OFFSET) {
355		default:
356			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad Huffman destination");
357		// Fall through
358		case REGION_WORKING_RAM:
359		case REGION_WORKING_IRAM:
360		case REGION_VRAM:
361			_unHuffman(gba);
362			break;
363		}
364		break;
365	case 0x14:
366	case 0x15:
367		if (cpu->gprs[0] < BASE_WORKING_RAM) {
368			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad RL source");
369			break;
370		}
371		switch (cpu->gprs[1] >> BASE_OFFSET) {
372		default:
373			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad RL destination");
374		// Fall through
375		case REGION_WORKING_RAM:
376		case REGION_WORKING_IRAM:
377		case REGION_VRAM:
378			_unRl(gba, immediate == 0x14 ? 1 : 2);
379			break;
380		}
381		break;
382	case 0x16:
383	case 0x17:
384	case 0x18:
385		if (cpu->gprs[0] < BASE_WORKING_RAM) {
386			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad UnFilter source");
387			break;
388		}
389		switch (cpu->gprs[1] >> BASE_OFFSET) {
390		default:
391			GBALog(gba, GBA_LOG_GAME_ERROR, "Bad UnFilter destination");
392		// Fall through
393		case REGION_WORKING_RAM:
394		case REGION_WORKING_IRAM:
395		case REGION_VRAM:
396			_unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
397			break;
398		}
399		break;
400	case 0x19:
401		// SoundBias is mostly meaningless here
402		GBALog(gba, GBA_LOG_STUB, "Stub software interrupt: SoundBias (19)");
403		break;
404	case 0x1F:
405		_MidiKey2Freq(gba);
406		break;
407	default:
408		GBALog(gba, GBA_LOG_STUB, "Stub software interrupt: %02X", immediate);
409	}
410	gba->memory.biosPrefetch = 0xE3A02004;
411}
412
413void GBASwi32(struct ARMCore* cpu, int immediate) {
414	GBASwi16(cpu, immediate >> 16);
415}
416
417uint32_t GBAChecksum(uint32_t* memory, size_t size) {
418	size_t i;
419	uint32_t sum = 0;
420	for (i = 0; i < size; i += 4) {
421		sum += memory[i >> 2];
422	}
423	return sum;
424}
425
426static void _unLz77(struct GBA* gba, int width) {
427	struct ARMCore* cpu = gba->cpu;
428	uint32_t source = cpu->gprs[0];
429	uint32_t dest = cpu->gprs[1];
430	int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
431	// We assume the signature byte (0x10) is correct
432	int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
433	source += 4;
434	int blocksRemaining = 0;
435	uint32_t disp;
436	int bytes;
437	int byte;
438	int halfword = 0;
439	while (remaining > 0) {
440		if (blocksRemaining) {
441			if (blockheader & 0x80) {
442				// Compressed
443				int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
444				source += 2;
445				disp = dest - (block & 0x0FFF) - 1;
446				bytes = (block >> 12) + 3;
447				while (bytes-- && remaining) {
448					--remaining;
449					if (width == 2) {
450						byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
451						if (dest & 1) {
452							byte >>= (disp & 1) * 8;
453							halfword |= byte << 8;
454							cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
455						} else {
456							byte >>= (disp & 1) * 8;
457							halfword = byte & 0xFF;
458						}
459					} else {
460						byte = cpu->memory.load8(cpu, disp, 0);
461						cpu->memory.store8(cpu, dest, byte, 0);
462					}
463					++disp;
464					++dest;
465				}
466			} else {
467				// Uncompressed
468				byte = cpu->memory.load8(cpu, source, 0);
469				++source;
470				if (width == 2) {
471					if (dest & 1) {
472						halfword |= byte << 8;
473						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
474					} else {
475						halfword = byte;
476					}
477				} else {
478					cpu->memory.store8(cpu, dest, byte, 0);
479				}
480				++dest;
481				--remaining;
482			}
483			blockheader <<= 1;
484			--blocksRemaining;
485		} else {
486			blockheader = cpu->memory.load8(cpu, source, 0);
487			++source;
488			blocksRemaining = 8;
489		}
490	}
491	cpu->gprs[0] = source;
492	cpu->gprs[1] = dest;
493	cpu->gprs[3] = 0;
494}
495
496DECL_BITFIELD(HuffmanNode, uint8_t);
497DECL_BITS(HuffmanNode, Offset, 0, 6);
498DECL_BIT(HuffmanNode, RTerm, 6);
499DECL_BIT(HuffmanNode, LTerm, 7);
500
501static void _unHuffman(struct GBA* gba) {
502	struct ARMCore* cpu = gba->cpu;
503	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
504	uint32_t dest = cpu->gprs[1];
505	uint32_t header = cpu->memory.load32(cpu, source, 0);
506	int remaining = header >> 8;
507	int bits = header & 0xF;
508	if (bits == 0) {
509		GBALog(gba, GBA_LOG_GAME_ERROR, "Invalid Huffman bits");
510		bits = 8;
511	}
512	if (32 % bits || bits == 1) {
513		GBALog(gba, GBA_LOG_STUB, "Unimplemented unaligned Huffman");
514		return;
515	}
516	// We assume the signature byte (0x20) is correct
517	int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
518	int block = 0;
519	uint32_t treeBase = source + 5;
520	source += 5 + treesize;
521	uint32_t nPointer = treeBase;
522	HuffmanNode node;
523	int bitsRemaining;
524	int readBits;
525	int bitsSeen = 0;
526	node = cpu->memory.load8(cpu, nPointer, 0);
527	while (remaining > 0) {
528		uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
529		source += 4;
530		for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
531			uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
532			if (bitstream & 0x80000000) {
533				// Go right
534				if (HuffmanNodeIsRTerm(node)) {
535					readBits = cpu->memory.load8(cpu, next + 1, 0);
536				} else {
537					nPointer = next + 1;
538					node = cpu->memory.load8(cpu, nPointer, 0);
539					continue;
540				}
541			} else {
542				// Go left
543				if (HuffmanNodeIsLTerm(node)) {
544					readBits = cpu->memory.load8(cpu, next, 0);
545				} else {
546					nPointer = next;
547					node = cpu->memory.load8(cpu, nPointer, 0);
548					continue;
549				}
550			}
551
552			block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
553			bitsSeen += bits;
554			nPointer = treeBase;
555			node = cpu->memory.load8(cpu, nPointer, 0);
556			if (bitsSeen == 32) {
557				bitsSeen = 0;
558				cpu->memory.store32(cpu, dest, block, 0);
559				dest += 4;
560				remaining -= 4;
561				block = 0;
562			}
563		}
564	}
565	cpu->gprs[0] = source;
566	cpu->gprs[1] = dest;
567}
568
569static void _unRl(struct GBA* gba, int width) {
570	struct ARMCore* cpu = gba->cpu;
571	uint32_t source = cpu->gprs[0];
572	int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
573	int padding = (4 - remaining) & 0x3;
574	// We assume the signature byte (0x30) is correct
575	int blockheader;
576	int block;
577	source += 4;
578	uint32_t dest = cpu->gprs[1];
579	int halfword = 0;
580	while (remaining > 0) {
581		blockheader = cpu->memory.load8(cpu, source, 0);
582		++source;
583		if (blockheader & 0x80) {
584			// Compressed
585			blockheader &= 0x7F;
586			blockheader += 3;
587			block = cpu->memory.load8(cpu, source, 0);
588			++source;
589			while (blockheader-- && remaining) {
590				--remaining;
591				if (width == 2) {
592					if (dest & 1) {
593						halfword |= block << 8;
594						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
595					} else {
596						halfword = block;
597					}
598				} else {
599					cpu->memory.store8(cpu, dest, block, 0);
600				}
601				++dest;
602			}
603		} else {
604			// Uncompressed
605			blockheader++;
606			while (blockheader-- && remaining) {
607				--remaining;
608				int byte = cpu->memory.load8(cpu, source, 0);
609				++source;
610				if (width == 2) {
611					if (dest & 1) {
612						halfword |= byte << 8;
613						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
614					} else {
615						halfword = byte;
616					}
617				} else {
618					cpu->memory.store8(cpu, dest, byte, 0);
619				}
620				++dest;
621			}
622		}
623	}
624	if (width == 2) {
625		if (dest & 1) {
626			--padding;
627			++dest;
628		}
629		for (; padding > 0; padding -= 2, dest += 2) {
630			cpu->memory.store16(cpu, dest, 0, 0);
631		}
632	} else {
633		while (padding--) {
634			cpu->memory.store8(cpu, dest, 0, 0);
635			++dest;
636		}
637	}
638	cpu->gprs[0] = source;
639	cpu->gprs[1] = dest;
640}
641
642static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
643	struct ARMCore* cpu = gba->cpu;
644	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
645	uint32_t dest = cpu->gprs[1];
646	uint32_t header = cpu->memory.load32(cpu, source, 0);
647	int remaining = header >> 8;
648	// We assume the signature nybble (0x8) is correct
649	uint16_t halfword = 0;
650	uint16_t old = 0;
651	source += 4;
652	while (remaining > 0) {
653		uint16_t new;
654		if (inwidth == 1) {
655			new = cpu->memory.load8(cpu, source, 0);
656		} else {
657			new = cpu->memory.load16(cpu, source, 0);
658		}
659		new += old;
660		if (outwidth > inwidth) {
661			halfword >>= 8;
662			halfword |= (new << 8);
663			if (source & 1) {
664				cpu->memory.store16(cpu, dest, halfword, 0);
665				dest += outwidth;
666				remaining -= outwidth;
667			}
668		} else if (outwidth == 1) {
669			cpu->memory.store8(cpu, dest, new, 0);
670			dest += outwidth;
671			remaining -= outwidth;
672		} else {
673			cpu->memory.store16(cpu, dest, new, 0);
674			dest += outwidth;
675			remaining -= outwidth;
676		}
677		old = new;
678		source += inwidth;
679	}
680	cpu->gprs[0] = source;
681	cpu->gprs[1] = dest;
682}