src/isa-thumb.c (view raw)
1#include "isa-thumb.h"
2
3static const ThumbInstruction _thumbTable[0x400];
4
5// Instruction definitions
6// Beware pre-processor insanity
7
8#define APPLY(F, ...) F(__VA_ARGS__)
9
10#define COUNT_1(EMITTER, PREFIX, ...) \
11 EMITTER(PREFIX ## 0, 0, __VA_ARGS__) \
12 EMITTER(PREFIX ## 1, 1, __VA_ARGS__)
13
14#define COUNT_2(EMITTER, PREFIX, ...) \
15 COUNT_1(EMITTER, PREFIX, __VA_ARGS__) \
16 EMITTER(PREFIX ## 2, 2, __VA_ARGS__) \
17 EMITTER(PREFIX ## 3, 3, __VA_ARGS__)
18
19#define COUNT_3(EMITTER, PREFIX, ...) \
20 COUNT_2(EMITTER, PREFIX, __VA_ARGS__) \
21 EMITTER(PREFIX ## 4, 4, __VA_ARGS__) \
22 EMITTER(PREFIX ## 5, 5, __VA_ARGS__) \
23 EMITTER(PREFIX ## 6, 6, __VA_ARGS__) \
24 EMITTER(PREFIX ## 7, 7, __VA_ARGS__)
25
26#define COUNT_4(EMITTER, PREFIX, ...) \
27 COUNT_3(EMITTER, PREFIX, __VA_ARGS__) \
28 EMITTER(PREFIX ## 8, 8, __VA_ARGS__) \
29 EMITTER(PREFIX ## 9, 9, __VA_ARGS__) \
30 EMITTER(PREFIX ## A, 10, __VA_ARGS__) \
31 EMITTER(PREFIX ## B, 11, __VA_ARGS__) \
32 EMITTER(PREFIX ## C, 12, __VA_ARGS__) \
33 EMITTER(PREFIX ## D, 13, __VA_ARGS__) \
34 EMITTER(PREFIX ## E, 14, __VA_ARGS__) \
35 EMITTER(PREFIX ## F, 15, __VA_ARGS__)
36
37#define COUNT_5(EMITTER, PREFIX, ...) \
38 COUNT_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
39 EMITTER(PREFIX ## 10, 16, __VA_ARGS__) \
40 EMITTER(PREFIX ## 11, 17, __VA_ARGS__) \
41 EMITTER(PREFIX ## 12, 18, __VA_ARGS__) \
42 EMITTER(PREFIX ## 13, 19, __VA_ARGS__) \
43 EMITTER(PREFIX ## 14, 20, __VA_ARGS__) \
44 EMITTER(PREFIX ## 15, 21, __VA_ARGS__) \
45 EMITTER(PREFIX ## 16, 22, __VA_ARGS__) \
46 EMITTER(PREFIX ## 17, 23, __VA_ARGS__) \
47 EMITTER(PREFIX ## 18, 24, __VA_ARGS__) \
48 EMITTER(PREFIX ## 19, 25, __VA_ARGS__) \
49 EMITTER(PREFIX ## 1A, 26, __VA_ARGS__) \
50 EMITTER(PREFIX ## 1B, 27, __VA_ARGS__) \
51 EMITTER(PREFIX ## 1C, 28, __VA_ARGS__) \
52 EMITTER(PREFIX ## 1D, 29, __VA_ARGS__) \
53 EMITTER(PREFIX ## 1E, 30, __VA_ARGS__) \
54 EMITTER(PREFIX ## 1F, 31, __VA_ARGS__) \
55
56#define THUMB_WRITE_PC \
57 cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB) + WORD_SIZE_THUMB
58
59#define DEFINE_INSTRUCTION_THUMB(NAME, BODY) \
60 static void _ThumbInstruction ## NAME (struct ARMCore* cpu, uint16_t opcode) { \
61 BODY; \
62 }
63
64#define DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
65 DEFINE_INSTRUCTION_THUMB(NAME, \
66 int immediate = IMMEDIATE; \
67 BODY;)
68
69#define DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(NAME, BODY) \
70 COUNT_5(DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB, NAME ## _, BODY)
71
72DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LSL1, )
73DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LSR1, )
74DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(ASR1, )
75
76DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDR1, )
77DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDRB1, )
78DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDRH1, )
79DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STR1, )
80DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STRB1, )
81DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STRH1, )
82
83#define DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB(NAME, RM, BODY) \
84 DEFINE_INSTRUCTION_THUMB(NAME, \
85 int rm = RM; \
86 BODY;)
87
88#define DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(NAME, BODY) \
89 COUNT_3(DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB, NAME ## 3_R, BODY)
90
91DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(ADD, )
92DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(SUB, )
93
94#define DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
95 DEFINE_INSTRUCTION_THUMB(NAME, \
96 int immediate = IMMEDIATE; \
97 BODY;)
98
99#define DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(NAME, BODY) \
100 COUNT_3(DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
101
102DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(ADD, )
103DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(SUB, )
104
105#define DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB(NAME, RD, BODY) \
106 DEFINE_INSTRUCTION_THUMB(NAME, \
107 int rd = RD; \
108 BODY;)
109
110#define DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(NAME, BODY) \
111 COUNT_3(DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB, NAME ## _R, BODY)
112
113DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(ADD2, )
114DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(CMP1, )
115DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(MOV1, )
116DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(SUB2, )
117
118#define DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NAME, BODY) \
119 DEFINE_INSTRUCTION_THUMB(NAME, \
120 int rd = opcode & 0x0007; \
121 int rn = (opcode >> 3) & 0x0007; \
122 BODY;)
123
124DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(AND, )
125DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(EOR, )
126DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, )
127DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, )
128DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ASR2, )
129DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ADC, )
130DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(SBC, )
131DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ROR, )
132DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(TST, )
133DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NEG, )
134DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMP2, )
135DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMN, )
136DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ORR, )
137DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MUL, )
138DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(BIC, )
139DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MVN, )
140
141#define DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME, H1, H2, BODY) \
142 DEFINE_INSTRUCTION_THUMB(NAME, \
143 int rd = opcode & 0x0007 | H1; \
144 int rm = (opcode >> 3) & 0x0007 | H2; \
145 BODY;)
146
147#define DEFINE_INSTRUCTION_WITH_HIGH_THUMB(NAME, BODY) \
148 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 00, 0, 0, BODY) \
149 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 01, 0, 8, BODY) \
150 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 10, 8, 0, BODY) \
151 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 11, 8, 8, BODY)
152
153DEFINE_INSTRUCTION_WITH_HIGH_THUMB(ADD4, )
154DEFINE_INSTRUCTION_WITH_HIGH_THUMB(CMP3, )
155DEFINE_INSTRUCTION_WITH_HIGH_THUMB(MOV3, )
156
157#define DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB(NAME, RD, BODY) \
158 DEFINE_INSTRUCTION_THUMB(NAME, \
159 int rd = RD; \
160 BODY;)
161
162#define DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(NAME, BODY) \
163 COUNT_3(DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
164
165DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR3, )
166DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR4, )
167DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(STR3, )
168
169DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(ADD5, )
170DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(ADD6, )
171
172#define DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB(NAME, RM, BODY) \
173 DEFINE_INSTRUCTION_THUMB(NAME, \
174 int rm = RM; \
175 BODY;)
176
177#define DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(NAME, BODY) \
178 COUNT_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
179
180DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDR2, )
181DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRB2, )
182DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRH2, )
183DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRSB, )
184DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRSH, )
185DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STR2, )
186DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STRB2, )
187DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STRH2, )
188
189DEFINE_INSTRUCTION_THUMB(ADD7, )
190DEFINE_INSTRUCTION_THUMB(SUB4, )
191
192DEFINE_INSTRUCTION_THUMB(ILL, )
193DEFINE_INSTRUCTION_THUMB(BX, )
194
195#define DECLARE_INSTRUCTION_THUMB(EMITTER, NAME) \
196 EMITTER ## NAME
197
198#define DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, NAME) \
199 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 00), \
200 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 01), \
201 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 10), \
202 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 11)
203
204#define DUMMY(X, ...) X,
205#define DUMMY_4(...) \
206 DUMMY(__VA_ARGS__) \
207 DUMMY(__VA_ARGS__) \
208 DUMMY(__VA_ARGS__) \
209 DUMMY(__VA_ARGS__)
210
211#define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
212 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
213 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
214 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
215 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
216 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
217 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
218 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
219 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
220 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
221 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
222 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
223 DECLARE_INSTRUCTION_THUMB(EMITTER, AND), \
224 DECLARE_INSTRUCTION_THUMB(EMITTER, EOR), \
225 DECLARE_INSTRUCTION_THUMB(EMITTER, LSL2), \
226 DECLARE_INSTRUCTION_THUMB(EMITTER, LSR2), \
227 DECLARE_INSTRUCTION_THUMB(EMITTER, ASR2), \
228 DECLARE_INSTRUCTION_THUMB(EMITTER, ADC), \
229 DECLARE_INSTRUCTION_THUMB(EMITTER, SBC), \
230 DECLARE_INSTRUCTION_THUMB(EMITTER, ROR), \
231 DECLARE_INSTRUCTION_THUMB(EMITTER, TST), \
232 DECLARE_INSTRUCTION_THUMB(EMITTER, NEG), \
233 DECLARE_INSTRUCTION_THUMB(EMITTER, CMP2), \
234 DECLARE_INSTRUCTION_THUMB(EMITTER, CMN), \
235 DECLARE_INSTRUCTION_THUMB(EMITTER, ORR), \
236 DECLARE_INSTRUCTION_THUMB(EMITTER, MUL), \
237 DECLARE_INSTRUCTION_THUMB(EMITTER, BIC), \
238 DECLARE_INSTRUCTION_THUMB(EMITTER, MVN), \
239 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, ADD4), \
240 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, CMP3), \
241 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, MOV3), \
242 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
243 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
244 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
245 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
246 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR3_R)) \
247 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR2_R)) \
248 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH2_R)) \
249 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB2_R)) \
250 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSB_R)) \
251 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR2_R)) \
252 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH2_R)) \
253 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB2_R)) \
254 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSH_R)) \
255 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR1_)) \
256 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR1_)) \
257 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB1_)) \
258 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB1_)) \
259 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH1_)) \
260 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH1_)) \
261 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STR3_R)) \
262 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR4_R)) \
263 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD5_R)) \
264 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD6_R)) \
265 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
266 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
267 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
268 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
269
270static const ThumbInstruction _thumbTable[0x400] = {
271 DECLARE_THUMB_EMITTER_BLOCK(_ThumbInstruction)
272};