1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#ifndef GBA_MEMORY_H
  7#define GBA_MEMORY_H
  8
  9#include <mgba-util/common.h>
 10
 11CXX_GUARD_START
 12
 13#include <mgba/core/timing.h>
 14
 15#include <mgba/internal/arm/arm.h>
 16#include <mgba/internal/gba/dma.h>
 17#include <mgba/internal/gba/hardware.h>
 18#include <mgba/internal/gba/savedata.h>
 19#include <mgba/internal/gba/vfame.h>
 20
 21mLOG_DECLARE_CATEGORY(GBA_MEM);
 22
 23enum GBAMemoryRegion {
 24	REGION_BIOS = 0x0,
 25	REGION_WORKING_RAM = 0x2,
 26	REGION_WORKING_IRAM = 0x3,
 27	REGION_IO = 0x4,
 28	REGION_PALETTE_RAM = 0x5,
 29	REGION_VRAM = 0x6,
 30	REGION_OAM = 0x7,
 31	REGION_CART0 = 0x8,
 32	REGION_CART0_EX = 0x9,
 33	REGION_CART1 = 0xA,
 34	REGION_CART1_EX = 0xB,
 35	REGION_CART2 = 0xC,
 36	REGION_CART2_EX = 0xD,
 37	REGION_CART_SRAM = 0xE,
 38	REGION_CART_SRAM_MIRROR = 0xF
 39};
 40
 41enum GBAMemoryBase {
 42	BASE_BIOS = 0x00000000,
 43	BASE_WORKING_RAM = 0x02000000,
 44	BASE_WORKING_IRAM = 0x03000000,
 45	BASE_IO = 0x04000000,
 46	BASE_PALETTE_RAM = 0x05000000,
 47	BASE_VRAM = 0x06000000,
 48	BASE_OAM = 0x07000000,
 49	BASE_CART0 = 0x08000000,
 50	BASE_CART0_EX = 0x09000000,
 51	BASE_CART1 = 0x0A000000,
 52	BASE_CART1_EX = 0x0B000000,
 53	BASE_CART2 = 0x0C000000,
 54	BASE_CART2_EX = 0x0D000000,
 55	BASE_CART_SRAM = 0x0E000000,
 56	BASE_CART_SRAM_MIRROR = 0x0F000000
 57};
 58
 59enum {
 60	SIZE_BIOS = 0x00004000,
 61	SIZE_WORKING_RAM = 0x00040000,
 62	SIZE_WORKING_IRAM = 0x00008000,
 63	SIZE_IO = 0x00000400,
 64	SIZE_PALETTE_RAM = 0x00000400,
 65	SIZE_VRAM = 0x00018000,
 66	SIZE_OAM = 0x00000400,
 67	SIZE_CART0 = 0x02000000,
 68	SIZE_CART1 = 0x02000000,
 69	SIZE_CART2 = 0x02000000,
 70	SIZE_CART_SRAM = 0x00010000,
 71	SIZE_CART_FLASH512 = 0x00010000,
 72	SIZE_CART_FLASH1M = 0x00020000,
 73	SIZE_CART_EEPROM = 0x00002000
 74};
 75
 76enum {
 77	OFFSET_MASK = 0x00FFFFFF,
 78	BASE_OFFSET = 24
 79};
 80
 81struct GBAMemory {
 82	uint32_t* bios;
 83	uint32_t* wram;
 84	uint32_t* iwram;
 85	uint32_t* rom;
 86	uint16_t io[512];
 87
 88	struct GBACartridgeHardware hw;
 89	struct GBASavedata savedata;
 90	struct GBAVFameCart vfame;
 91	size_t romSize;
 92	uint32_t romMask;
 93	uint16_t romID;
 94	int fullBios;
 95
 96	char waitstatesSeq32[256];
 97	char waitstatesSeq16[256];
 98	char waitstatesNonseq32[256];
 99	char waitstatesNonseq16[256];
100	int activeRegion;
101	bool prefetch;
102	uint32_t lastPrefetchedPc;
103	uint32_t biosPrefetch;
104
105	struct GBADMA dma[4];
106	struct mTimingEvent dmaEvent;
107	int activeDMA;
108
109	bool mirroring;
110};
111
112struct GBA;
113void GBAMemoryInit(struct GBA* gba);
114void GBAMemoryDeinit(struct GBA* gba);
115
116void GBAMemoryReset(struct GBA* gba);
117
118uint32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
119uint32_t GBALoad16(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
120uint32_t GBALoad8(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
121
122uint32_t GBALoadBad(struct ARMCore* cpu);
123
124void GBAStore32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycleCounter);
125void GBAStore16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycleCounter);
126void GBAStore8(struct ARMCore* cpu, uint32_t address, int8_t value, int* cycleCounter);
127
128uint32_t GBAView32(struct ARMCore* cpu, uint32_t address);
129uint16_t GBAView16(struct ARMCore* cpu, uint32_t address);
130uint8_t GBAView8(struct ARMCore* cpu, uint32_t address);
131
132void GBAPatch32(struct ARMCore* cpu, uint32_t address, int32_t value, int32_t* old);
133void GBAPatch16(struct ARMCore* cpu, uint32_t address, int16_t value, int16_t* old);
134void GBAPatch8(struct ARMCore* cpu, uint32_t address, int8_t value, int8_t* old);
135
136uint32_t GBALoadMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction,
137                         int* cycleCounter);
138uint32_t GBAStoreMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction,
139                          int* cycleCounter);
140
141void GBAAdjustWaitstates(struct GBA* gba, uint16_t parameters);
142
143struct GBASerializedState;
144void GBAMemorySerialize(const struct GBAMemory* memory, struct GBASerializedState* state);
145void GBAMemoryDeserialize(struct GBAMemory* memory, const struct GBASerializedState* state);
146
147CXX_GUARD_END
148
149#endif