cinema/gb/mooneye-gb/acceptance/oam_dma/reg_read/test.sym (view raw)
1; this file was created with wlalink by ville helin <vhelin@iki.fi>.
2; wla symbolic information for "/home/vicki/Scratch/mooneye-gb/tests/build/acceptance/oam_dma/reg_read.gb".
3
4[labels]
501:48b9 clear_vram
601:4884 disable_lcd_safe
701:488a disable_lcd_safe@wait_ly_0
801:48c3 memcpy
901:48cc memset
1001:48dc print_inline_string
1101:48a2 print_load_font
1201:48ae print_newline
1301:48d5 print_string
1401:47f0 quit
1501:4805 quit@cb_return
1601:480a quit@wait_ly_1
1701:4810 quit@wait_ly_2
1801:4816 quit@wait_ly_3
1901:481c quit@wait_ly_4
2001:4826 quit@success
2101:484d quit@failure
2201:486c quit@halt
2301:486d quit@halt_execution_0
2401:4870 reset_screen
2501:4893 serial_send_byte
2601:4000 font
2700:0150 main
2800:0156 prepare_part1
2900:0162 round1
3000:016e round2
3100:017a prepare_part2
3200:0186 round3
3300:0190 round4
3400:019a prepare_part3
3500:01a6 round5
3600:01b2 round6
3700:01be finish
3800:01c5 finish@quit_inline_1
3900:01d6 fail_round1
4000:01dd fail_round1@quit_inline_2
4100:01ef fail_round2
4200:01f6 fail_round2@quit_inline_3
4300:0208 fail_round3
4400:020f fail_round3@quit_inline_4
4500:0221 fail_round4
4600:0228 fail_round4@quit_inline_5
4700:023a fail_round5
4800:0241 fail_round5@quit_inline_6
4900:0253 fail_round6
5000:025a fail_round6@quit_inline_7
5100:026c dma_proc1
5200:0274 dma_proc2
5300:027e dma_proc3
5400:0289 _end_dma_procs
5500:ff80 hram.dma_proc
56
57[definitions]
580000000a _sizeof_clear_vram
590000000f _sizeof_disable_lcd_safe
6000000009 _sizeof_memcpy
6100000009 _sizeof_memset
6200000006 _sizeof_print_inline_string
630000000c _sizeof_print_load_font
640000000b _sizeof_print_newline
6500000007 _sizeof_print_string
6600000080 _sizeof_quit
6700000014 _sizeof_reset_screen
680000000f _sizeof_serial_send_byte
69000007f0 _sizeof_font
7000000010 _sizeof_hram.dma_proc
7100000006 _sizeof_main
720000000c _sizeof_prepare_part1
730000000c _sizeof_round1
740000000c _sizeof_round2
750000000c _sizeof_prepare_part2
760000000a _sizeof_round3
770000000a _sizeof_round4
780000000c _sizeof_prepare_part3
790000000c _sizeof_round5
800000000c _sizeof_round6
8100000018 _sizeof_finish
8200000019 _sizeof_fail_round1
8300000019 _sizeof_fail_round2
8400000019 _sizeof_fail_round3
8500000019 _sizeof_fail_round4
8600000019 _sizeof_fail_round5
8700000019 _sizeof_fail_round6
8800000008 _sizeof_dma_proc1
890000000a _sizeof_dma_proc2
900000000b _sizeof_dma_proc3