all repos — mgba @ b154457857d3367a4c0196a4abadeeb6c850ffdf

mGBA Game Boy Advance Emulator

src/gba/bios.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/gba/bios.h>
  7
  8#include <mgba/internal/arm/isa-inlines.h>
  9#include <mgba/internal/arm/macros.h>
 10#include <mgba/internal/gba/gba.h>
 11#include <mgba/internal/gba/io.h>
 12#include <mgba/internal/gba/memory.h>
 13
 14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
 15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
 16
 17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
 18
 19static void _unLz77(struct GBA* gba, int width);
 20static void _unHuffman(struct GBA* gba);
 21static void _unRl(struct GBA* gba, int width);
 22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
 23static void _unBitPack(struct GBA* gba);
 24
 25static void _SoftReset(struct GBA* gba) {
 26	struct ARMCore* cpu = gba->cpu;
 27	ARMSetPrivilegeMode(cpu, MODE_IRQ);
 28	cpu->spsr.packed = 0;
 29	cpu->gprs[ARM_LR] = 0;
 30	cpu->gprs[ARM_SP] = SP_BASE_IRQ;
 31	ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
 32	cpu->spsr.packed = 0;
 33	cpu->gprs[ARM_LR] = 0;
 34	cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
 35	ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
 36	cpu->gprs[ARM_LR] = 0;
 37	cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
 38	int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
 39	memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
 40	if (flag) {
 41		cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
 42	} else {
 43		cpu->gprs[ARM_PC] = BASE_CART0;
 44	}
 45	_ARMSetMode(cpu, MODE_ARM);
 46	int currentCycles = 0;
 47	ARM_WRITE_PC;
 48}
 49
 50static void _RegisterRamReset(struct GBA* gba) {
 51	uint32_t registers = gba->cpu->gprs[0];
 52	struct ARMCore* cpu = gba->cpu;
 53	cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
 54	if (registers & 0x01) {
 55		memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
 56	}
 57	if (registers & 0x02) {
 58		memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
 59	}
 60	if (registers & 0x04) {
 61		memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
 62	}
 63	if (registers & 0x08) {
 64		memset(gba->video.renderer->vram, 0, SIZE_VRAM);
 65	}
 66	if (registers & 0x10) {
 67		memset(gba->video.oam.raw, 0, SIZE_OAM);
 68	}
 69	if (registers & 0x20) {
 70		cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
 71		cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
 72		cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
 73		cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
 74		cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
 75		cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
 76	}
 77	if (registers & 0x40) {
 78		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
 79		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
 80		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
 81		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
 82		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
 83		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
 84		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
 85		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
 86		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
 87		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
 88		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
 89		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
 90		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
 91		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
 92		memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
 93	}
 94	if (registers & 0x80) {
 95		cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
 96		cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
 97		cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
 98		cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
 99		cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
100		cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
101		cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
102		cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
103		cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
104		cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
105		cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
106		cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
107		cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
108		cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
109		cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
110		cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
111		cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
112		cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
113		cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
114		cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
115		cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
116		cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
117		cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
118		cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
119		cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
120		cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
121		cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
122		cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
123		cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
124		cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
125		cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
126		cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
127		cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
128		cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
129		cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
130		cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
131		cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
132		cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
133		cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
134		cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
135		cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
136		cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
137		cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
138		cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
139		cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
140		cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
141		cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
142		cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
143		cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
144		cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
145		cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
146		cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
147		cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
148		cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
149		cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
150		cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
151		cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
152		cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
153		cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
154		cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
155		cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
156		cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
157		cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
158		cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
159		cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
160		cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
161		cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
162		cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
163		cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
164		cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
165		cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
166		cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
167	}
168}
169
170static void _BgAffineSet(struct GBA* gba) {
171	struct ARMCore* cpu = gba->cpu;
172	int i = cpu->gprs[2];
173	float ox, oy;
174	float cx, cy;
175	float sx, sy;
176	float theta;
177	int offset = cpu->gprs[0];
178	int destination = cpu->gprs[1];
179	float a, b, c, d;
180	float rx, ry;
181	while (i--) {
182		// [ sx   0  0 ]   [ cos(theta)  -sin(theta)  0 ]   [ 1  0  cx - ox ]   [ A B rx ]
183		// [  0  sy  0 ] * [ sin(theta)   cos(theta)  0 ] * [ 0  1  cy - oy ] = [ C D ry ]
184		// [  0   0  1 ]   [     0            0       1 ]   [ 0  0     1    ]   [ 0 0  1 ]
185		ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
186		oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
187		cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
188		cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
189		sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
190		sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
191		theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
192		offset += 20;
193		// Rotation
194		a = d = cosf(theta);
195		b = c = sinf(theta);
196		// Scale
197		a *= sx;
198		b *= -sx;
199		c *= sy;
200		d *= sy;
201		// Translate
202		rx = ox - (a * cx + b * cy);
203		ry = oy - (c * cx + d * cy);
204		cpu->memory.store16(cpu, destination, a * 256, 0);
205		cpu->memory.store16(cpu, destination + 2, b * 256, 0);
206		cpu->memory.store16(cpu, destination + 4, c * 256, 0);
207		cpu->memory.store16(cpu, destination + 6, d * 256, 0);
208		cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
209		cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
210		destination += 16;
211	}
212}
213
214static void _ObjAffineSet(struct GBA* gba) {
215	struct ARMCore* cpu = gba->cpu;
216	int i = cpu->gprs[2];
217	float sx, sy;
218	float theta;
219	int offset = cpu->gprs[0];
220	int destination = cpu->gprs[1];
221	int diff = cpu->gprs[3];
222	float a, b, c, d;
223	while (i--) {
224		// [ sx   0 ]   [ cos(theta)  -sin(theta) ]   [ A B ]
225		// [  0  sy ] * [ sin(theta)   cos(theta) ] = [ C D ]
226		sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
227		sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
228		theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
229		offset += 8;
230		// Rotation
231		a = d = cosf(theta);
232		b = c = sinf(theta);
233		// Scale
234		a *= sx;
235		b *= -sx;
236		c *= sy;
237		d *= sy;
238		cpu->memory.store16(cpu, destination, a * 256, 0);
239		cpu->memory.store16(cpu, destination + diff, b * 256, 0);
240		cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
241		cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
242		destination += diff * 4;
243	}
244}
245
246static void _MidiKey2Freq(struct GBA* gba) {
247	struct ARMCore* cpu = gba->cpu;
248
249	int oldRegion = gba->memory.activeRegion;
250	gba->memory.activeRegion = REGION_BIOS;
251	uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
252	gba->memory.activeRegion = oldRegion;
253
254	cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
255}
256
257static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
258	struct ARMCore* cpu = gba->cpu;
259	if (denom != 0) {
260		div_t result = div(num, denom);
261		cpu->gprs[0] = result.quot;
262		cpu->gprs[1] = result.rem;
263		cpu->gprs[3] = abs(result.quot);
264	} else {
265		mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
266		// If abs(num) > 1, this should hang, but that would be painful to
267		// emulate in HLE, and no game will get into a state where it hangs...
268		cpu->gprs[0] = (num < 0) ? -1 : 1;
269		cpu->gprs[1] = num;
270		cpu->gprs[3] = 1;
271	}
272}
273
274static int16_t _ArcTan(int32_t i) {
275	int32_t a = -((i * i) >> 14);
276	int32_t b = ((0xA9 * a) >> 14) + 0x390;
277	b = ((b * a) >> 14) + 0x91C;
278	b = ((b * a) >> 14) + 0xFB6;
279	b = ((b * a) >> 14) + 0x16AA;
280	b = ((b * a) >> 14) + 0x2081;
281	b = ((b * a) >> 14) + 0x3651;
282	b = ((b * a) >> 14) + 0xA2F9;
283	return (i * b) >> 16;
284}
285
286static int16_t _ArcTan2(int32_t x, int32_t y) {
287	if (!y) {
288		if (x >= 0) {
289			return 0;
290		}
291		return 0x8000;
292	}
293	if (!x) {
294		if (y >= 0) {
295			return 0x4000;
296		}
297		return 0xC000;
298	}
299	if (y >= 0) {
300		if (x >= 0) {
301			if (x >= y) {
302				return _ArcTan((y << 14) / x);
303			}
304		} else if (-x >= y) {
305			return _ArcTan((y << 14) / x) + 0x8000;
306		}
307		return 0x4000 - _ArcTan((x << 14) / y);
308	} else {
309		if (x <= 0) {
310			if (-x > -y) {
311				return _ArcTan((y << 14) / x) + 0x8000;
312			}
313		} else if (x >= -y) {
314			return _ArcTan((y << 14) / x) + 0x10000;
315		}
316		return 0xC000 - _ArcTan((x << 14) / y);
317	}
318}
319
320void GBASwi16(struct ARMCore* cpu, int immediate) {
321	struct GBA* gba = (struct GBA*) cpu->master;
322	mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
323	    immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
324
325	if (gba->memory.fullBios) {
326		ARMRaiseSWI(cpu);
327		return;
328	}
329	switch (immediate) {
330	case 0x0:
331		_SoftReset(gba);
332		break;
333	case 0x1:
334		_RegisterRamReset(gba);
335		break;
336	case 0x2:
337		GBAHalt(gba);
338		break;
339	case 0x3:
340		GBAStop(gba);
341		break;
342	case 0x05:
343	// VBlankIntrWait
344	// Fall through:
345	case 0x04:
346		// IntrWait
347		ARMRaiseSWI(cpu);
348		break;
349	case 0x6:
350		_Div(gba, cpu->gprs[0], cpu->gprs[1]);
351		break;
352	case 0x7:
353		_Div(gba, cpu->gprs[1], cpu->gprs[0]);
354		break;
355	case 0x8:
356		cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
357		break;
358	case 0x9:
359		cpu->gprs[0] = _ArcTan(cpu->gprs[0]);
360		break;
361	case 0xA:
362		cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1]);
363		cpu->gprs[3] = 0x170;
364		break;
365	case 0xB:
366	case 0xC:
367		if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
368			mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
369			break;
370		}
371		if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
372			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
373		}
374		if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
375			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
376		}
377		ARMRaiseSWI(cpu);
378		break;
379	case 0xD:
380		cpu->gprs[0] = GBA_BIOS_CHECKSUM;
381		cpu->gprs[1] = 1;
382		cpu->gprs[3] = SIZE_BIOS;
383		break;
384	case 0xE:
385		_BgAffineSet(gba);
386		break;
387	case 0xF:
388		_ObjAffineSet(gba);
389		break;
390	case 0x10:
391		if (cpu->gprs[0] < BASE_WORKING_RAM) {
392			mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
393			break;
394		}
395		switch (cpu->gprs[1] >> BASE_OFFSET) {
396		default:
397			mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
398		// Fall through
399		case REGION_WORKING_RAM:
400		case REGION_WORKING_IRAM:
401		case REGION_VRAM:
402			_unBitPack(gba);
403			break;
404		}
405		break;
406	case 0x11:
407	case 0x12:
408		if (cpu->gprs[0] < BASE_WORKING_RAM) {
409			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
410			break;
411		}
412		switch (cpu->gprs[1] >> BASE_OFFSET) {
413		default:
414			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
415		// Fall through
416		case REGION_WORKING_RAM:
417		case REGION_WORKING_IRAM:
418		case REGION_VRAM:
419			_unLz77(gba, immediate == 0x11 ? 1 : 2);
420			break;
421		}
422		break;
423	case 0x13:
424		if (cpu->gprs[0] < BASE_WORKING_RAM) {
425			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
426			break;
427		}
428		switch (cpu->gprs[1] >> BASE_OFFSET) {
429		default:
430			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
431		// Fall through
432		case REGION_WORKING_RAM:
433		case REGION_WORKING_IRAM:
434		case REGION_VRAM:
435			_unHuffman(gba);
436			break;
437		}
438		break;
439	case 0x14:
440	case 0x15:
441		if (cpu->gprs[0] < BASE_WORKING_RAM) {
442			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
443			break;
444		}
445		switch (cpu->gprs[1] >> BASE_OFFSET) {
446		default:
447			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
448		// Fall through
449		case REGION_WORKING_RAM:
450		case REGION_WORKING_IRAM:
451		case REGION_VRAM:
452			_unRl(gba, immediate == 0x14 ? 1 : 2);
453			break;
454		}
455		break;
456	case 0x16:
457	case 0x17:
458	case 0x18:
459		if (cpu->gprs[0] < BASE_WORKING_RAM) {
460			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
461			break;
462		}
463		switch (cpu->gprs[1] >> BASE_OFFSET) {
464		default:
465			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
466		// Fall through
467		case REGION_WORKING_RAM:
468		case REGION_WORKING_IRAM:
469		case REGION_VRAM:
470			_unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
471			break;
472		}
473		break;
474	case 0x19:
475		// SoundBias is mostly meaningless here
476		mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
477		break;
478	case 0x1F:
479		_MidiKey2Freq(gba);
480		break;
481	default:
482		mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
483	}
484	gba->memory.biosPrefetch = 0xE3A02004;
485}
486
487void GBASwi32(struct ARMCore* cpu, int immediate) {
488	GBASwi16(cpu, immediate >> 16);
489}
490
491uint32_t GBAChecksum(uint32_t* memory, size_t size) {
492	size_t i;
493	uint32_t sum = 0;
494	for (i = 0; i < size; i += 4) {
495		sum += memory[i >> 2];
496	}
497	return sum;
498}
499
500static void _unLz77(struct GBA* gba, int width) {
501	struct ARMCore* cpu = gba->cpu;
502	uint32_t source = cpu->gprs[0];
503	uint32_t dest = cpu->gprs[1];
504	int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
505	// We assume the signature byte (0x10) is correct
506	int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
507	source += 4;
508	int blocksRemaining = 0;
509	uint32_t disp;
510	int bytes;
511	int byte;
512	int halfword = 0;
513	while (remaining > 0) {
514		if (blocksRemaining) {
515			if (blockheader & 0x80) {
516				// Compressed
517				int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
518				source += 2;
519				disp = dest - (block & 0x0FFF) - 1;
520				bytes = (block >> 12) + 3;
521				while (bytes-- && remaining) {
522					--remaining;
523					if (width == 2) {
524						byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
525						if (dest & 1) {
526							byte >>= (disp & 1) * 8;
527							halfword |= byte << 8;
528							cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
529						} else {
530							byte >>= (disp & 1) * 8;
531							halfword = byte & 0xFF;
532						}
533					} else {
534						byte = cpu->memory.load8(cpu, disp, 0);
535						cpu->memory.store8(cpu, dest, byte, 0);
536					}
537					++disp;
538					++dest;
539				}
540			} else {
541				// Uncompressed
542				byte = cpu->memory.load8(cpu, source, 0);
543				++source;
544				if (width == 2) {
545					if (dest & 1) {
546						halfword |= byte << 8;
547						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
548					} else {
549						halfword = byte;
550					}
551				} else {
552					cpu->memory.store8(cpu, dest, byte, 0);
553				}
554				++dest;
555				--remaining;
556			}
557			blockheader <<= 1;
558			--blocksRemaining;
559		} else {
560			blockheader = cpu->memory.load8(cpu, source, 0);
561			++source;
562			blocksRemaining = 8;
563		}
564	}
565	cpu->gprs[0] = source;
566	cpu->gprs[1] = dest;
567	cpu->gprs[3] = 0;
568}
569
570DECL_BITFIELD(HuffmanNode, uint8_t);
571DECL_BITS(HuffmanNode, Offset, 0, 6);
572DECL_BIT(HuffmanNode, RTerm, 6);
573DECL_BIT(HuffmanNode, LTerm, 7);
574
575static void _unHuffman(struct GBA* gba) {
576	struct ARMCore* cpu = gba->cpu;
577	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
578	uint32_t dest = cpu->gprs[1];
579	uint32_t header = cpu->memory.load32(cpu, source, 0);
580	int remaining = header >> 8;
581	unsigned bits = header & 0xF;
582	if (bits == 0) {
583		mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
584		bits = 8;
585	}
586	if (32 % bits || bits == 1) {
587		mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
588		return;
589	}
590	// We assume the signature byte (0x20) is correct
591	int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
592	int block = 0;
593	uint32_t treeBase = source + 5;
594	source += 5 + treesize;
595	uint32_t nPointer = treeBase;
596	HuffmanNode node;
597	int bitsRemaining;
598	int readBits;
599	int bitsSeen = 0;
600	node = cpu->memory.load8(cpu, nPointer, 0);
601	while (remaining > 0) {
602		uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
603		source += 4;
604		for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
605			uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
606			if (bitstream & 0x80000000) {
607				// Go right
608				if (HuffmanNodeIsRTerm(node)) {
609					readBits = cpu->memory.load8(cpu, next + 1, 0);
610				} else {
611					nPointer = next + 1;
612					node = cpu->memory.load8(cpu, nPointer, 0);
613					continue;
614				}
615			} else {
616				// Go left
617				if (HuffmanNodeIsLTerm(node)) {
618					readBits = cpu->memory.load8(cpu, next, 0);
619				} else {
620					nPointer = next;
621					node = cpu->memory.load8(cpu, nPointer, 0);
622					continue;
623				}
624			}
625
626			block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
627			bitsSeen += bits;
628			nPointer = treeBase;
629			node = cpu->memory.load8(cpu, nPointer, 0);
630			if (bitsSeen == 32) {
631				bitsSeen = 0;
632				cpu->memory.store32(cpu, dest, block, 0);
633				dest += 4;
634				remaining -= 4;
635				block = 0;
636			}
637		}
638	}
639	cpu->gprs[0] = source;
640	cpu->gprs[1] = dest;
641}
642
643static void _unRl(struct GBA* gba, int width) {
644	struct ARMCore* cpu = gba->cpu;
645	uint32_t source = cpu->gprs[0];
646	int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
647	int padding = (4 - remaining) & 0x3;
648	// We assume the signature byte (0x30) is correct
649	int blockheader;
650	int block;
651	source += 4;
652	uint32_t dest = cpu->gprs[1];
653	int halfword = 0;
654	while (remaining > 0) {
655		blockheader = cpu->memory.load8(cpu, source, 0);
656		++source;
657		if (blockheader & 0x80) {
658			// Compressed
659			blockheader &= 0x7F;
660			blockheader += 3;
661			block = cpu->memory.load8(cpu, source, 0);
662			++source;
663			while (blockheader-- && remaining) {
664				--remaining;
665				if (width == 2) {
666					if (dest & 1) {
667						halfword |= block << 8;
668						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
669					} else {
670						halfword = block;
671					}
672				} else {
673					cpu->memory.store8(cpu, dest, block, 0);
674				}
675				++dest;
676			}
677		} else {
678			// Uncompressed
679			blockheader++;
680			while (blockheader-- && remaining) {
681				--remaining;
682				int byte = cpu->memory.load8(cpu, source, 0);
683				++source;
684				if (width == 2) {
685					if (dest & 1) {
686						halfword |= byte << 8;
687						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
688					} else {
689						halfword = byte;
690					}
691				} else {
692					cpu->memory.store8(cpu, dest, byte, 0);
693				}
694				++dest;
695			}
696		}
697	}
698	if (width == 2) {
699		if (dest & 1) {
700			--padding;
701			++dest;
702		}
703		for (; padding > 0; padding -= 2, dest += 2) {
704			cpu->memory.store16(cpu, dest, 0, 0);
705		}
706	} else {
707		while (padding--) {
708			cpu->memory.store8(cpu, dest, 0, 0);
709			++dest;
710		}
711	}
712	cpu->gprs[0] = source;
713	cpu->gprs[1] = dest;
714}
715
716static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
717	struct ARMCore* cpu = gba->cpu;
718	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
719	uint32_t dest = cpu->gprs[1];
720	uint32_t header = cpu->memory.load32(cpu, source, 0);
721	int remaining = header >> 8;
722	// We assume the signature nybble (0x8) is correct
723	uint16_t halfword = 0;
724	uint16_t old = 0;
725	source += 4;
726	while (remaining > 0) {
727		uint16_t new;
728		if (inwidth == 1) {
729			new = cpu->memory.load8(cpu, source, 0);
730		} else {
731			new = cpu->memory.load16(cpu, source, 0);
732		}
733		new += old;
734		if (outwidth > inwidth) {
735			halfword >>= 8;
736			halfword |= (new << 8);
737			if (source & 1) {
738				cpu->memory.store16(cpu, dest, halfword, 0);
739				dest += outwidth;
740				remaining -= outwidth;
741			}
742		} else if (outwidth == 1) {
743			cpu->memory.store8(cpu, dest, new, 0);
744			dest += outwidth;
745			remaining -= outwidth;
746		} else {
747			cpu->memory.store16(cpu, dest, new, 0);
748			dest += outwidth;
749			remaining -= outwidth;
750		}
751		old = new;
752		source += inwidth;
753	}
754	cpu->gprs[0] = source;
755	cpu->gprs[1] = dest;
756}
757
758static void _unBitPack(struct GBA* gba) {
759	struct ARMCore* cpu = gba->cpu;
760	uint32_t source = cpu->gprs[0];
761	uint32_t dest = cpu->gprs[1];
762	uint32_t info = cpu->gprs[2];
763	unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
764	unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
765	unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
766	switch (sourceWidth) {
767	case 1:
768	case 2:
769	case 4:
770	case 8:
771		break;
772	default:
773		mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
774		return;
775	}
776	switch (destWidth) {
777	case 1:
778	case 2:
779	case 4:
780	case 8:
781	case 16:
782	case 32:
783		break;
784	default:
785		mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
786		return;
787	}
788	uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
789	uint8_t in = 0;
790	uint32_t out = 0;
791	int bitsRemaining = 0;
792	int bitsEaten = 0;
793	while (sourceLen > 0) {
794		if (!bitsRemaining) {
795			in = cpu->memory.load8(cpu, source, 0);
796			bitsRemaining = 8;
797			++source;
798			--sourceLen;
799		}
800		unsigned scaled = in & ((1 << sourceWidth) - 1);
801		in >>= sourceWidth;
802		if (scaled || bias & 0x80000000) {
803			scaled += bias & 0x7FFFFFFF;
804			scaled &= (1 << destWidth) - 1;
805		}
806		bitsRemaining -= sourceWidth;
807		out |= scaled << bitsEaten;
808		bitsEaten += destWidth;
809		if (bitsEaten == 32) {
810			cpu->memory.store32(cpu, dest, out, 0);
811			bitsEaten = 0;
812			out = 0;
813			dest += 4;
814		}
815	}
816}