src/gba/hle-bios.s (view raw)
1# Copyright (c) 2013-2014 Jeffrey Pfau
2#
3# This Source Code Form is subject to the terms of the Mozilla Public
4# License, v. 2.0. If a copy of the MPL was not distributed with this
5# file, You can obtain one at http://mozilla.org/MPL/2.0/.
6#define nop andeq r0, r0
7
8.text
9
10b resetBase
11b undefBase
12b swiBase
13b pabtBase
14b dabtBase
15nop
16b irqBase
17b fiqBase
18
19resetBase:
20mov r0, #0x8000000
21ldrb r1, [r0, #3]
22cmp r1, #0xEA
23ldrne r0, =0x20000C0
24bx r0
25.word 0
26.word 0xE129F000
27
28swiBase:
29cmp sp, #0
30moveq sp, #0x04000000
31subeq sp, #0x20
32stmfd sp!, {r11-r12, lr}
33ldrb r11, [lr, #-2]
34mov r12, #swiTable
35ldr r11, [r12, r11, lsl #2]
36cmp r11, #0
37mrs r12, spsr
38stmfd sp!, {r12}
39and r12, #0x80
40orr r12, #0x1F
41msr cpsr, r12
42stmfd sp!, {lr}
43mov lr, pc
44bxne r11
45ldmfd sp!, {lr}
46msr cpsr, #0x93
47ldmfd sp!, {r12}
48msr spsr, r12
49ldmfd sp!, {r11-r12, lr}
50movs pc, lr
51.word 0
52.word 0xE3A02004
53
54swiTable:
55.word SoftReset
56.word RegisterRamReset
57.word Halt
58.word Stop
59.word IntrWait
60.word VBlankIntrWait
61.word Div
62.word DivArm
63.word Sqrt
64.word ArcTan
65.word ArcTan2
66.word CpuSet
67.word CpuFastSet
68# ... The rest of this table isn't needed if the rest aren't implemented
69
70irqBase:
71stmfd sp!, {r0-r3, r12, lr}
72mov r0, #0x04000000
73add lr, pc, #0
74ldr pc, [r0, #-4]
75ldmfd sp!, {r0-r3, r12, lr}
76subs pc, lr, #4
77.word 0
78.word 0xE55EC002
79
80VBlankIntrWait:
81mov r0, #1
82mov r1, #1
83IntrWait:
84stmfd sp!, {r2-r3, lr}
85mov r12, #0x04000000
86# See if we want to return immediately
87cmp r0, #0
88mov r0, #0
89mov r2, #1
90beq 1f
91ldrh r3, [r12, #-8]
92bic r3, r1
93strh r3, [r12, #-8]
94# Halt
950:
96strb r0, [r12, #0x301]
971:
98# Check which interrupts were acknowledged
99strb r0, [r12, #0x208]
100ldrh r3, [r12, #-8]
101ands r3, r1
102eorne r3, r1
103strneh r3, [r12, #-8]
104strb r2, [r12, #0x208]
105beq 0b
106ldmfd sp!, {r2-r3, pc}
107
108CpuSet:
109stmfd sp!, {lr}
110mov r3, r2, lsl #12
111tst r2, #0x01000000
112beq 0f
113# Fill
114tst r2, #0x04000000
115beq 1f
116# Word
117add r3, r1, r3, lsr #10
118ldmia r0!, {r2}
1192:
120cmp r1, r3
121stmltia r1!, {r2}
122blt 2b
123b 3f
124# Halfword
1251:
126bic r0, #1
127bic r1, #1
128add r3, r1, r3, lsr #11
129ldrh r2, [r0]
1302:
131cmp r1, r3
132strlth r2, [r1], #2
133blt 2b
134b 3f
135# Copy
1360:
137tst r2, #0x04000000
138beq 1f
139# Word
140add r3, r1, r3, lsr #10
1412:
142cmp r1, r3
143ldmltia r0!, {r2}
144stmltia r1!, {r2}
145blt 2b
146b 3f
147# Halfword
1481:
149add r3, r1, r3, lsr #11
1502:
151cmp r1, r3
152ldrlth r2, [r0], #2
153strlth r2, [r1], #2
154blt 2b
1553:
156ldmfd sp!, {pc}
157
158CpuFastSet:
159stmfd sp!, {r4-r10, lr}
160tst r2, #0x01000000
161mov r3, r2, lsl #12
162add r2, r1, r3, lsr #10
163beq 0f
164# Fill
165ldr r3, [r0]
166mov r4, r3
167mov r5, r3
168mov r6, r3
169mov r7, r3
170mov r8, r3
171mov r9, r3
172mov r10, r3
1731:
174cmp r1, r2
175stmltia r1!, {r3-r10}
176blt 1b
177b 2f
178# Copy
1790:
180cmp r1, r2
181ldmltia r0!, {r3-r10}
182stmltia r1!, {r3-r10}
183blt 0b
1842:
185ldmfd sp!, {r4-r10, pc}
186
187.ltorg