src/ds/video.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/ds/video.h>
7
8#include <mgba/core/sync.h>
9#include <mgba/internal/ds/ds.h>
10#include <mgba/internal/ds/memory.h>
11#include <mgba/internal/gba/video.h>
12
13#include <mgba-util/memory.h>
14
15mLOG_DEFINE_CATEGORY(DS_VIDEO, "DS Video");
16
17static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer);
18static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer);
19static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer);
20static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
21static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
22static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam);
23static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot);
24static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y);
25static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer);
26static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels);
27static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels);
28
29static void _startHblank7(struct mTiming*, void* context, uint32_t cyclesLate);
30static void _startHdraw7(struct mTiming*, void* context, uint32_t cyclesLate);
31static void _startHblank9(struct mTiming*, void* context, uint32_t cyclesLate);
32static void _startHdraw9(struct mTiming*, void* context, uint32_t cyclesLate);
33
34static const uint32_t _vramSize[9] = {
35 0x20000,
36 0x20000,
37 0x20000,
38 0x20000,
39 0x10000,
40 0x04000,
41 0x04000,
42 0x08000,
43 0x04000
44};
45
46enum DSVRAMBankMode {
47 MODE_A_BG = 0,
48 MODE_B_BG = 1,
49 MODE_A_OBJ = 2,
50 MODE_B_OBJ = 3,
51 MODE_LCDC,
52 MODE_7_VRAM,
53 MODE_A_BG_EXT_PAL,
54 MODE_B_BG_EXT_PAL,
55 MODE_A_OBJ_EXT_PAL,
56 MODE_B_OBJ_EXT_PAL,
57 MODE_3D_TEX,
58 MODE_3D_TEX_PAL,
59};
60
61const struct DSVRAMBankInfo {
62 int base;
63 uint32_t mirrorSize;
64 enum DSVRAMBankMode mode;
65 int offset[4];
66} _vramInfo[9][8] = {
67 { // A
68 { 0x000, 0x40, MODE_LCDC },
69 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
70 { 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
71 { 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
72 },
73 { // B
74 { 0x008, 0x40, MODE_LCDC },
75 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
76 { 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
77 { 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
78 },
79 { // C
80 { 0x010, 0x40, MODE_LCDC },
81 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
82 { 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
83 { 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
84 { 0x000, 0x08, MODE_B_BG },
85 },
86 { // D
87 { 0x018, 0x40, MODE_LCDC },
88 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
89 { 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
90 { 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
91 { 0x000, 0x08, MODE_B_OBJ },
92 },
93 { // E
94 { 0x020, 0x40, MODE_LCDC },
95 { 0x000, 0x20, MODE_A_BG },
96 { 0x000, 0x10, MODE_A_OBJ },
97 { 0x000, 0x04, MODE_3D_TEX_PAL },
98 { 0x000, 0x04, MODE_A_BG_EXT_PAL },
99 },
100 { // F
101 { 0x024, 0x40, MODE_LCDC },
102 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
103 { 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
104 { 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
105 { 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
106 { 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
107 },
108 { // G
109 { 0x025, 0x40, MODE_LCDC },
110 { 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
111 { 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
112 { 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
113 { 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
114 { 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
115 },
116 { // H
117 { 0x026, 0x40, MODE_LCDC },
118 { 0x000, 0x04, MODE_B_BG },
119 { 0x000, 0x04, MODE_B_BG_EXT_PAL },
120 },
121 { // I
122 { 0x028, 0x40, MODE_LCDC },
123 { 0x002, 0x04, MODE_B_BG },
124 { 0x000, 0x01, MODE_B_OBJ },
125 { 0x000, 0x01, MODE_B_OBJ_EXT_PAL },
126 },
127};
128
129static struct DSVideoRenderer dummyRenderer = {
130 .init = DSVideoDummyRendererInit,
131 .reset = DSVideoDummyRendererReset,
132 .deinit = DSVideoDummyRendererDeinit,
133 .writeVideoRegister = DSVideoDummyRendererWriteVideoRegister,
134 .writePalette = DSVideoDummyRendererWritePalette,
135 .writeOAM = DSVideoDummyRendererWriteOAM,
136 .invalidateExtPal = DSVideoDummyRendererInvalidateExtPal,
137 .drawScanline = DSVideoDummyRendererDrawScanline,
138 .finishFrame = DSVideoDummyRendererFinishFrame,
139 .getPixels = DSVideoDummyRendererGetPixels,
140 .putPixels = DSVideoDummyRendererPutPixels,
141};
142
143void DSVideoInit(struct DSVideo* video) {
144 video->renderer = &dummyRenderer;
145 video->vram = NULL;
146 video->frameskip = 0;
147 video->event7.name = "DS7 Video";
148 video->event7.callback = NULL;
149 video->event7.context = video;
150 video->event7.priority = 8;
151 video->event9.name = "DS9 Video";
152 video->event9.callback = NULL;
153 video->event9.context = video;
154 video->event9.priority = 8;
155}
156
157void DSVideoReset(struct DSVideo* video) {
158 video->vcount = 0;
159 video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
160 video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
161
162 video->event7.callback = _startHblank7;
163 video->event9.callback = _startHblank9;
164 mTimingSchedule(&video->p->ds7.timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH);
165 mTimingSchedule(&video->p->ds9.timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2);
166
167 video->frameCounter = 0;
168 video->frameskipCounter = 0;
169
170 if (video->vram) {
171 mappedMemoryFree(video->vram, DS_SIZE_VRAM);
172 }
173 video->vram = anonymousMemoryMap(DS_SIZE_VRAM);
174 video->renderer->vram = video->vram;
175
176 video->p->memory.vramBank[0] = &video->vram[0x00000];
177 video->p->memory.vramBank[1] = &video->vram[0x10000];
178 video->p->memory.vramBank[2] = &video->vram[0x20000];
179 video->p->memory.vramBank[3] = &video->vram[0x30000];
180 video->p->memory.vramBank[4] = &video->vram[0x40000];
181 video->p->memory.vramBank[5] = &video->vram[0x48000];
182 video->p->memory.vramBank[6] = &video->vram[0x4A000];
183 video->p->memory.vramBank[7] = &video->vram[0x4C000];
184 video->p->memory.vramBank[8] = &video->vram[0x50000];
185
186 video->renderer->deinit(video->renderer);
187 video->renderer->init(video->renderer);
188}
189
190void DSVideoAssociateRenderer(struct DSVideo* video, struct DSVideoRenderer* renderer) {
191 video->renderer->deinit(video->renderer);
192 video->renderer = renderer;
193 renderer->palette = video->palette;
194 renderer->vram = video->vram;
195 memcpy(renderer->vramABG, video->vramABG, sizeof(renderer->vramABG));
196 memcpy(renderer->vramAOBJ, video->vramAOBJ, sizeof(renderer->vramAOBJ));
197 memcpy(renderer->vramABGExtPal, video->vramABGExtPal, sizeof(renderer->vramABGExtPal));
198 memcpy(renderer->vramAOBJExtPal, video->vramAOBJExtPal, sizeof(renderer->vramAOBJExtPal));
199 memcpy(renderer->vramBBG, video->vramBBG, sizeof(renderer->vramBBG));
200 memcpy(renderer->vramBOBJ, video->vramBOBJ, sizeof(renderer->vramBOBJ));
201 memcpy(renderer->vramBBGExtPal, video->vramBBGExtPal, sizeof(renderer->vramBBGExtPal));
202 memcpy(renderer->vramBOBJExtPal, video->vramBOBJExtPal, sizeof(renderer->vramBOBJExtPal));
203 renderer->oam = &video->oam;
204 video->renderer->init(video->renderer);
205}
206
207void DSVideoDeinit(struct DSVideo* video) {
208 DSVideoAssociateRenderer(video, &dummyRenderer);
209 mappedMemoryFree(video->vram, DS_SIZE_VRAM);
210}
211
212void _startHdraw7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
213 struct DSVideo* video = context;
214 GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
215 dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
216 video->event7.callback = _startHblank7;
217 mTimingSchedule(timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
218
219 video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
220
221 if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
222 dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
223 if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
224 DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VCOUNTER);
225 }
226 } else {
227 dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
228 }
229 video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
230
231 switch (video->vcount) {
232 case DS_VIDEO_VERTICAL_PIXELS:
233 video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
234 if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
235 DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VBLANK);
236 }
237 break;
238 case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
239 video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
240 break;
241 }
242}
243
244void _startHblank7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
245 struct DSVideo* video = context;
246 GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
247 dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
248 video->event7.callback = _startHdraw7;
249 mTimingSchedule(timing, &video->event7, DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
250
251 // Begin Hblank
252 dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
253
254 if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
255 DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_HBLANK);
256 }
257 video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
258}
259
260void _startHdraw9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
261 struct DSVideo* video = context;
262 GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
263 dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
264 video->event9.callback = _startHblank9;
265 mTimingSchedule(timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2 - cyclesLate);
266
267 ++video->vcount;
268 if (video->vcount == DS_VIDEO_VERTICAL_TOTAL_PIXELS) {
269 video->vcount = 0;
270 }
271 video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
272
273 if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
274 dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
275 if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
276 DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VCOUNTER);
277 }
278 } else {
279 dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
280 }
281 video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
282
283 // Note: state may be recorded during callbacks, so ensure it is consistent!
284 switch (video->vcount) {
285 case 0:
286 DSFrameStarted(video->p);
287 break;
288 case DS_VIDEO_VERTICAL_PIXELS:
289 video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
290 if (video->frameskipCounter <= 0) {
291 video->renderer->finishFrame(video->renderer);
292 if (video->p->gx.swapBuffers) {
293 DSGXSwapBuffers(&video->p->gx);
294 }
295 }
296 if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
297 DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VBLANK);
298 }
299 DSFrameEnded(video->p);
300 --video->frameskipCounter;
301 if (video->frameskipCounter < 0) {
302 mCoreSyncPostFrame(video->p->sync);
303 video->frameskipCounter = video->frameskip;
304 }
305 ++video->frameCounter;
306 break;
307 case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
308 video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
309 break;
310 }
311}
312
313void _startHblank9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
314 struct DSVideo* video = context;
315 GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
316 dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
317 video->event9.callback = _startHdraw9;
318 mTimingSchedule(timing, &video->event9, (DS9_VIDEO_HBLANK_LENGTH * 2) - cyclesLate);
319
320 // Begin Hblank
321 dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
322 if (video->vcount < DS_VIDEO_VERTICAL_PIXELS && video->frameskipCounter <= 0) {
323 video->renderer->drawScanline(video->renderer, video->vcount);
324 }
325
326 if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
327 DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_HBLANK);
328 }
329 video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
330}
331
332void DSVideoWriteDISPSTAT(struct DSCommon* dscore, uint16_t value) {
333 dscore->memory.io[DS_REG_DISPSTAT >> 1] &= 0x7;
334 dscore->memory.io[DS_REG_DISPSTAT >> 1] |= value;
335 // TODO: Does a VCounter IRQ trigger on write?
336}
337
338void DSVideoConfigureVRAM(struct DS* ds, int index, uint8_t value, uint8_t oldValue) {
339 struct DSMemory* memory = &ds->memory;
340 if (value == oldValue) {
341 return;
342 }
343 uint32_t i, j;
344 uint32_t size = _vramSize[index] >> DS_VRAM_OFFSET;
345 struct DSVRAMBankInfo oldInfo = _vramInfo[index][oldValue & 0x7];
346 uint32_t offset = oldInfo.base + oldInfo.offset[(oldValue >> 3) & 3];
347 switch (oldInfo.mode) {
348 case MODE_A_BG:
349 for (i = 0; i < size; ++i) {
350 if (ds->video.vramABG[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
351 ds->video.vramABG[offset + i] = NULL;
352 ds->video.renderer->vramABG[offset + i] = NULL;
353 }
354 }
355 break;
356 case MODE_B_BG:
357 for (i = 0; i < size; ++i) {
358 if (ds->video.vramBBG[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
359 ds->video.vramBBG[offset + i] = NULL;
360 ds->video.renderer->vramBBG[offset + i] = NULL;
361 }
362 }
363 break;
364 case MODE_A_OBJ:
365 for (i = 0; i < size; ++i) {
366 if (ds->video.vramAOBJ[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
367 ds->video.vramAOBJ[offset + i] = NULL;
368 ds->video.renderer->vramAOBJ[offset + i] = NULL;
369 }
370 }
371 break;
372 case MODE_B_OBJ:
373 for (i = 0; i < size; ++i) {
374 if (ds->video.vramBOBJ[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
375 ds->video.vramBOBJ[offset + i] = NULL;
376 ds->video.renderer->vramBOBJ[offset + i] = NULL;
377 }
378 }
379 break;
380 case MODE_A_BG_EXT_PAL:
381 for (i = 0; i < oldInfo.mirrorSize; ++i) {
382 if (ds->video.vramABGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
383 ds->video.vramABGExtPal[offset + i] = NULL;
384 ds->video.renderer->vramABGExtPal[offset + i] = NULL;
385 ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
386 }
387 }
388 break;
389 case MODE_B_BG_EXT_PAL:
390 for (i = 0; i < oldInfo.mirrorSize; ++i) {
391 if (ds->video.vramBBGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
392 ds->video.vramBBGExtPal[offset + i] = NULL;
393 ds->video.renderer->vramBBGExtPal[offset + i] = NULL;
394 ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
395 }
396 }
397 break;
398 case MODE_7_VRAM:
399 for (i = 0; i < size; i += 16) {
400 ds->memory.vram7[(offset + i) >> 4] = NULL;
401 }
402 break;
403 case MODE_LCDC:
404 break;
405 }
406
407 struct DSVRAMBankInfo info = _vramInfo[index][value & 0x7];
408 memset(&memory->vramMirror[index], 0, sizeof(memory->vramMirror[index]));
409 memset(&memory->vramMode[index], 0, sizeof(memory->vramMode[index]));
410 if (!(value & 0x80) || !info.mirrorSize) {
411 return;
412 }
413 offset = info.base + info.offset[(value >> 3) & 3];
414 if (info.mode <= MODE_LCDC) {
415 memory->vramMode[index][info.mode] = 0xFFFF;
416 for (j = offset; j < 0x40; j += info.mirrorSize) {
417 for (i = 0; i < size; ++i) {
418 memory->vramMirror[index][i + j] = 1 << index;
419 }
420 }
421 }
422 switch (info.mode) {
423 case MODE_A_BG:
424 for (i = 0; i < size; ++i) {
425 ds->video.vramABG[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
426 ds->video.renderer->vramABG[offset + i] = ds->video.vramABG[offset + i];
427 }
428 break;
429 case MODE_B_BG:
430 for (i = 0; i < size; ++i) {
431 ds->video.vramBBG[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
432 ds->video.renderer->vramBBG[offset + i] = ds->video.vramBBG[offset + i];
433 }
434 break;
435 case MODE_A_OBJ:
436 for (i = 0; i < size; ++i) {
437 ds->video.vramAOBJ[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
438 ds->video.renderer->vramAOBJ[offset + i] = ds->video.vramAOBJ[offset + i];
439 }
440 break;
441 case MODE_B_OBJ:
442 for (i = 0; i < size; ++i) {
443 ds->video.vramBOBJ[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
444 ds->video.renderer->vramBOBJ[offset + i] = ds->video.vramBOBJ[offset + i];
445 }
446 break;
447 case MODE_A_BG_EXT_PAL:
448 for (i = 0; i < info.mirrorSize; ++i) {
449 ds->video.vramABGExtPal[offset + i] = &memory->vramBank[index][i << 12];
450 ds->video.renderer->vramABGExtPal[offset + i] = ds->video.vramABGExtPal[offset + i];
451 ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
452 }
453 break;
454 case MODE_B_BG_EXT_PAL:
455 for (i = 0; i < info.mirrorSize; ++i) {
456 ds->video.vramBBGExtPal[offset + i] = &memory->vramBank[index][i << 12];
457 ds->video.renderer->vramBBGExtPal[offset + i] = ds->video.vramBBGExtPal[offset + i];
458 ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
459 }
460 break;
461 case MODE_7_VRAM:
462 for (i = 0; i < size; i += 16) {
463 ds->memory.vram7[(offset + i) >> 4] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 5)];
464 }
465 break;
466 case MODE_LCDC:
467 break;
468 }
469}
470
471static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer) {
472 UNUSED(renderer);
473 // Nothing to do
474}
475
476static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer) {
477 UNUSED(renderer);
478 // Nothing to do
479}
480
481static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer) {
482 UNUSED(renderer);
483 // Nothing to do
484}
485
486static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
487 UNUSED(renderer);
488 return value;
489}
490
491static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
492 UNUSED(renderer);
493 UNUSED(address);
494 UNUSED(value);
495 // Nothing to do
496}
497
498static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam) {
499 UNUSED(renderer);
500 UNUSED(oam);
501 // Nothing to do
502}
503
504static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot) {
505 UNUSED(renderer);
506 UNUSED(obj);
507 UNUSED(engB);
508 // Nothing to do
509}
510
511static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y) {
512 UNUSED(renderer);
513 UNUSED(y);
514 // Nothing to do
515}
516
517static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer) {
518 UNUSED(renderer);
519 // Nothing to do
520}
521
522static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels) {
523 UNUSED(renderer);
524 UNUSED(stride);
525 UNUSED(pixels);
526 // Nothing to do
527}
528
529static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels) {
530 UNUSED(renderer);
531 UNUSED(stride);
532 UNUSED(pixels);
533 // Nothing to do
534}