all repos — mgba @ dae68c2182a8daa5c1770ade38726ed4b7a37193

mGBA Game Boy Advance Emulator

src/gba/bios.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/gba/bios.h>
  7
  8#include <mgba/internal/arm/isa-inlines.h>
  9#include <mgba/internal/arm/macros.h>
 10#include <mgba/internal/gba/gba.h>
 11#include <mgba/internal/gba/io.h>
 12#include <mgba/internal/gba/memory.h>
 13
 14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
 15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
 16
 17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
 18
 19static void _unLz77(struct GBA* gba, int width);
 20static void _unHuffman(struct GBA* gba);
 21static void _unRl(struct GBA* gba, int width);
 22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
 23static void _unBitPack(struct GBA* gba);
 24
 25static void _SoftReset(struct GBA* gba) {
 26	struct ARMCore* cpu = gba->cpu;
 27	ARMSetPrivilegeMode(cpu, MODE_IRQ);
 28	cpu->spsr.packed = 0;
 29	cpu->gprs[ARM_LR] = 0;
 30	cpu->gprs[ARM_SP] = SP_BASE_IRQ;
 31	ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
 32	cpu->spsr.packed = 0;
 33	cpu->gprs[ARM_LR] = 0;
 34	cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
 35	ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
 36	cpu->gprs[ARM_LR] = 0;
 37	cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
 38	int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
 39	memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
 40	if (flag) {
 41		cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
 42	} else {
 43		cpu->gprs[ARM_PC] = BASE_CART0;
 44	}
 45	_ARMSetMode(cpu, MODE_ARM);
 46	int currentCycles = 0;
 47	ARM_WRITE_PC;
 48}
 49
 50static void _RegisterRamReset(struct GBA* gba) {
 51	uint32_t registers = gba->cpu->gprs[0];
 52	struct ARMCore* cpu = gba->cpu;
 53	cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
 54	if (registers & 0x01) {
 55		memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
 56	}
 57	if (registers & 0x02) {
 58		memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
 59	}
 60	if (registers & 0x04) {
 61		memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
 62	}
 63	if (registers & 0x08) {
 64		memset(gba->video.renderer->vram, 0, SIZE_VRAM);
 65	}
 66	if (registers & 0x10) {
 67		memset(gba->video.oam.raw, 0, SIZE_OAM);
 68	}
 69	if (registers & 0x20) {
 70		cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
 71		cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
 72		cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
 73		cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
 74		cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
 75		cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
 76	}
 77	if (registers & 0x40) {
 78		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
 79		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
 80		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
 81		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
 82		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
 83		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
 84		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
 85		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
 86		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
 87		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
 88		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
 89		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
 90		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
 91		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
 92		memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
 93	}
 94	if (registers & 0x80) {
 95		cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
 96		cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
 97		cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
 98		cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
 99		cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
100		cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
101		cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
102		cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
103		cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
104		cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
105		cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
106		cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
107		cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
108		cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
109		cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
110		cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
111		cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
112		cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
113		cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
114		cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
115		cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
116		cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
117		cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
118		cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
119		cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
120		cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
121		cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
122		cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
123		cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
124		cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
125		cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
126		cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
127		cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
128		cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
129		cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
130		cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
131		cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
132		cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
133		cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
134		cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
135		cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
136		cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
137		cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
138		cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
139		cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
140		cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
141		cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
142		cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
143		cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
144		cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
145		cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
146		cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
147		cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
148		cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
149		cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
150		cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
151		cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
152		cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
153		cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
154		cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
155		cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
156		cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
157		cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
158		cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
159		cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
160		cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
161		cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
162		cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
163		cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
164		cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
165		cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
166		cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
167	}
168}
169
170static void _BgAffineSet(struct GBA* gba) {
171	struct ARMCore* cpu = gba->cpu;
172	int i = cpu->gprs[2];
173	float ox, oy;
174	float cx, cy;
175	float sx, sy;
176	float theta;
177	int offset = cpu->gprs[0];
178	int destination = cpu->gprs[1];
179	float a, b, c, d;
180	float rx, ry;
181	while (i--) {
182		// [ sx   0  0 ]   [ cos(theta)  -sin(theta)  0 ]   [ 1  0  cx - ox ]   [ A B rx ]
183		// [  0  sy  0 ] * [ sin(theta)   cos(theta)  0 ] * [ 0  1  cy - oy ] = [ C D ry ]
184		// [  0   0  1 ]   [     0            0       1 ]   [ 0  0     1    ]   [ 0 0  1 ]
185		ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
186		oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
187		cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
188		cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
189		sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
190		sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
191		theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
192		offset += 20;
193		// Rotation
194		a = d = cosf(theta);
195		b = c = sinf(theta);
196		// Scale
197		a *= sx;
198		b *= -sx;
199		c *= sy;
200		d *= sy;
201		// Translate
202		rx = ox - (a * cx + b * cy);
203		ry = oy - (c * cx + d * cy);
204		cpu->memory.store16(cpu, destination, a * 256, 0);
205		cpu->memory.store16(cpu, destination + 2, b * 256, 0);
206		cpu->memory.store16(cpu, destination + 4, c * 256, 0);
207		cpu->memory.store16(cpu, destination + 6, d * 256, 0);
208		cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
209		cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
210		destination += 16;
211	}
212}
213
214static void _ObjAffineSet(struct GBA* gba) {
215	struct ARMCore* cpu = gba->cpu;
216	int i = cpu->gprs[2];
217	float sx, sy;
218	float theta;
219	int offset = cpu->gprs[0];
220	int destination = cpu->gprs[1];
221	int diff = cpu->gprs[3];
222	float a, b, c, d;
223	while (i--) {
224		// [ sx   0 ]   [ cos(theta)  -sin(theta) ]   [ A B ]
225		// [  0  sy ] * [ sin(theta)   cos(theta) ] = [ C D ]
226		sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
227		sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
228		theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
229		offset += 8;
230		// Rotation
231		a = d = cosf(theta);
232		b = c = sinf(theta);
233		// Scale
234		a *= sx;
235		b *= -sx;
236		c *= sy;
237		d *= sy;
238		cpu->memory.store16(cpu, destination, a * 256, 0);
239		cpu->memory.store16(cpu, destination + diff, b * 256, 0);
240		cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
241		cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
242		destination += diff * 4;
243	}
244}
245
246static void _MidiKey2Freq(struct GBA* gba) {
247	struct ARMCore* cpu = gba->cpu;
248
249	int oldRegion = gba->memory.activeRegion;
250	gba->memory.activeRegion = REGION_BIOS;
251	uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
252	gba->memory.activeRegion = oldRegion;
253
254	cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
255}
256
257static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
258	struct ARMCore* cpu = gba->cpu;
259	if (denom != 0) {
260		div_t result = div(num, denom);
261		cpu->gprs[0] = result.quot;
262		cpu->gprs[1] = result.rem;
263		cpu->gprs[3] = abs(result.quot);
264	} else {
265		mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
266		// If abs(num) > 1, this should hang, but that would be painful to
267		// emulate in HLE, and no game will get into a state where it hangs...
268		cpu->gprs[0] = (num < 0) ? -1 : 1;
269		cpu->gprs[1] = num;
270		cpu->gprs[3] = 1;
271	}
272}
273
274static int16_t _ArcTan(int32_t i, int32_t* r1, int32_t* r3) {
275	int32_t a = -((i * i) >> 14);
276	int32_t b = ((0xA9 * a) >> 14) + 0x390;
277	b = ((b * a) >> 14) + 0x91C;
278	b = ((b * a) >> 14) + 0xFB6;
279	b = ((b * a) >> 14) + 0x16AA;
280	b = ((b * a) >> 14) + 0x2081;
281	b = ((b * a) >> 14) + 0x3651;
282	b = ((b * a) >> 14) + 0xA2F9;
283	if (r1) {
284		*r1 = a;
285	}
286	if (r3) {
287		*r3 = b;
288	}
289	return (i * b) >> 16;
290}
291
292static int16_t _ArcTan2(int32_t x, int32_t y, int32_t* r1) {
293	if (!y) {
294		if (x >= 0) {
295			return 0;
296		}
297		return 0x8000;
298	}
299	if (!x) {
300		if (y >= 0) {
301			return 0x4000;
302		}
303		return 0xC000;
304	}
305	if (y >= 0) {
306		if (x >= 0) {
307			if (x >= y) {
308				return _ArcTan((y << 14) / x, r1, NULL);
309			}
310		} else if (-x >= y) {
311			return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
312		}
313		return 0x4000 - _ArcTan((x << 14) / y, r1, NULL);
314	} else {
315		if (x <= 0) {
316			if (-x > -y) {
317				return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
318			}
319		} else if (x >= -y) {
320			return _ArcTan((y << 14) / x, r1, NULL) + 0x10000;
321		}
322		return 0xC000 - _ArcTan((x << 14) / y, r1, NULL);
323	}
324}
325
326void GBASwi16(struct ARMCore* cpu, int immediate) {
327	struct GBA* gba = (struct GBA*) cpu->master;
328	mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
329	    immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
330
331	if (gba->memory.fullBios) {
332		ARMRaiseSWI(cpu);
333		return;
334	}
335	switch (immediate) {
336	case 0x0:
337		_SoftReset(gba);
338		break;
339	case 0x1:
340		_RegisterRamReset(gba);
341		break;
342	case 0x2:
343		GBAHalt(gba);
344		break;
345	case 0x3:
346		GBAStop(gba);
347		break;
348	case 0x05:
349	// VBlankIntrWait
350	// Fall through:
351	case 0x04:
352		// IntrWait
353		ARMRaiseSWI(cpu);
354		break;
355	case 0x6:
356		_Div(gba, cpu->gprs[0], cpu->gprs[1]);
357		break;
358	case 0x7:
359		_Div(gba, cpu->gprs[1], cpu->gprs[0]);
360		break;
361	case 0x8:
362		cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
363		break;
364	case 0x9:
365		cpu->gprs[0] = _ArcTan(cpu->gprs[0], &cpu->gprs[1], &cpu->gprs[3]);
366		break;
367	case 0xA:
368		cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1], &cpu->gprs[1]);
369		cpu->gprs[3] = 0x170;
370		break;
371	case 0xB:
372	case 0xC:
373		if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
374			mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
375			break;
376		}
377		if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
378			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
379		}
380		if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
381			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
382		}
383		ARMRaiseSWI(cpu);
384		break;
385	case 0xD:
386		cpu->gprs[0] = GBA_BIOS_CHECKSUM;
387		cpu->gprs[1] = 1;
388		cpu->gprs[3] = SIZE_BIOS;
389		break;
390	case 0xE:
391		_BgAffineSet(gba);
392		break;
393	case 0xF:
394		_ObjAffineSet(gba);
395		break;
396	case 0x10:
397		if (cpu->gprs[0] < BASE_WORKING_RAM) {
398			mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
399			break;
400		}
401		switch (cpu->gprs[1] >> BASE_OFFSET) {
402		default:
403			mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
404		// Fall through
405		case REGION_WORKING_RAM:
406		case REGION_WORKING_IRAM:
407		case REGION_VRAM:
408			_unBitPack(gba);
409			break;
410		}
411		break;
412	case 0x11:
413	case 0x12:
414		if (cpu->gprs[0] < BASE_WORKING_RAM) {
415			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
416			break;
417		}
418		switch (cpu->gprs[1] >> BASE_OFFSET) {
419		default:
420			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
421		// Fall through
422		case REGION_WORKING_RAM:
423		case REGION_WORKING_IRAM:
424		case REGION_VRAM:
425			_unLz77(gba, immediate == 0x11 ? 1 : 2);
426			break;
427		}
428		break;
429	case 0x13:
430		if (cpu->gprs[0] < BASE_WORKING_RAM) {
431			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
432			break;
433		}
434		switch (cpu->gprs[1] >> BASE_OFFSET) {
435		default:
436			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
437		// Fall through
438		case REGION_WORKING_RAM:
439		case REGION_WORKING_IRAM:
440		case REGION_VRAM:
441			_unHuffman(gba);
442			break;
443		}
444		break;
445	case 0x14:
446	case 0x15:
447		if (cpu->gprs[0] < BASE_WORKING_RAM) {
448			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
449			break;
450		}
451		switch (cpu->gprs[1] >> BASE_OFFSET) {
452		default:
453			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
454		// Fall through
455		case REGION_WORKING_RAM:
456		case REGION_WORKING_IRAM:
457		case REGION_VRAM:
458			_unRl(gba, immediate == 0x14 ? 1 : 2);
459			break;
460		}
461		break;
462	case 0x16:
463	case 0x17:
464	case 0x18:
465		if (cpu->gprs[0] < BASE_WORKING_RAM) {
466			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
467			break;
468		}
469		switch (cpu->gprs[1] >> BASE_OFFSET) {
470		default:
471			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
472		// Fall through
473		case REGION_WORKING_RAM:
474		case REGION_WORKING_IRAM:
475		case REGION_VRAM:
476			_unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
477			break;
478		}
479		break;
480	case 0x19:
481		// SoundBias is mostly meaningless here
482		mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
483		break;
484	case 0x1F:
485		_MidiKey2Freq(gba);
486		break;
487	default:
488		mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
489	}
490	gba->memory.biosPrefetch = 0xE3A02004;
491}
492
493void GBASwi32(struct ARMCore* cpu, int immediate) {
494	GBASwi16(cpu, immediate >> 16);
495}
496
497uint32_t GBAChecksum(uint32_t* memory, size_t size) {
498	size_t i;
499	uint32_t sum = 0;
500	for (i = 0; i < size; i += 4) {
501		sum += memory[i >> 2];
502	}
503	return sum;
504}
505
506static void _unLz77(struct GBA* gba, int width) {
507	struct ARMCore* cpu = gba->cpu;
508	uint32_t source = cpu->gprs[0];
509	uint32_t dest = cpu->gprs[1];
510	int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
511	// We assume the signature byte (0x10) is correct
512	int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
513	source += 4;
514	int blocksRemaining = 0;
515	uint32_t disp;
516	int bytes;
517	int byte;
518	int halfword = 0;
519	while (remaining > 0) {
520		if (blocksRemaining) {
521			if (blockheader & 0x80) {
522				// Compressed
523				int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
524				source += 2;
525				disp = dest - (block & 0x0FFF) - 1;
526				bytes = (block >> 12) + 3;
527				while (bytes-- && remaining) {
528					--remaining;
529					if (width == 2) {
530						byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
531						if (dest & 1) {
532							byte >>= (disp & 1) * 8;
533							halfword |= byte << 8;
534							cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
535						} else {
536							byte >>= (disp & 1) * 8;
537							halfword = byte & 0xFF;
538						}
539					} else {
540						byte = cpu->memory.load8(cpu, disp, 0);
541						cpu->memory.store8(cpu, dest, byte, 0);
542					}
543					++disp;
544					++dest;
545				}
546			} else {
547				// Uncompressed
548				byte = cpu->memory.load8(cpu, source, 0);
549				++source;
550				if (width == 2) {
551					if (dest & 1) {
552						halfword |= byte << 8;
553						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
554					} else {
555						halfword = byte;
556					}
557				} else {
558					cpu->memory.store8(cpu, dest, byte, 0);
559				}
560				++dest;
561				--remaining;
562			}
563			blockheader <<= 1;
564			--blocksRemaining;
565		} else {
566			blockheader = cpu->memory.load8(cpu, source, 0);
567			++source;
568			blocksRemaining = 8;
569		}
570	}
571	cpu->gprs[0] = source;
572	cpu->gprs[1] = dest;
573	cpu->gprs[3] = 0;
574}
575
576DECL_BITFIELD(HuffmanNode, uint8_t);
577DECL_BITS(HuffmanNode, Offset, 0, 6);
578DECL_BIT(HuffmanNode, RTerm, 6);
579DECL_BIT(HuffmanNode, LTerm, 7);
580
581static void _unHuffman(struct GBA* gba) {
582	struct ARMCore* cpu = gba->cpu;
583	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
584	uint32_t dest = cpu->gprs[1];
585	uint32_t header = cpu->memory.load32(cpu, source, 0);
586	int remaining = header >> 8;
587	unsigned bits = header & 0xF;
588	if (bits == 0) {
589		mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
590		bits = 8;
591	}
592	if (32 % bits || bits == 1) {
593		mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
594		return;
595	}
596	// We assume the signature byte (0x20) is correct
597	int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
598	int block = 0;
599	uint32_t treeBase = source + 5;
600	source += 5 + treesize;
601	uint32_t nPointer = treeBase;
602	HuffmanNode node;
603	int bitsRemaining;
604	int readBits;
605	int bitsSeen = 0;
606	node = cpu->memory.load8(cpu, nPointer, 0);
607	while (remaining > 0) {
608		uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
609		source += 4;
610		for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
611			uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
612			if (bitstream & 0x80000000) {
613				// Go right
614				if (HuffmanNodeIsRTerm(node)) {
615					readBits = cpu->memory.load8(cpu, next + 1, 0);
616				} else {
617					nPointer = next + 1;
618					node = cpu->memory.load8(cpu, nPointer, 0);
619					continue;
620				}
621			} else {
622				// Go left
623				if (HuffmanNodeIsLTerm(node)) {
624					readBits = cpu->memory.load8(cpu, next, 0);
625				} else {
626					nPointer = next;
627					node = cpu->memory.load8(cpu, nPointer, 0);
628					continue;
629				}
630			}
631
632			block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
633			bitsSeen += bits;
634			nPointer = treeBase;
635			node = cpu->memory.load8(cpu, nPointer, 0);
636			if (bitsSeen == 32) {
637				bitsSeen = 0;
638				cpu->memory.store32(cpu, dest, block, 0);
639				dest += 4;
640				remaining -= 4;
641				block = 0;
642			}
643		}
644	}
645	cpu->gprs[0] = source;
646	cpu->gprs[1] = dest;
647}
648
649static void _unRl(struct GBA* gba, int width) {
650	struct ARMCore* cpu = gba->cpu;
651	uint32_t source = cpu->gprs[0];
652	int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
653	int padding = (4 - remaining) & 0x3;
654	// We assume the signature byte (0x30) is correct
655	int blockheader;
656	int block;
657	source += 4;
658	uint32_t dest = cpu->gprs[1];
659	int halfword = 0;
660	while (remaining > 0) {
661		blockheader = cpu->memory.load8(cpu, source, 0);
662		++source;
663		if (blockheader & 0x80) {
664			// Compressed
665			blockheader &= 0x7F;
666			blockheader += 3;
667			block = cpu->memory.load8(cpu, source, 0);
668			++source;
669			while (blockheader-- && remaining) {
670				--remaining;
671				if (width == 2) {
672					if (dest & 1) {
673						halfword |= block << 8;
674						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
675					} else {
676						halfword = block;
677					}
678				} else {
679					cpu->memory.store8(cpu, dest, block, 0);
680				}
681				++dest;
682			}
683		} else {
684			// Uncompressed
685			blockheader++;
686			while (blockheader-- && remaining) {
687				--remaining;
688				int byte = cpu->memory.load8(cpu, source, 0);
689				++source;
690				if (width == 2) {
691					if (dest & 1) {
692						halfword |= byte << 8;
693						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
694					} else {
695						halfword = byte;
696					}
697				} else {
698					cpu->memory.store8(cpu, dest, byte, 0);
699				}
700				++dest;
701			}
702		}
703	}
704	if (width == 2) {
705		if (dest & 1) {
706			--padding;
707			++dest;
708		}
709		for (; padding > 0; padding -= 2, dest += 2) {
710			cpu->memory.store16(cpu, dest, 0, 0);
711		}
712	} else {
713		while (padding--) {
714			cpu->memory.store8(cpu, dest, 0, 0);
715			++dest;
716		}
717	}
718	cpu->gprs[0] = source;
719	cpu->gprs[1] = dest;
720}
721
722static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
723	struct ARMCore* cpu = gba->cpu;
724	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
725	uint32_t dest = cpu->gprs[1];
726	uint32_t header = cpu->memory.load32(cpu, source, 0);
727	int remaining = header >> 8;
728	// We assume the signature nybble (0x8) is correct
729	uint16_t halfword = 0;
730	uint16_t old = 0;
731	source += 4;
732	while (remaining > 0) {
733		uint16_t new;
734		if (inwidth == 1) {
735			new = cpu->memory.load8(cpu, source, 0);
736		} else {
737			new = cpu->memory.load16(cpu, source, 0);
738		}
739		new += old;
740		if (outwidth > inwidth) {
741			halfword >>= 8;
742			halfword |= (new << 8);
743			if (source & 1) {
744				cpu->memory.store16(cpu, dest, halfword, 0);
745				dest += outwidth;
746				remaining -= outwidth;
747			}
748		} else if (outwidth == 1) {
749			cpu->memory.store8(cpu, dest, new, 0);
750			dest += outwidth;
751			remaining -= outwidth;
752		} else {
753			cpu->memory.store16(cpu, dest, new, 0);
754			dest += outwidth;
755			remaining -= outwidth;
756		}
757		old = new;
758		source += inwidth;
759	}
760	cpu->gprs[0] = source;
761	cpu->gprs[1] = dest;
762}
763
764static void _unBitPack(struct GBA* gba) {
765	struct ARMCore* cpu = gba->cpu;
766	uint32_t source = cpu->gprs[0];
767	uint32_t dest = cpu->gprs[1];
768	uint32_t info = cpu->gprs[2];
769	unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
770	unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
771	unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
772	switch (sourceWidth) {
773	case 1:
774	case 2:
775	case 4:
776	case 8:
777		break;
778	default:
779		mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
780		return;
781	}
782	switch (destWidth) {
783	case 1:
784	case 2:
785	case 4:
786	case 8:
787	case 16:
788	case 32:
789		break;
790	default:
791		mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
792		return;
793	}
794	uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
795	uint8_t in = 0;
796	uint32_t out = 0;
797	int bitsRemaining = 0;
798	int bitsEaten = 0;
799	while (sourceLen > 0) {
800		if (!bitsRemaining) {
801			in = cpu->memory.load8(cpu, source, 0);
802			bitsRemaining = 8;
803			++source;
804			--sourceLen;
805		}
806		unsigned scaled = in & ((1 << sourceWidth) - 1);
807		in >>= sourceWidth;
808		if (scaled || bias & 0x80000000) {
809			scaled += bias & 0x7FFFFFFF;
810			scaled &= (1 << destWidth) - 1;
811		}
812		bitsRemaining -= sourceWidth;
813		out |= scaled << bitsEaten;
814		bitsEaten += destWidth;
815		if (bitsEaten == 32) {
816			cpu->memory.store32(cpu, dest, out, 0);
817			bitsEaten = 0;
818			out = 0;
819			dest += 4;
820		}
821	}
822}