all repos — mgba @ dec8a1223c5199c632b89d659dfc28e7f2bee8fb

mGBA Game Boy Advance Emulator

src/gba/bios.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include "bios.h"
  7
  8#include "arm/isa-inlines.h"
  9#include "arm/macros.h"
 10#include "gba/gba.h"
 11#include "gba/io.h"
 12#include "gba/memory.h"
 13
 14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
 15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
 16
 17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS");
 18
 19static void _unLz77(struct GBA* gba, int width);
 20static void _unHuffman(struct GBA* gba);
 21static void _unRl(struct GBA* gba, int width);
 22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
 23
 24static void _SoftReset(struct GBA* gba) {
 25	struct ARMCore* cpu = gba->cpu;
 26	ARMSetPrivilegeMode(cpu, MODE_IRQ);
 27	cpu->spsr.packed = 0;
 28	cpu->gprs[ARM_LR] = 0;
 29	cpu->gprs[ARM_SP] = SP_BASE_IRQ;
 30	ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
 31	cpu->spsr.packed = 0;
 32	cpu->gprs[ARM_LR] = 0;
 33	cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
 34	ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
 35	cpu->gprs[ARM_LR] = 0;
 36	cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
 37	int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
 38	memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
 39	if (flag) {
 40		cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
 41	} else {
 42		cpu->gprs[ARM_PC] = BASE_CART0;
 43	}
 44	_ARMSetMode(cpu, MODE_ARM);
 45	int currentCycles = 0;
 46	ARM_WRITE_PC;
 47}
 48
 49static void _RegisterRamReset(struct GBA* gba) {
 50	uint32_t registers = gba->cpu->gprs[0];
 51	struct ARMCore* cpu = gba->cpu;
 52	cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
 53	if (registers & 0x01) {
 54		memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
 55	}
 56	if (registers & 0x02) {
 57		memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
 58	}
 59	if (registers & 0x04) {
 60		memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
 61	}
 62	if (registers & 0x08) {
 63		memset(gba->video.renderer->vram, 0, SIZE_VRAM);
 64	}
 65	if (registers & 0x10) {
 66		memset(gba->video.oam.raw, 0, SIZE_OAM);
 67	}
 68	if (registers & 0x20) {
 69		cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
 70		cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
 71		cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
 72		cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
 73		cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
 74		cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
 75	}
 76	if (registers & 0x40) {
 77		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
 78		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
 79		cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
 80		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
 81		cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
 82		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
 83		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
 84		cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
 85		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
 86		cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
 87		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
 88		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
 89		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
 90		cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
 91		memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
 92	}
 93	if (registers & 0x80) {
 94		cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
 95		cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
 96		cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
 97		cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
 98		cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
 99		cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
100		cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
101		cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
102		cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
103		cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
104		cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
105		cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
106		cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
107		cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
108		cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
109		cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
110		cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
111		cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
112		cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
113		cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
114		cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
115		cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
116		cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
117		cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
118		cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
119		cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
120		cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
121		cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
122		cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
123		cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
124		cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
125		cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
126		cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
127		cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
128		cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
129		cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
130		cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
131		cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
132		cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
133		cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
134		cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
135		cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
136		cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
137		cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
138		cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
139		cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
140		cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
141		cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
142		cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
143		cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
144		cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
145		cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
146		cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
147		cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
148		cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
149		cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
150		cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
151		cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
152		cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
153		cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
154		cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
155		cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
156		cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
157		cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
158		cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
159		cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
160		cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
161		cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
162		cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
163		cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
164		cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
165		cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
166	}
167}
168
169static void _BgAffineSet(struct GBA* gba) {
170	struct ARMCore* cpu = gba->cpu;
171	int i = cpu->gprs[2];
172	float ox, oy;
173	float cx, cy;
174	float sx, sy;
175	float theta;
176	int offset = cpu->gprs[0];
177	int destination = cpu->gprs[1];
178	float a, b, c, d;
179	float rx, ry;
180	while (i--) {
181		// [ sx   0  0 ]   [ cos(theta)  -sin(theta)  0 ]   [ 1  0  cx - ox ]   [ A B rx ]
182		// [  0  sy  0 ] * [ sin(theta)   cos(theta)  0 ] * [ 0  1  cy - oy ] = [ C D ry ]
183		// [  0   0  1 ]   [     0            0       1 ]   [ 0  0     1    ]   [ 0 0  1 ]
184		ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
185		oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
186		cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
187		cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
188		sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
189		sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
190		theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
191		offset += 20;
192		// Rotation
193		a = d = cosf(theta);
194		b = c = sinf(theta);
195		// Scale
196		a *= sx;
197		b *= -sx;
198		c *= sy;
199		d *= sy;
200		// Translate
201		rx = ox - (a * cx + b * cy);
202		ry = oy - (c * cx + d * cy);
203		cpu->memory.store16(cpu, destination, a * 256, 0);
204		cpu->memory.store16(cpu, destination + 2, b * 256, 0);
205		cpu->memory.store16(cpu, destination + 4, c * 256, 0);
206		cpu->memory.store16(cpu, destination + 6, d * 256, 0);
207		cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
208		cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
209		destination += 16;
210	}
211}
212
213static void _ObjAffineSet(struct GBA* gba) {
214	struct ARMCore* cpu = gba->cpu;
215	int i = cpu->gprs[2];
216	float sx, sy;
217	float theta;
218	int offset = cpu->gprs[0];
219	int destination = cpu->gprs[1];
220	int diff = cpu->gprs[3];
221	float a, b, c, d;
222	while (i--) {
223		// [ sx   0 ]   [ cos(theta)  -sin(theta) ]   [ A B ]
224		// [  0  sy ] * [ sin(theta)   cos(theta) ] = [ C D ]
225		sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
226		sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
227		theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
228		offset += 8;
229		// Rotation
230		a = d = cosf(theta);
231		b = c = sinf(theta);
232		// Scale
233		a *= sx;
234		b *= -sx;
235		c *= sy;
236		d *= sy;
237		cpu->memory.store16(cpu, destination, a * 256, 0);
238		cpu->memory.store16(cpu, destination + diff, b * 256, 0);
239		cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
240		cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
241		destination += diff * 4;
242	}
243}
244
245static void _MidiKey2Freq(struct GBA* gba) {
246	struct ARMCore* cpu = gba->cpu;
247
248	int oldRegion = gba->memory.activeRegion;
249	gba->memory.activeRegion = REGION_BIOS;
250	uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
251	gba->memory.activeRegion = oldRegion;
252
253	cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
254}
255
256static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
257	struct ARMCore* cpu = gba->cpu;
258	if (denom != 0) {
259		div_t result = div(num, denom);
260		cpu->gprs[0] = result.quot;
261		cpu->gprs[1] = result.rem;
262		cpu->gprs[3] = abs(result.quot);
263	} else {
264		mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
265		// If abs(num) > 1, this should hang, but that would be painful to
266		// emulate in HLE, and no game will get into a state where it hangs...
267		cpu->gprs[0] = (num < 0) ? -1 : 1;
268		cpu->gprs[1] = num;
269		cpu->gprs[3] = 1;
270	}
271}
272
273static int16_t _ArcTan(int16_t i) {
274	int32_t a = -((i * i) >> 14);
275	int32_t b = ((0xA9 * a) >> 14) + 0x390;
276	b = ((b * a) >> 14) + 0x91C;
277	b = ((b * a) >> 14) + 0xFB6;
278	b = ((b * a) >> 14) + 0x16AA;
279	b = ((b * a) >> 14) + 0x2081;
280	b = ((b * a) >> 14) + 0x3651;
281	b = ((b * a) >> 14) + 0xA2F9;
282	return (i * b) >> 16;
283}
284
285static int16_t _ArcTan2(int16_t x, int16_t y) {
286	if (!y) {
287		if (x >= 0) {
288			return 0;
289		}
290		return 0x8000;
291	}
292	if (!x) {
293		if (y >= 0) {
294			return 0x4000;
295		}
296		return 0xC000;
297	}
298	if (y >= 0) {
299		if (x >= 0) {
300			if (x >= y) {
301				return _ArcTan((y << 14)/ x);
302			}
303		} else if (-x >= y) {
304			return _ArcTan((y << 14) / x) + 0x8000;
305		}
306		return 0x4000 - _ArcTan((x << 14) / y);
307	} else {
308		if (x <= 0) {
309			if (-x > -y) {
310				return _ArcTan((y << 14) / x) + 0x8000;
311			}
312		} else if (x >= -y) {
313			return _ArcTan((y << 14) / x) + 0x10000;
314		}
315		return 0xC000 - _ArcTan((x << 14) / y);
316	}
317}
318
319void GBASwi16(struct ARMCore* cpu, int immediate) {
320	struct GBA* gba = (struct GBA*) cpu->master;
321	mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
322	    immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
323
324	if (gba->memory.fullBios) {
325		ARMRaiseSWI(cpu);
326		return;
327	}
328	switch (immediate) {
329	case 0x0:
330		_SoftReset(gba);
331		break;
332	case 0x1:
333		_RegisterRamReset(gba);
334		break;
335	case 0x2:
336		GBAHalt(gba);
337		break;
338	case 0x3:
339		GBAStop(gba);
340		break;
341	case 0x05:
342	// VBlankIntrWait
343	// Fall through:
344	case 0x04:
345		// IntrWait
346		ARMRaiseSWI(cpu);
347		break;
348	case 0x6:
349		_Div(gba, cpu->gprs[0], cpu->gprs[1]);
350		break;
351	case 0x7:
352		_Div(gba, cpu->gprs[1], cpu->gprs[0]);
353		break;
354	case 0x8:
355		cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
356		break;
357	case 0x9:
358		cpu->gprs[0] = (uint16_t) _ArcTan(cpu->gprs[0]);
359		break;
360	case 0xA:
361		cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1]);
362		break;
363	case 0xB:
364	case 0xC:
365		if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
366			mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
367			break;
368		}
369		if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
370			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
371		}
372		if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
373			mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
374		}
375		ARMRaiseSWI(cpu);
376		break;
377	case 0xD:
378		cpu->gprs[0] = GBA_BIOS_CHECKSUM;
379		cpu->gprs[1] = 1;
380		cpu->gprs[3] = SIZE_BIOS;
381		break;
382	case 0xE:
383		_BgAffineSet(gba);
384		break;
385	case 0xF:
386		_ObjAffineSet(gba);
387		break;
388	case 0x11:
389	case 0x12:
390		if (cpu->gprs[0] < BASE_WORKING_RAM) {
391			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
392			break;
393		}
394		switch (cpu->gprs[1] >> BASE_OFFSET) {
395		default:
396			mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
397		// Fall through
398		case REGION_WORKING_RAM:
399		case REGION_WORKING_IRAM:
400		case REGION_VRAM:
401			_unLz77(gba, immediate == 0x11 ? 1 : 2);
402			break;
403		}
404		break;
405	case 0x13:
406		if (cpu->gprs[0] < BASE_WORKING_RAM) {
407			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
408			break;
409		}
410		switch (cpu->gprs[1] >> BASE_OFFSET) {
411		default:
412			mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
413		// Fall through
414		case REGION_WORKING_RAM:
415		case REGION_WORKING_IRAM:
416		case REGION_VRAM:
417			_unHuffman(gba);
418			break;
419		}
420		break;
421	case 0x14:
422	case 0x15:
423		if (cpu->gprs[0] < BASE_WORKING_RAM) {
424			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
425			break;
426		}
427		switch (cpu->gprs[1] >> BASE_OFFSET) {
428		default:
429			mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
430		// Fall through
431		case REGION_WORKING_RAM:
432		case REGION_WORKING_IRAM:
433		case REGION_VRAM:
434			_unRl(gba, immediate == 0x14 ? 1 : 2);
435			break;
436		}
437		break;
438	case 0x16:
439	case 0x17:
440	case 0x18:
441		if (cpu->gprs[0] < BASE_WORKING_RAM) {
442			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
443			break;
444		}
445		switch (cpu->gprs[1] >> BASE_OFFSET) {
446		default:
447			mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
448		// Fall through
449		case REGION_WORKING_RAM:
450		case REGION_WORKING_IRAM:
451		case REGION_VRAM:
452			_unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
453			break;
454		}
455		break;
456	case 0x19:
457		// SoundBias is mostly meaningless here
458		mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
459		break;
460	case 0x1F:
461		_MidiKey2Freq(gba);
462		break;
463	default:
464		mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
465	}
466	gba->memory.biosPrefetch = 0xE3A02004;
467}
468
469void GBASwi32(struct ARMCore* cpu, int immediate) {
470	GBASwi16(cpu, immediate >> 16);
471}
472
473uint32_t GBAChecksum(uint32_t* memory, size_t size) {
474	size_t i;
475	uint32_t sum = 0;
476	for (i = 0; i < size; i += 4) {
477		sum += memory[i >> 2];
478	}
479	return sum;
480}
481
482static void _unLz77(struct GBA* gba, int width) {
483	struct ARMCore* cpu = gba->cpu;
484	uint32_t source = cpu->gprs[0];
485	uint32_t dest = cpu->gprs[1];
486	int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
487	// We assume the signature byte (0x10) is correct
488	int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
489	source += 4;
490	int blocksRemaining = 0;
491	uint32_t disp;
492	int bytes;
493	int byte;
494	int halfword = 0;
495	while (remaining > 0) {
496		if (blocksRemaining) {
497			if (blockheader & 0x80) {
498				// Compressed
499				int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
500				source += 2;
501				disp = dest - (block & 0x0FFF) - 1;
502				bytes = (block >> 12) + 3;
503				while (bytes-- && remaining) {
504					--remaining;
505					if (width == 2) {
506						byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
507						if (dest & 1) {
508							byte >>= (disp & 1) * 8;
509							halfword |= byte << 8;
510							cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
511						} else {
512							byte >>= (disp & 1) * 8;
513							halfword = byte & 0xFF;
514						}
515					} else {
516						byte = cpu->memory.load8(cpu, disp, 0);
517						cpu->memory.store8(cpu, dest, byte, 0);
518					}
519					++disp;
520					++dest;
521				}
522			} else {
523				// Uncompressed
524				byte = cpu->memory.load8(cpu, source, 0);
525				++source;
526				if (width == 2) {
527					if (dest & 1) {
528						halfword |= byte << 8;
529						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
530					} else {
531						halfword = byte;
532					}
533				} else {
534					cpu->memory.store8(cpu, dest, byte, 0);
535				}
536				++dest;
537				--remaining;
538			}
539			blockheader <<= 1;
540			--blocksRemaining;
541		} else {
542			blockheader = cpu->memory.load8(cpu, source, 0);
543			++source;
544			blocksRemaining = 8;
545		}
546	}
547	cpu->gprs[0] = source;
548	cpu->gprs[1] = dest;
549	cpu->gprs[3] = 0;
550}
551
552DECL_BITFIELD(HuffmanNode, uint8_t);
553DECL_BITS(HuffmanNode, Offset, 0, 6);
554DECL_BIT(HuffmanNode, RTerm, 6);
555DECL_BIT(HuffmanNode, LTerm, 7);
556
557static void _unHuffman(struct GBA* gba) {
558	struct ARMCore* cpu = gba->cpu;
559	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
560	uint32_t dest = cpu->gprs[1];
561	uint32_t header = cpu->memory.load32(cpu, source, 0);
562	int remaining = header >> 8;
563	unsigned bits = header & 0xF;
564	if (bits == 0) {
565		mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
566		bits = 8;
567	}
568	if (32 % bits || bits == 1) {
569		mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
570		return;
571	}
572	// We assume the signature byte (0x20) is correct
573	int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
574	int block = 0;
575	uint32_t treeBase = source + 5;
576	source += 5 + treesize;
577	uint32_t nPointer = treeBase;
578	HuffmanNode node;
579	int bitsRemaining;
580	int readBits;
581	int bitsSeen = 0;
582	node = cpu->memory.load8(cpu, nPointer, 0);
583	while (remaining > 0) {
584		uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
585		source += 4;
586		for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
587			uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
588			if (bitstream & 0x80000000) {
589				// Go right
590				if (HuffmanNodeIsRTerm(node)) {
591					readBits = cpu->memory.load8(cpu, next + 1, 0);
592				} else {
593					nPointer = next + 1;
594					node = cpu->memory.load8(cpu, nPointer, 0);
595					continue;
596				}
597			} else {
598				// Go left
599				if (HuffmanNodeIsLTerm(node)) {
600					readBits = cpu->memory.load8(cpu, next, 0);
601				} else {
602					nPointer = next;
603					node = cpu->memory.load8(cpu, nPointer, 0);
604					continue;
605				}
606			}
607
608			block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
609			bitsSeen += bits;
610			nPointer = treeBase;
611			node = cpu->memory.load8(cpu, nPointer, 0);
612			if (bitsSeen == 32) {
613				bitsSeen = 0;
614				cpu->memory.store32(cpu, dest, block, 0);
615				dest += 4;
616				remaining -= 4;
617				block = 0;
618			}
619		}
620	}
621	cpu->gprs[0] = source;
622	cpu->gprs[1] = dest;
623}
624
625static void _unRl(struct GBA* gba, int width) {
626	struct ARMCore* cpu = gba->cpu;
627	uint32_t source = cpu->gprs[0];
628	int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
629	int padding = (4 - remaining) & 0x3;
630	// We assume the signature byte (0x30) is correct
631	int blockheader;
632	int block;
633	source += 4;
634	uint32_t dest = cpu->gprs[1];
635	int halfword = 0;
636	while (remaining > 0) {
637		blockheader = cpu->memory.load8(cpu, source, 0);
638		++source;
639		if (blockheader & 0x80) {
640			// Compressed
641			blockheader &= 0x7F;
642			blockheader += 3;
643			block = cpu->memory.load8(cpu, source, 0);
644			++source;
645			while (blockheader-- && remaining) {
646				--remaining;
647				if (width == 2) {
648					if (dest & 1) {
649						halfword |= block << 8;
650						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
651					} else {
652						halfword = block;
653					}
654				} else {
655					cpu->memory.store8(cpu, dest, block, 0);
656				}
657				++dest;
658			}
659		} else {
660			// Uncompressed
661			blockheader++;
662			while (blockheader-- && remaining) {
663				--remaining;
664				int byte = cpu->memory.load8(cpu, source, 0);
665				++source;
666				if (width == 2) {
667					if (dest & 1) {
668						halfword |= byte << 8;
669						cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
670					} else {
671						halfword = byte;
672					}
673				} else {
674					cpu->memory.store8(cpu, dest, byte, 0);
675				}
676				++dest;
677			}
678		}
679	}
680	if (width == 2) {
681		if (dest & 1) {
682			--padding;
683			++dest;
684		}
685		for (; padding > 0; padding -= 2, dest += 2) {
686			cpu->memory.store16(cpu, dest, 0, 0);
687		}
688	} else {
689		while (padding--) {
690			cpu->memory.store8(cpu, dest, 0, 0);
691			++dest;
692		}
693	}
694	cpu->gprs[0] = source;
695	cpu->gprs[1] = dest;
696}
697
698static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
699	struct ARMCore* cpu = gba->cpu;
700	uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
701	uint32_t dest = cpu->gprs[1];
702	uint32_t header = cpu->memory.load32(cpu, source, 0);
703	int remaining = header >> 8;
704	// We assume the signature nybble (0x8) is correct
705	uint16_t halfword = 0;
706	uint16_t old = 0;
707	source += 4;
708	while (remaining > 0) {
709		uint16_t new;
710		if (inwidth == 1) {
711			new = cpu->memory.load8(cpu, source, 0);
712		} else {
713			new = cpu->memory.load16(cpu, source, 0);
714		}
715		new += old;
716		if (outwidth > inwidth) {
717			halfword >>= 8;
718			halfword |= (new << 8);
719			if (source & 1) {
720				cpu->memory.store16(cpu, dest, halfword, 0);
721				dest += outwidth;
722				remaining -= outwidth;
723			}
724		} else if (outwidth == 1) {
725			cpu->memory.store8(cpu, dest, new, 0);
726			dest += outwidth;
727			remaining -= outwidth;
728		} else {
729			cpu->memory.store16(cpu, dest, new, 0);
730			dest += outwidth;
731			remaining -= outwidth;
732		}
733		old = new;
734		source += inwidth;
735	}
736	cpu->gprs[0] = source;
737	cpu->gprs[1] = dest;
738}