src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include <mgba/internal/gba/bios.h>
7
8#include <mgba/internal/arm/isa-inlines.h>
9#include <mgba/internal/arm/macros.h>
10#include <mgba/internal/gba/gba.h>
11#include <mgba/internal/gba/io.h>
12#include <mgba/internal/gba/memory.h>
13
14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
16
17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS", "gba.bios");
18
19static void _unLz77(struct GBA* gba, int width);
20static void _unHuffman(struct GBA* gba);
21static void _unRl(struct GBA* gba, int width);
22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
23static void _unBitPack(struct GBA* gba);
24
25static void _SoftReset(struct GBA* gba) {
26 struct ARMCore* cpu = gba->cpu;
27 ARMSetPrivilegeMode(cpu, MODE_IRQ);
28 cpu->spsr.packed = 0;
29 cpu->gprs[ARM_LR] = 0;
30 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
31 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
32 cpu->spsr.packed = 0;
33 cpu->gprs[ARM_LR] = 0;
34 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
35 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
36 cpu->gprs[ARM_LR] = 0;
37 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
38 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
39 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
40 if (flag) {
41 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
42 } else {
43 cpu->gprs[ARM_PC] = BASE_CART0;
44 }
45 _ARMSetMode(cpu, MODE_ARM);
46 int currentCycles = 0;
47 ARM_WRITE_PC;
48}
49
50static void _RegisterRamReset(struct GBA* gba) {
51 uint32_t registers = gba->cpu->gprs[0];
52 struct ARMCore* cpu = gba->cpu;
53 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
54 if (registers & 0x01) {
55 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
56 }
57 if (registers & 0x02) {
58 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
59 }
60 if (registers & 0x04) {
61 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
62 }
63 if (registers & 0x08) {
64 memset(gba->video.vram, 0, SIZE_VRAM);
65 }
66 if (registers & 0x10) {
67 memset(gba->video.oam.raw, 0, SIZE_OAM);
68 }
69 if (registers & 0x20) {
70 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
71 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
72 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
73 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
74 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
75 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
76 }
77 if (registers & 0x40) {
78 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
79 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
80 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
81 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
82 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
86 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
87 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
88 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
89 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
91 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
92 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
93 }
94 if (registers & 0x80) {
95 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
104 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
105 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
106 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
107 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
112 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
113 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
114 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
118 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
119 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
120 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
122 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
125 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
126 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
128 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
131 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
132 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
165 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
166 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
167 }
168}
169
170static void _BgAffineSet(struct GBA* gba) {
171 struct ARMCore* cpu = gba->cpu;
172 int i = cpu->gprs[2];
173 float ox, oy;
174 float cx, cy;
175 float sx, sy;
176 float theta;
177 int offset = cpu->gprs[0];
178 int destination = cpu->gprs[1];
179 float a, b, c, d;
180 float rx, ry;
181 while (i--) {
182 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
183 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
184 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
185 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
186 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
187 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
188 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
189 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
190 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
191 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
192 offset += 20;
193 // Rotation
194 a = d = cosf(theta);
195 b = c = sinf(theta);
196 // Scale
197 a *= sx;
198 b *= -sx;
199 c *= sy;
200 d *= sy;
201 // Translate
202 rx = ox - (a * cx + b * cy);
203 ry = oy - (c * cx + d * cy);
204 cpu->memory.store16(cpu, destination, a * 256, 0);
205 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
206 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
207 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
208 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
209 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
210 destination += 16;
211 }
212}
213
214static void _ObjAffineSet(struct GBA* gba) {
215 struct ARMCore* cpu = gba->cpu;
216 int i = cpu->gprs[2];
217 float sx, sy;
218 float theta;
219 int offset = cpu->gprs[0];
220 int destination = cpu->gprs[1];
221 int diff = cpu->gprs[3];
222 float a, b, c, d;
223 while (i--) {
224 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
225 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
226 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
227 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
228 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
229 offset += 8;
230 // Rotation
231 a = d = cosf(theta);
232 b = c = sinf(theta);
233 // Scale
234 a *= sx;
235 b *= -sx;
236 c *= sy;
237 d *= sy;
238 cpu->memory.store16(cpu, destination, a * 256, 0);
239 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
240 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
241 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
242 destination += diff * 4;
243 }
244}
245
246static void _MidiKey2Freq(struct GBA* gba) {
247 struct ARMCore* cpu = gba->cpu;
248
249 int oldRegion = gba->memory.activeRegion;
250 gba->memory.activeRegion = REGION_BIOS;
251 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
252 gba->memory.activeRegion = oldRegion;
253
254 cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
255}
256
257static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
258 struct ARMCore* cpu = gba->cpu;
259 if (denom != 0 && (denom != -1 || num != INT32_MIN)) {
260 div_t result = div(num, denom);
261 cpu->gprs[0] = result.quot;
262 cpu->gprs[1] = result.rem;
263 cpu->gprs[3] = abs(result.quot);
264 } else if (denom == 0) {
265 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
266 // If abs(num) > 1, this should hang, but that would be painful to
267 // emulate in HLE, and no game will get into a state where it hangs...
268 cpu->gprs[0] = (num < 0) ? -1 : 1;
269 cpu->gprs[1] = num;
270 cpu->gprs[3] = 1;
271 } else {
272 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide INT_MIN by -1!");
273 cpu->gprs[0] = INT32_MIN;
274 cpu->gprs[1] = 0;
275 cpu->gprs[3] = INT32_MIN;
276 }
277}
278
279static int16_t _ArcTan(int32_t i, int32_t* r1, int32_t* r3) {
280 int32_t a = -((i * i) >> 14);
281 int32_t b = ((0xA9 * a) >> 14) + 0x390;
282 b = ((b * a) >> 14) + 0x91C;
283 b = ((b * a) >> 14) + 0xFB6;
284 b = ((b * a) >> 14) + 0x16AA;
285 b = ((b * a) >> 14) + 0x2081;
286 b = ((b * a) >> 14) + 0x3651;
287 b = ((b * a) >> 14) + 0xA2F9;
288 if (r1) {
289 *r1 = a;
290 }
291 if (r3) {
292 *r3 = b;
293 }
294 return (i * b) >> 16;
295}
296
297static int16_t _ArcTan2(int32_t x, int32_t y, int32_t* r1) {
298 if (!y) {
299 if (x >= 0) {
300 return 0;
301 }
302 return 0x8000;
303 }
304 if (!x) {
305 if (y >= 0) {
306 return 0x4000;
307 }
308 return 0xC000;
309 }
310 if (y >= 0) {
311 if (x >= 0) {
312 if (x >= y) {
313 return _ArcTan((y << 14) / x, r1, NULL);
314 }
315 } else if (-x >= y) {
316 return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
317 }
318 return 0x4000 - _ArcTan((x << 14) / y, r1, NULL);
319 } else {
320 if (x <= 0) {
321 if (-x > -y) {
322 return _ArcTan((y << 14) / x, r1, NULL) + 0x8000;
323 }
324 } else if (x >= -y) {
325 return _ArcTan((y << 14) / x, r1, NULL) + 0x10000;
326 }
327 return 0xC000 - _ArcTan((x << 14) / y, r1, NULL);
328 }
329}
330
331void GBASwi16(struct ARMCore* cpu, int immediate) {
332 struct GBA* gba = (struct GBA*) cpu->master;
333 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
334 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
335
336 if (gba->memory.fullBios) {
337 ARMRaiseSWI(cpu);
338 return;
339 }
340 switch (immediate) {
341 case 0x0:
342 _SoftReset(gba);
343 break;
344 case 0x1:
345 _RegisterRamReset(gba);
346 break;
347 case 0x2:
348 GBAHalt(gba);
349 break;
350 case 0x3:
351 GBAStop(gba);
352 break;
353 case 0x05:
354 // VBlankIntrWait
355 // Fall through:
356 case 0x04:
357 // IntrWait
358 ARMRaiseSWI(cpu);
359 break;
360 case 0x6:
361 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
362 break;
363 case 0x7:
364 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
365 break;
366 case 0x8:
367 cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
368 break;
369 case 0x9:
370 cpu->gprs[0] = _ArcTan(cpu->gprs[0], &cpu->gprs[1], &cpu->gprs[3]);
371 break;
372 case 0xA:
373 cpu->gprs[0] = (uint16_t) _ArcTan2(cpu->gprs[0], cpu->gprs[1], &cpu->gprs[1]);
374 cpu->gprs[3] = 0x170;
375 break;
376 case 0xB:
377 case 0xC:
378 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
379 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
380 break;
381 }
382 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
383 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
384 }
385 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
386 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
387 }
388 ARMRaiseSWI(cpu);
389 break;
390 case 0xD:
391 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
392 cpu->gprs[1] = 1;
393 cpu->gprs[3] = SIZE_BIOS;
394 break;
395 case 0xE:
396 _BgAffineSet(gba);
397 break;
398 case 0xF:
399 _ObjAffineSet(gba);
400 break;
401 case 0x10:
402 if (cpu->gprs[0] < BASE_WORKING_RAM) {
403 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source");
404 break;
405 }
406 switch (cpu->gprs[1] >> BASE_OFFSET) {
407 default:
408 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination");
409 // Fall through
410 case REGION_WORKING_RAM:
411 case REGION_WORKING_IRAM:
412 case REGION_VRAM:
413 _unBitPack(gba);
414 break;
415 }
416 break;
417 case 0x11:
418 case 0x12:
419 if (cpu->gprs[0] < BASE_WORKING_RAM) {
420 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
421 break;
422 }
423 switch (cpu->gprs[1] >> BASE_OFFSET) {
424 default:
425 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
426 // Fall through
427 case REGION_WORKING_RAM:
428 case REGION_WORKING_IRAM:
429 case REGION_VRAM:
430 _unLz77(gba, immediate == 0x11 ? 1 : 2);
431 break;
432 }
433 break;
434 case 0x13:
435 if (cpu->gprs[0] < BASE_WORKING_RAM) {
436 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
437 break;
438 }
439 switch (cpu->gprs[1] >> BASE_OFFSET) {
440 default:
441 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
442 // Fall through
443 case REGION_WORKING_RAM:
444 case REGION_WORKING_IRAM:
445 case REGION_VRAM:
446 _unHuffman(gba);
447 break;
448 }
449 break;
450 case 0x14:
451 case 0x15:
452 if (cpu->gprs[0] < BASE_WORKING_RAM) {
453 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
454 break;
455 }
456 switch (cpu->gprs[1] >> BASE_OFFSET) {
457 default:
458 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
459 // Fall through
460 case REGION_WORKING_RAM:
461 case REGION_WORKING_IRAM:
462 case REGION_VRAM:
463 _unRl(gba, immediate == 0x14 ? 1 : 2);
464 break;
465 }
466 break;
467 case 0x16:
468 case 0x17:
469 case 0x18:
470 if (cpu->gprs[0] < BASE_WORKING_RAM) {
471 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
472 break;
473 }
474 switch (cpu->gprs[1] >> BASE_OFFSET) {
475 default:
476 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
477 // Fall through
478 case REGION_WORKING_RAM:
479 case REGION_WORKING_IRAM:
480 case REGION_VRAM:
481 _unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
482 break;
483 }
484 break;
485 case 0x19:
486 // SoundBias is mostly meaningless here
487 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
488 break;
489 case 0x1F:
490 _MidiKey2Freq(gba);
491 break;
492 default:
493 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
494 }
495 gba->memory.biosPrefetch = 0xE3A02004;
496}
497
498void GBASwi32(struct ARMCore* cpu, int immediate) {
499 GBASwi16(cpu, immediate >> 16);
500}
501
502uint32_t GBAChecksum(uint32_t* memory, size_t size) {
503 size_t i;
504 uint32_t sum = 0;
505 for (i = 0; i < size; i += 4) {
506 sum += memory[i >> 2];
507 }
508 return sum;
509}
510
511static void _unLz77(struct GBA* gba, int width) {
512 struct ARMCore* cpu = gba->cpu;
513 uint32_t source = cpu->gprs[0];
514 uint32_t dest = cpu->gprs[1];
515 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
516 // We assume the signature byte (0x10) is correct
517 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
518 source += 4;
519 int blocksRemaining = 0;
520 uint32_t disp;
521 int bytes;
522 int byte;
523 int halfword = 0;
524 while (remaining > 0) {
525 if (blocksRemaining) {
526 if (blockheader & 0x80) {
527 // Compressed
528 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
529 source += 2;
530 disp = dest - (block & 0x0FFF) - 1;
531 bytes = (block >> 12) + 3;
532 while (bytes--) {
533 if (!remaining) {
534 mLOG(GBA_BIOS, GAME_ERROR, "Improperly compressed LZ77 data. Real BIOS would hang.");
535 break;
536 }
537 --remaining;
538 if (width == 2) {
539 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
540 if (dest & 1) {
541 byte >>= (disp & 1) * 8;
542 halfword |= byte << 8;
543 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
544 } else {
545 byte >>= (disp & 1) * 8;
546 halfword = byte & 0xFF;
547 }
548 } else {
549 byte = cpu->memory.load8(cpu, disp, 0);
550 cpu->memory.store8(cpu, dest, byte, 0);
551 }
552 ++disp;
553 ++dest;
554 }
555 } else {
556 // Uncompressed
557 byte = cpu->memory.load8(cpu, source, 0);
558 ++source;
559 if (width == 2) {
560 if (dest & 1) {
561 halfword |= byte << 8;
562 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
563 } else {
564 halfword = byte;
565 }
566 } else {
567 cpu->memory.store8(cpu, dest, byte, 0);
568 }
569 ++dest;
570 --remaining;
571 }
572 blockheader <<= 1;
573 --blocksRemaining;
574 } else {
575 blockheader = cpu->memory.load8(cpu, source, 0);
576 ++source;
577 blocksRemaining = 8;
578 }
579 }
580 cpu->gprs[0] = source;
581 cpu->gprs[1] = dest;
582 cpu->gprs[3] = 0;
583}
584
585DECL_BITFIELD(HuffmanNode, uint8_t);
586DECL_BITS(HuffmanNode, Offset, 0, 6);
587DECL_BIT(HuffmanNode, RTerm, 6);
588DECL_BIT(HuffmanNode, LTerm, 7);
589
590static void _unHuffman(struct GBA* gba) {
591 struct ARMCore* cpu = gba->cpu;
592 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
593 uint32_t dest = cpu->gprs[1];
594 uint32_t header = cpu->memory.load32(cpu, source, 0);
595 int remaining = header >> 8;
596 unsigned bits = header & 0xF;
597 if (bits == 0) {
598 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
599 bits = 8;
600 }
601 if (32 % bits || bits == 1) {
602 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
603 return;
604 }
605 // We assume the signature byte (0x20) is correct
606 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
607 int block = 0;
608 uint32_t treeBase = source + 5;
609 source += 5 + treesize;
610 uint32_t nPointer = treeBase;
611 HuffmanNode node;
612 int bitsRemaining;
613 int readBits;
614 int bitsSeen = 0;
615 node = cpu->memory.load8(cpu, nPointer, 0);
616 while (remaining > 0) {
617 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
618 source += 4;
619 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
620 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
621 if (bitstream & 0x80000000) {
622 // Go right
623 if (HuffmanNodeIsRTerm(node)) {
624 readBits = cpu->memory.load8(cpu, next + 1, 0);
625 } else {
626 nPointer = next + 1;
627 node = cpu->memory.load8(cpu, nPointer, 0);
628 continue;
629 }
630 } else {
631 // Go left
632 if (HuffmanNodeIsLTerm(node)) {
633 readBits = cpu->memory.load8(cpu, next, 0);
634 } else {
635 nPointer = next;
636 node = cpu->memory.load8(cpu, nPointer, 0);
637 continue;
638 }
639 }
640
641 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
642 bitsSeen += bits;
643 nPointer = treeBase;
644 node = cpu->memory.load8(cpu, nPointer, 0);
645 if (bitsSeen == 32) {
646 bitsSeen = 0;
647 cpu->memory.store32(cpu, dest, block, 0);
648 dest += 4;
649 remaining -= 4;
650 block = 0;
651 }
652 }
653 }
654 cpu->gprs[0] = source;
655 cpu->gprs[1] = dest;
656}
657
658static void _unRl(struct GBA* gba, int width) {
659 struct ARMCore* cpu = gba->cpu;
660 uint32_t source = cpu->gprs[0];
661 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
662 int padding = (4 - remaining) & 0x3;
663 // We assume the signature byte (0x30) is correct
664 int blockheader;
665 int block;
666 source += 4;
667 uint32_t dest = cpu->gprs[1];
668 int halfword = 0;
669 while (remaining > 0) {
670 blockheader = cpu->memory.load8(cpu, source, 0);
671 ++source;
672 if (blockheader & 0x80) {
673 // Compressed
674 blockheader &= 0x7F;
675 blockheader += 3;
676 block = cpu->memory.load8(cpu, source, 0);
677 ++source;
678 while (blockheader-- && remaining) {
679 --remaining;
680 if (width == 2) {
681 if (dest & 1) {
682 halfword |= block << 8;
683 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
684 } else {
685 halfword = block;
686 }
687 } else {
688 cpu->memory.store8(cpu, dest, block, 0);
689 }
690 ++dest;
691 }
692 } else {
693 // Uncompressed
694 blockheader++;
695 while (blockheader-- && remaining) {
696 --remaining;
697 int byte = cpu->memory.load8(cpu, source, 0);
698 ++source;
699 if (width == 2) {
700 if (dest & 1) {
701 halfword |= byte << 8;
702 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
703 } else {
704 halfword = byte;
705 }
706 } else {
707 cpu->memory.store8(cpu, dest, byte, 0);
708 }
709 ++dest;
710 }
711 }
712 }
713 if (width == 2) {
714 if (dest & 1) {
715 --padding;
716 ++dest;
717 }
718 for (; padding > 0; padding -= 2, dest += 2) {
719 cpu->memory.store16(cpu, dest, 0, 0);
720 }
721 } else {
722 while (padding--) {
723 cpu->memory.store8(cpu, dest, 0, 0);
724 ++dest;
725 }
726 }
727 cpu->gprs[0] = source;
728 cpu->gprs[1] = dest;
729}
730
731static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
732 struct ARMCore* cpu = gba->cpu;
733 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
734 uint32_t dest = cpu->gprs[1];
735 uint32_t header = cpu->memory.load32(cpu, source, 0);
736 int remaining = header >> 8;
737 // We assume the signature nybble (0x8) is correct
738 uint16_t halfword = 0;
739 uint16_t old = 0;
740 source += 4;
741 while (remaining > 0) {
742 uint16_t new;
743 if (inwidth == 1) {
744 new = cpu->memory.load8(cpu, source, 0);
745 } else {
746 new = cpu->memory.load16(cpu, source, 0);
747 }
748 new += old;
749 if (outwidth > inwidth) {
750 halfword >>= 8;
751 halfword |= (new << 8);
752 if (source & 1) {
753 cpu->memory.store16(cpu, dest, halfword, 0);
754 dest += outwidth;
755 remaining -= outwidth;
756 }
757 } else if (outwidth == 1) {
758 cpu->memory.store8(cpu, dest, new, 0);
759 dest += outwidth;
760 remaining -= outwidth;
761 } else {
762 cpu->memory.store16(cpu, dest, new, 0);
763 dest += outwidth;
764 remaining -= outwidth;
765 }
766 old = new;
767 source += inwidth;
768 }
769 cpu->gprs[0] = source;
770 cpu->gprs[1] = dest;
771}
772
773static void _unBitPack(struct GBA* gba) {
774 struct ARMCore* cpu = gba->cpu;
775 uint32_t source = cpu->gprs[0];
776 uint32_t dest = cpu->gprs[1];
777 uint32_t info = cpu->gprs[2];
778 unsigned sourceLen = cpu->memory.load16(cpu, info, 0);
779 unsigned sourceWidth = cpu->memory.load8(cpu, info + 2, 0);
780 unsigned destWidth = cpu->memory.load8(cpu, info + 3, 0);
781 switch (sourceWidth) {
782 case 1:
783 case 2:
784 case 4:
785 case 8:
786 break;
787 default:
788 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack source width: %u", sourceWidth);
789 return;
790 }
791 switch (destWidth) {
792 case 1:
793 case 2:
794 case 4:
795 case 8:
796 case 16:
797 case 32:
798 break;
799 default:
800 mLOG(GBA_BIOS, GAME_ERROR, "Bad BitUnPack destination width: %u", destWidth);
801 return;
802 }
803 uint32_t bias = cpu->memory.load32(cpu, info + 4, 0);
804 uint8_t in = 0;
805 uint32_t out = 0;
806 int bitsRemaining = 0;
807 int bitsEaten = 0;
808 while (sourceLen > 0) {
809 if (!bitsRemaining) {
810 in = cpu->memory.load8(cpu, source, 0);
811 bitsRemaining = 8;
812 ++source;
813 --sourceLen;
814 }
815 unsigned scaled = in & ((1 << sourceWidth) - 1);
816 in >>= sourceWidth;
817 if (scaled || bias & 0x80000000) {
818 scaled += bias & 0x7FFFFFFF;
819 scaled &= (1 << destWidth) - 1;
820 }
821 bitsRemaining -= sourceWidth;
822 out |= scaled << bitsEaten;
823 bitsEaten += destWidth;
824 if (bitsEaten == 32) {
825 cpu->memory.store32(cpu, dest, out, 0);
826 bitsEaten = 0;
827 out = 0;
828 dest += 4;
829 }
830 }
831}