src/ds/io.c (view raw)
1/* Copyright (c) 2013-2016 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include "io.h"
7
8#include "ds/ds.h"
9
10mLOG_DEFINE_CATEGORY(DS_IO, "DS I/O");
11
12static void _writeIPCSync(struct ARMCore* remoteCpu, uint16_t* remoteIo, int16_t value) {
13 remoteIo[DS7_REG_IPCSYNC >> 1] &= 0xFFF0;
14 remoteIo[DS7_REG_IPCSYNC >> 1] |= (value >> 8) & 0x0F;
15 if (value & 0x2000 && remoteIo[DS7_REG_IPCSYNC >> 1] & 0x4000) {
16 mLOG(DS_IO, STUB, "Unimplemented IPC IRQ");
17 UNUSED(remoteCpu);
18 }
19}
20
21void DS7IOInit(struct DS* ds) {
22 memset(ds->memory.io7, 0, sizeof(ds->memory.io7));
23}
24
25void DS7IOWrite(struct DS* ds, uint32_t address, uint16_t value) {
26 switch (address) {
27 // Timers
28 case DS7_REG_TM0CNT_LO:
29 DSTimerWriteTMCNT_LO(&ds->timers7[0], value);
30 return;
31 case DS7_REG_TM1CNT_LO:
32 DSTimerWriteTMCNT_LO(&ds->timers7[1], value);
33 return;
34 case DS7_REG_TM2CNT_LO:
35 DSTimerWriteTMCNT_LO(&ds->timers7[2], value);
36 return;
37 case DS7_REG_TM3CNT_LO:
38 DSTimerWriteTMCNT_LO(&ds->timers7[3], value);
39 return;
40
41 case DS7_REG_TM0CNT_HI:
42 value &= 0x00C7;
43 DSTimerWriteTMCNT_HI(&ds->timers7[0], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
44 ds->timersEnabled7 &= ~1;
45 ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[0].flags);
46 break;
47 case DS7_REG_TM1CNT_HI:
48 value &= 0x00C7;
49 DSTimerWriteTMCNT_HI(&ds->timers7[1], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
50 ds->timersEnabled7 &= ~2;
51 ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[1].flags) << 1;
52 break;
53 case DS7_REG_TM2CNT_HI:
54 value &= 0x00C7;
55 DSTimerWriteTMCNT_HI(&ds->timers7[2], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
56 ds->timersEnabled7 &= ~4;
57 ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[2].flags) << 2;
58 break;
59 case DS7_REG_TM3CNT_HI:
60 value &= 0x00C7;
61 DSTimerWriteTMCNT_HI(&ds->timers7[3], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
62 ds->timersEnabled7 &= ~8;
63 ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[3].flags) << 3;
64 break;
65
66 case DS7_REG_IPCSYNC:
67 value &= 0x6F00;
68 value |= ds->memory.io7[address >> 1] & 0x000F;
69 _writeIPCSync(ds->arm9, ds->memory.io9, value);
70 break;
71 case DS7_REG_IME:
72 DSWriteIME(ds->arm7, ds->memory.io7, value);
73 break;
74 default:
75 mLOG(DS_IO, STUB, "Stub DS7 I/O register write: %06X:%04X", address, value);
76 if (address >= DS7_REG_MAX) {
77 mLOG(DS_IO, GAME_ERROR, "Write to unused DS7 I/O register: %06X:%04X", address, value);
78 return;
79 }
80 break;
81 }
82 ds->memory.io7[address >> 1] = value;
83}
84
85void DS7IOWrite8(struct DS* ds, uint32_t address, uint8_t value) {
86 if (address < DS7_REG_MAX) {
87 uint16_t value16 = value << (8 * (address & 1));
88 value16 |= (ds->memory.io7[(address & 0xFFF) >> 1]) & ~(0xFF << (8 * (address & 1)));
89 DS7IOWrite(ds, address & 0xFFFFFFFE, value16);
90 } else {
91 mLOG(DS, STUB, "Writing to unknown DS7 register: %08X:%02X", address, value);
92 }
93}
94
95void DS7IOWrite32(struct DS* ds, uint32_t address, uint32_t value) {
96 switch (address) {
97 case DS7_REG_IE_LO:
98 DSWriteIE(ds->arm7, ds->memory.io7, value);
99 break;
100 default:
101 DS7IOWrite(ds, address, value & 0xFFFF);
102 DS7IOWrite(ds, address | 2, value >> 16);
103 return;
104 }
105 ds->memory.io7[address >> 1] = value;
106 ds->memory.io7[(address >> 1) + 1] = value >> 16;
107}
108
109uint16_t DS7IORead(struct DS* ds, uint32_t address) {
110 switch (address) {
111 case DS7_REG_IPCSYNC:
112 case DS7_REG_IME:
113 case DS7_REG_IE_LO:
114 case DS7_REG_IE_HI:
115 case DS7_REG_IF_LO:
116 case DS7_REG_IF_HI:
117 // Handled transparently by the registers
118 break;
119 default:
120 mLOG(DS_IO, STUB, "Stub DS7 I/O register read: %06X", address);
121 }
122 if (address < DS7_REG_MAX) {
123 return ds->memory.io7[address >> 1];
124 }
125 return 0;
126}
127
128void DS9IOInit(struct DS* ds) {
129 memset(ds->memory.io9, 0, sizeof(ds->memory.io9));
130}
131
132void DS9IOWrite(struct DS* ds, uint32_t address, uint16_t value) {
133 switch (address) {
134 case DS9_REG_IPCSYNC:
135 value &= 0x6F00;
136 value |= ds->memory.io9[address >> 1] & 0x000F;
137 _writeIPCSync(ds->arm7, ds->memory.io7, value);
138 break;
139 default:
140 mLOG(DS_IO, STUB, "Stub DS9 I/O register write: %06X:%04X", address, value);
141 if (address >= DS7_REG_MAX) {
142 mLOG(DS_IO, GAME_ERROR, "Write to unused DS9 I/O register: %06X:%04X", address, value);
143 return;
144 }
145 break;
146 }
147 ds->memory.io9[address >> 1] = value;
148}
149
150void DS9IOWrite8(struct DS* ds, uint32_t address, uint8_t value) {
151 if (address < DS9_REG_MAX) {
152 uint16_t value16 = value << (8 * (address & 1));
153 value16 |= (ds->memory.io9[(address & 0x1FFF) >> 1]) & ~(0xFF << (8 * (address & 1)));
154 DS9IOWrite(ds, address & 0xFFFFFFFE, value16);
155 } else {
156 mLOG(DS, STUB, "Writing to unknown DS9 register: %08X:%02X", address, value);
157 }
158}
159
160void DS9IOWrite32(struct DS* ds, uint32_t address, uint32_t value) {
161 switch (address) {
162 default:
163 DS9IOWrite(ds, address, value & 0xFFFF);
164 DS9IOWrite(ds, address | 2, value >> 16);
165 return;
166 }
167 ds->memory.io9[address >> 1] = value;
168 ds->memory.io9[(address >> 1) + 1] = value >> 16;
169}
170
171uint16_t DS9IORead(struct DS* ds, uint32_t address) {
172 switch (address) {
173 case DS9_REG_IPCSYNC:
174 // Handled transparently by the registers
175 break;
176 default:
177 mLOG(DS_IO, STUB, "Stub DS9 I/O register read: %06X", address);
178 }
179 if (address < DS9_REG_MAX) {
180 return ds->memory.io9[address >> 1];
181 }
182 return 0;
183}