src/isa-thumb.c (view raw)
1#include "isa-thumb.h"
2
3#include "isa-inlines.h"
4
5static const ThumbInstruction _thumbTable[0x400];
6
7// Instruction definitions
8// Beware pre-processor insanity
9
10#define APPLY(F, ...) F(__VA_ARGS__)
11
12#define COUNT_1(EMITTER, PREFIX, ...) \
13 EMITTER(PREFIX ## 0, 0, __VA_ARGS__) \
14 EMITTER(PREFIX ## 1, 1, __VA_ARGS__)
15
16#define COUNT_2(EMITTER, PREFIX, ...) \
17 COUNT_1(EMITTER, PREFIX, __VA_ARGS__) \
18 EMITTER(PREFIX ## 2, 2, __VA_ARGS__) \
19 EMITTER(PREFIX ## 3, 3, __VA_ARGS__)
20
21#define COUNT_3(EMITTER, PREFIX, ...) \
22 COUNT_2(EMITTER, PREFIX, __VA_ARGS__) \
23 EMITTER(PREFIX ## 4, 4, __VA_ARGS__) \
24 EMITTER(PREFIX ## 5, 5, __VA_ARGS__) \
25 EMITTER(PREFIX ## 6, 6, __VA_ARGS__) \
26 EMITTER(PREFIX ## 7, 7, __VA_ARGS__)
27
28#define COUNT_4(EMITTER, PREFIX, ...) \
29 COUNT_3(EMITTER, PREFIX, __VA_ARGS__) \
30 EMITTER(PREFIX ## 8, 8, __VA_ARGS__) \
31 EMITTER(PREFIX ## 9, 9, __VA_ARGS__) \
32 EMITTER(PREFIX ## A, 10, __VA_ARGS__) \
33 EMITTER(PREFIX ## B, 11, __VA_ARGS__) \
34 EMITTER(PREFIX ## C, 12, __VA_ARGS__) \
35 EMITTER(PREFIX ## D, 13, __VA_ARGS__) \
36 EMITTER(PREFIX ## E, 14, __VA_ARGS__) \
37 EMITTER(PREFIX ## F, 15, __VA_ARGS__)
38
39#define COUNT_5(EMITTER, PREFIX, ...) \
40 COUNT_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
41 EMITTER(PREFIX ## 10, 16, __VA_ARGS__) \
42 EMITTER(PREFIX ## 11, 17, __VA_ARGS__) \
43 EMITTER(PREFIX ## 12, 18, __VA_ARGS__) \
44 EMITTER(PREFIX ## 13, 19, __VA_ARGS__) \
45 EMITTER(PREFIX ## 14, 20, __VA_ARGS__) \
46 EMITTER(PREFIX ## 15, 21, __VA_ARGS__) \
47 EMITTER(PREFIX ## 16, 22, __VA_ARGS__) \
48 EMITTER(PREFIX ## 17, 23, __VA_ARGS__) \
49 EMITTER(PREFIX ## 18, 24, __VA_ARGS__) \
50 EMITTER(PREFIX ## 19, 25, __VA_ARGS__) \
51 EMITTER(PREFIX ## 1A, 26, __VA_ARGS__) \
52 EMITTER(PREFIX ## 1B, 27, __VA_ARGS__) \
53 EMITTER(PREFIX ## 1C, 28, __VA_ARGS__) \
54 EMITTER(PREFIX ## 1D, 29, __VA_ARGS__) \
55 EMITTER(PREFIX ## 1E, 30, __VA_ARGS__) \
56 EMITTER(PREFIX ## 1F, 31, __VA_ARGS__) \
57
58#define THUMB_WRITE_PC \
59 cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB) + WORD_SIZE_THUMB
60
61#define DEFINE_INSTRUCTION_THUMB(NAME, BODY) \
62 static void _ThumbInstruction ## NAME (struct ARMCore* cpu, uint16_t opcode) { \
63 BODY; \
64 }
65
66#define DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
67 DEFINE_INSTRUCTION_THUMB(NAME, \
68 int immediate = IMMEDIATE; \
69 BODY;)
70
71#define DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(NAME, BODY) \
72 COUNT_5(DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB, NAME ## _, BODY)
73
74DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LSL1, )
75DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LSR1, )
76DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(ASR1, )
77
78DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDR1, )
79DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDRB1, )
80DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LDRH1, )
81DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STR1, )
82DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STRB1, )
83DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(STRH1, )
84
85#define DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB(NAME, RM, BODY) \
86 DEFINE_INSTRUCTION_THUMB(NAME, \
87 int rm = RM; \
88 BODY;)
89
90#define DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(NAME, BODY) \
91 COUNT_3(DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB, NAME ## 3_R, BODY)
92
93DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(ADD, )
94DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(SUB, )
95
96#define DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB(NAME, IMMEDIATE, BODY) \
97 DEFINE_INSTRUCTION_THUMB(NAME, \
98 int immediate = IMMEDIATE; \
99 BODY;)
100
101#define DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(NAME, BODY) \
102 COUNT_3(DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
103
104DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(ADD, )
105DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(SUB, )
106
107#define DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB(NAME, RD, BODY) \
108 DEFINE_INSTRUCTION_THUMB(NAME, \
109 int rd = RD; \
110 BODY;)
111
112#define DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(NAME, BODY) \
113 COUNT_3(DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB, NAME ## _R, BODY)
114
115DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(ADD2, )
116DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(CMP1, )
117DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(MOV1, )
118DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(SUB2, )
119
120#define DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NAME, BODY) \
121 DEFINE_INSTRUCTION_THUMB(NAME, \
122 int rd = opcode & 0x0007; \
123 int rn = (opcode >> 3) & 0x0007; \
124 BODY;)
125
126DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(AND, )
127DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(EOR, )
128DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, )
129DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, )
130DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ASR2, )
131DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ADC, )
132DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(SBC, )
133DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ROR, )
134DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(TST, )
135DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(NEG, )
136DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMP2, )
137DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(CMN, )
138DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ORR, )
139DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MUL, )
140DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(BIC, )
141DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(MVN, )
142
143#define DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME, H1, H2, BODY) \
144 DEFINE_INSTRUCTION_THUMB(NAME, \
145 int rd = opcode & 0x0007 | H1; \
146 int rm = (opcode >> 3) & 0x0007 | H2; \
147 BODY;)
148
149#define DEFINE_INSTRUCTION_WITH_HIGH_THUMB(NAME, BODY) \
150 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 00, 0, 0, BODY) \
151 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 01, 0, 8, BODY) \
152 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 10, 8, 0, BODY) \
153 DEFINE_INSTRUCTION_WITH_HIGH_EX_THUMB(NAME ## 11, 8, 8, BODY)
154
155DEFINE_INSTRUCTION_WITH_HIGH_THUMB(ADD4, )
156DEFINE_INSTRUCTION_WITH_HIGH_THUMB(CMP3, )
157DEFINE_INSTRUCTION_WITH_HIGH_THUMB(MOV3, )
158
159#define DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB(NAME, RD, BODY) \
160 DEFINE_INSTRUCTION_THUMB(NAME, \
161 int rd = RD; \
162 BODY;)
163
164#define DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(NAME, BODY) \
165 COUNT_3(DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
166
167DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR3, )
168DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR4, )
169DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(STR3, )
170
171DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(ADD5, )
172DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(ADD6, )
173
174#define DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB(NAME, RM, BODY) \
175 DEFINE_INSTRUCTION_THUMB(NAME, \
176 int rm = RM; \
177 BODY;)
178
179#define DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(NAME, BODY) \
180 COUNT_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
181
182DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDR2, )
183DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRB2, )
184DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRH2, )
185DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRSB, )
186DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRSH, )
187DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STR2, )
188DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STRB2, )
189DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STRH2, )
190
191#define DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB(NAME, RS, BODY) \
192 DEFINE_INSTRUCTION_THUMB(NAME, \
193 int rs = RS; \
194 BODY;)
195
196#define DEFINE_LOAD_STORE_MULTIPLE_THUMB(NAME, BODY) \
197 COUNT_3(DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB, NAME ## _R, BODY)
198
199DEFINE_LOAD_STORE_MULTIPLE_THUMB(LDMIA, )
200DEFINE_LOAD_STORE_MULTIPLE_THUMB(STMIA, )
201
202#define DEFINE_CONDITIONAL_BRANCH_THUMB(COND) \
203 DEFINE_INSTRUCTION_THUMB(B ## COND, \
204 if (ARM_COND_ ## COND) { \
205 })
206
207DEFINE_CONDITIONAL_BRANCH_THUMB(EQ)
208DEFINE_CONDITIONAL_BRANCH_THUMB(NE)
209DEFINE_CONDITIONAL_BRANCH_THUMB(CS)
210DEFINE_CONDITIONAL_BRANCH_THUMB(CC)
211DEFINE_CONDITIONAL_BRANCH_THUMB(MI)
212DEFINE_CONDITIONAL_BRANCH_THUMB(PL)
213DEFINE_CONDITIONAL_BRANCH_THUMB(VS)
214DEFINE_CONDITIONAL_BRANCH_THUMB(VC)
215DEFINE_CONDITIONAL_BRANCH_THUMB(LS)
216DEFINE_CONDITIONAL_BRANCH_THUMB(HI)
217DEFINE_CONDITIONAL_BRANCH_THUMB(GE)
218DEFINE_CONDITIONAL_BRANCH_THUMB(LT)
219DEFINE_CONDITIONAL_BRANCH_THUMB(GT)
220DEFINE_CONDITIONAL_BRANCH_THUMB(LE)
221
222DEFINE_INSTRUCTION_THUMB(ADD7, )
223DEFINE_INSTRUCTION_THUMB(SUB4, )
224
225DEFINE_INSTRUCTION_THUMB(POP, )
226DEFINE_INSTRUCTION_THUMB(POPR, )
227DEFINE_INSTRUCTION_THUMB(PUSH, )
228DEFINE_INSTRUCTION_THUMB(PUSHR, )
229
230DEFINE_INSTRUCTION_THUMB(ILL, )
231DEFINE_INSTRUCTION_THUMB(BKPT, )
232DEFINE_INSTRUCTION_THUMB(BX, )
233
234#define DECLARE_INSTRUCTION_THUMB(EMITTER, NAME) \
235 EMITTER ## NAME
236
237#define DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, NAME) \
238 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 00), \
239 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 01), \
240 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 10), \
241 DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 11)
242
243#define DUMMY(X, ...) X,
244#define DUMMY_4(...) \
245 DUMMY(__VA_ARGS__) \
246 DUMMY(__VA_ARGS__) \
247 DUMMY(__VA_ARGS__) \
248 DUMMY(__VA_ARGS__)
249
250#define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
251 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
252 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
253 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
254 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
255 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
256 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
257 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
258 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
259 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
260 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
261 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
262 DECLARE_INSTRUCTION_THUMB(EMITTER, AND), \
263 DECLARE_INSTRUCTION_THUMB(EMITTER, EOR), \
264 DECLARE_INSTRUCTION_THUMB(EMITTER, LSL2), \
265 DECLARE_INSTRUCTION_THUMB(EMITTER, LSR2), \
266 DECLARE_INSTRUCTION_THUMB(EMITTER, ASR2), \
267 DECLARE_INSTRUCTION_THUMB(EMITTER, ADC), \
268 DECLARE_INSTRUCTION_THUMB(EMITTER, SBC), \
269 DECLARE_INSTRUCTION_THUMB(EMITTER, ROR), \
270 DECLARE_INSTRUCTION_THUMB(EMITTER, TST), \
271 DECLARE_INSTRUCTION_THUMB(EMITTER, NEG), \
272 DECLARE_INSTRUCTION_THUMB(EMITTER, CMP2), \
273 DECLARE_INSTRUCTION_THUMB(EMITTER, CMN), \
274 DECLARE_INSTRUCTION_THUMB(EMITTER, ORR), \
275 DECLARE_INSTRUCTION_THUMB(EMITTER, MUL), \
276 DECLARE_INSTRUCTION_THUMB(EMITTER, BIC), \
277 DECLARE_INSTRUCTION_THUMB(EMITTER, MVN), \
278 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, ADD4), \
279 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, CMP3), \
280 DECLARE_INSTRUCTION_WITH_HIGH_THUMB(EMITTER, MOV3), \
281 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
282 DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
283 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
284 DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
285 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR3_R)) \
286 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR2_R)) \
287 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH2_R)) \
288 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB2_R)) \
289 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSB_R)) \
290 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR2_R)) \
291 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH2_R)) \
292 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB2_R)) \
293 APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSH_R)) \
294 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR1_)) \
295 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR1_)) \
296 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB1_)) \
297 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB1_)) \
298 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH1_)) \
299 APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH1_)) \
300 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STR3_R)) \
301 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR4_R)) \
302 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD5_R)) \
303 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD6_R)) \
304 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
305 DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
306 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
307 DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
308 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
309 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
310 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
311 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, PUSH)), \
312 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, PUSHR)), \
313 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
314 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
315 DO_8(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
316 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POP)), \
317 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POPR)), \
318 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BKPT)), \
319 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
320 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STMIA_R)) \
321 APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDMIA_R)) \
322 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BEQ)), \
323 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BNE)), \
324 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BCS)), \
325 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BCC)), \
326 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BMI)), \
327 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BPL)), \
328 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BVS)), \
329 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BVC)), \
330 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BHI)), \
331 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLS)), \
332 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BGE)), \
333 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLT)), \
334 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BGT)), \
335 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BLE)), \
336 DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
337
338static const ThumbInstruction _thumbTable[0x400] = {
339 DECLARE_THUMB_EMITTER_BLOCK(_ThumbInstruction)
340};