all repos — mgba @ eaf331b2499e23320b0807be90312627bdd6b817

mGBA Game Boy Advance Emulator

src/gb/memory.h (view raw)

  1/* Copyright (c) 2013-2016 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#ifndef GB_MEMORY_H
  7#define GB_MEMORY_H
  8
  9#include "util/common.h"
 10
 11#include "core/log.h"
 12#include "gb/interface.h"
 13#include "lr35902/lr35902.h"
 14
 15mLOG_DECLARE_CATEGORY(GB_MBC);
 16mLOG_DECLARE_CATEGORY(GB_MEM);
 17
 18struct GB;
 19
 20enum {
 21	GB_BASE_CART_BANK0 = 0x0000,
 22	GB_BASE_CART_BANK1 = 0x4000,
 23	GB_BASE_VRAM = 0x8000,
 24	GB_BASE_EXTERNAL_RAM = 0xA000,
 25	GB_BASE_WORKING_RAM_BANK0 = 0xC000,
 26	GB_BASE_WORKING_RAM_BANK1 = 0xD000,
 27	GB_BASE_OAM = 0xFE00,
 28	GB_BASE_UNUSABLE = 0xFEA0,
 29	GB_BASE_IO = 0xFF00,
 30	GB_BASE_HRAM = 0xFF80,
 31	GB_BASE_IE = 0xFFFF
 32};
 33
 34enum {
 35	GB_REGION_CART_BANK0 = 0x0,
 36	GB_REGION_CART_BANK1 = 0x4,
 37	GB_REGION_VRAM = 0x8,
 38	GB_REGION_EXTERNAL_RAM = 0xA,
 39	GB_REGION_WORKING_RAM_BANK0 = 0xC,
 40	GB_REGION_WORKING_RAM_BANK1 = 0xD,
 41	GB_REGION_WORKING_RAM_BANK1_MIRROR = 0xE,
 42	GB_REGION_OTHER = 0xF,
 43};
 44
 45enum {
 46	GB_SIZE_CART_BANK0 = 0x4000,
 47	GB_SIZE_CART_MAX = 0x800000,
 48	GB_SIZE_VRAM = 0x4000,
 49	GB_SIZE_VRAM_BANK0 = 0x2000,
 50	GB_SIZE_EXTERNAL_RAM = 0x2000,
 51	GB_SIZE_WORKING_RAM = 0x8000,
 52	GB_SIZE_WORKING_RAM_BANK0 = 0x1000,
 53	GB_SIZE_OAM = 0xA0,
 54	GB_SIZE_IO = 0x80,
 55	GB_SIZE_HRAM = 0x7F,
 56};
 57
 58struct GBMemory;
 59typedef void (*GBMemoryBankController)(struct GB*, uint16_t address, uint8_t value);
 60
 61DECL_BITFIELD(GBMBC7Field, uint8_t);
 62DECL_BIT(GBMBC7Field, SK, 6);
 63DECL_BIT(GBMBC7Field, CS, 7);
 64DECL_BIT(GBMBC7Field, IO, 1);
 65
 66enum GBMBC7MachineState {
 67	GBMBC7_STATE_NULL = -1,
 68	GBMBC7_STATE_IDLE = 0,
 69	GBMBC7_STATE_READ_COMMAND = 1,
 70	GBMBC7_STATE_READ_ADDRESS = 2,
 71	GBMBC7_STATE_COMMAND_0 = 3,
 72	GBMBC7_STATE_COMMAND_SR_WRITE = 4,
 73	GBMBC7_STATE_COMMAND_SR_READ = 5,
 74	GBMBC7_STATE_COMMAND_SR_FILL = 6,
 75	GBMBC7_STATE_READ = 7,
 76	GBMBC7_STATE_WRITE = 8,
 77};
 78
 79struct GBMBC1State {
 80	int mode;
 81};
 82
 83struct GBMBC7State {
 84	enum GBMBC7MachineState state;
 85	uint32_t sr;
 86	uint8_t address;
 87	bool writable;
 88	int srBits;
 89	int command;
 90	GBMBC7Field field;
 91};
 92
 93union GBMBCState {
 94	struct GBMBC1State mbc1;
 95	struct GBMBC7State mbc7;
 96};
 97
 98struct mRotationSource;
 99struct GBMemory {
100	uint8_t* rom;
101	uint8_t* romBase;
102	uint8_t* romBank;
103	enum GBMemoryBankControllerType mbcType;
104	GBMemoryBankController mbc;
105	union GBMBCState mbcState;
106	int currentBank;
107
108	uint8_t* wram;
109	uint8_t* wramBank;
110	int wramCurrentBank;
111
112	bool sramAccess;
113	uint8_t* sram;
114	uint8_t* sramBank;
115	int sramCurrentBank;
116
117	uint8_t io[GB_SIZE_IO];
118	bool ime;
119	uint8_t ie;
120
121	uint8_t hram[GB_SIZE_HRAM];
122
123	int32_t dmaNext;
124	uint16_t dmaSource;
125	uint16_t dmaDest;
126	int dmaRemaining;
127
128	int32_t hdmaNext;
129	uint16_t hdmaSource;
130	uint16_t hdmaDest;
131	int hdmaRemaining;
132	bool isHdma;
133
134	size_t romSize;
135
136	bool rtcAccess;
137	int activeRtcReg;
138	bool rtcLatched;
139	uint8_t rtcRegs[5];
140	struct mRTCSource* rtc;
141	struct mRotationSource* rotation;
142	struct mRumble* rumble;
143};
144
145void GBMemoryInit(struct GB* gb);
146void GBMemoryDeinit(struct GB* gb);
147
148void GBMemoryReset(struct GB* gb);
149void GBMemorySwitchWramBank(struct GBMemory* memory, int bank);
150
151uint8_t GBLoad8(struct LR35902Core* cpu, uint16_t address);
152void GBStore8(struct LR35902Core* cpu, uint16_t address, int8_t value);
153
154uint8_t GBView8(struct LR35902Core* cpu, uint16_t address, int segment);
155
156int32_t GBMemoryProcessEvents(struct GB* gb, int32_t cycles);
157void GBMemoryDMA(struct GB* gb, uint16_t base);
158void GBMemoryWriteHDMA5(struct GB* gb, uint8_t value);
159
160uint8_t GBDMALoad8(struct LR35902Core* cpu, uint16_t address);
161void GBDMAStore8(struct LR35902Core* cpu, uint16_t address, int8_t value);
162
163void GBPatch8(struct LR35902Core* cpu, uint16_t address, int8_t value, int8_t* old);
164
165struct GBSerializedState;
166void GBMemorySerialize(const struct GB* gb, struct GBSerializedState* state);
167void GBMemoryDeserialize(struct GB* gb, const struct GBSerializedState* state);
168
169#endif