src/gba/bios.c (view raw)
1/* Copyright (c) 2013-2015 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include "bios.h"
7
8#include "arm/isa-inlines.h"
9#include "arm/macros.h"
10#include "gba/gba.h"
11#include "gba/io.h"
12#include "gba/memory.h"
13
14const uint32_t GBA_BIOS_CHECKSUM = 0xBAAE187F;
15const uint32_t GBA_DS_BIOS_CHECKSUM = 0xBAAE1880;
16
17mLOG_DEFINE_CATEGORY(GBA_BIOS, "GBA BIOS");
18
19static void _unLz77(struct GBA* gba, int width);
20static void _unHuffman(struct GBA* gba);
21static void _unRl(struct GBA* gba, int width);
22static void _unFilter(struct GBA* gba, int inwidth, int outwidth);
23
24static void _SoftReset(struct GBA* gba) {
25 struct ARMCore* cpu = gba->cpu;
26 ARMSetPrivilegeMode(cpu, MODE_IRQ);
27 cpu->spsr.packed = 0;
28 cpu->gprs[ARM_LR] = 0;
29 cpu->gprs[ARM_SP] = SP_BASE_IRQ;
30 ARMSetPrivilegeMode(cpu, MODE_SUPERVISOR);
31 cpu->spsr.packed = 0;
32 cpu->gprs[ARM_LR] = 0;
33 cpu->gprs[ARM_SP] = SP_BASE_SUPERVISOR;
34 ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
35 cpu->gprs[ARM_LR] = 0;
36 cpu->gprs[ARM_SP] = SP_BASE_SYSTEM;
37 int8_t flag = ((int8_t*) gba->memory.iwram)[0x7FFA];
38 memset(((int8_t*) gba->memory.iwram) + SIZE_WORKING_IRAM - 0x200, 0, 0x200);
39 if (flag) {
40 cpu->gprs[ARM_PC] = BASE_WORKING_RAM;
41 } else {
42 cpu->gprs[ARM_PC] = BASE_CART0;
43 }
44 _ARMSetMode(cpu, MODE_ARM);
45 int currentCycles = 0;
46 ARM_WRITE_PC;
47}
48
49static void _RegisterRamReset(struct GBA* gba) {
50 uint32_t registers = gba->cpu->gprs[0];
51 struct ARMCore* cpu = gba->cpu;
52 cpu->memory.store16(cpu, BASE_IO | REG_DISPCNT, 0x0080, 0);
53 if (registers & 0x01) {
54 memset(gba->memory.wram, 0, SIZE_WORKING_RAM);
55 }
56 if (registers & 0x02) {
57 memset(gba->memory.iwram, 0, SIZE_WORKING_IRAM - 0x200);
58 }
59 if (registers & 0x04) {
60 memset(gba->video.palette, 0, SIZE_PALETTE_RAM);
61 }
62 if (registers & 0x08) {
63 memset(gba->video.renderer->vram, 0, SIZE_VRAM);
64 }
65 if (registers & 0x10) {
66 memset(gba->video.oam.raw, 0, SIZE_OAM);
67 }
68 if (registers & 0x20) {
69 cpu->memory.store16(cpu, BASE_IO | REG_SIOCNT, 0x0000, 0);
70 cpu->memory.store16(cpu, BASE_IO | REG_RCNT, RCNT_INITIAL, 0);
71 cpu->memory.store16(cpu, BASE_IO | REG_SIOMLT_SEND, 0, 0);
72 cpu->memory.store16(cpu, BASE_IO | REG_JOYCNT, 0, 0);
73 cpu->memory.store32(cpu, BASE_IO | REG_JOY_RECV_LO, 0, 0);
74 cpu->memory.store32(cpu, BASE_IO | REG_JOY_TRANS_LO, 0, 0);
75 }
76 if (registers & 0x40) {
77 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_LO, 0, 0);
78 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_HI, 0, 0);
79 cpu->memory.store16(cpu, BASE_IO | REG_SOUND1CNT_X, 0, 0);
80 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_LO, 0, 0);
81 cpu->memory.store16(cpu, BASE_IO | REG_SOUND2CNT_HI, 0, 0);
82 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_LO, 0, 0);
83 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_HI, 0, 0);
84 cpu->memory.store16(cpu, BASE_IO | REG_SOUND3CNT_X, 0, 0);
85 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_LO, 0, 0);
86 cpu->memory.store16(cpu, BASE_IO | REG_SOUND4CNT_HI, 0, 0);
87 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_LO, 0, 0);
88 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_HI, 0, 0);
89 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDCNT_X, 0, 0);
90 cpu->memory.store16(cpu, BASE_IO | REG_SOUNDBIAS, 0x200, 0);
91 memset(gba->audio.psg.ch3.wavedata32, 0, sizeof(gba->audio.psg.ch3.wavedata32));
92 }
93 if (registers & 0x80) {
94 cpu->memory.store16(cpu, BASE_IO | 0x04, 0, 0);
95 cpu->memory.store16(cpu, BASE_IO | 0x06, 0, 0);
96 cpu->memory.store16(cpu, BASE_IO | 0x08, 0, 0);
97 cpu->memory.store16(cpu, BASE_IO | 0x0A, 0, 0);
98 cpu->memory.store16(cpu, BASE_IO | 0x0C, 0, 0);
99 cpu->memory.store16(cpu, BASE_IO | 0x0E, 0, 0);
100 cpu->memory.store16(cpu, BASE_IO | 0x10, 0, 0);
101 cpu->memory.store16(cpu, BASE_IO | 0x12, 0, 0);
102 cpu->memory.store16(cpu, BASE_IO | 0x14, 0, 0);
103 cpu->memory.store16(cpu, BASE_IO | 0x16, 0, 0);
104 cpu->memory.store16(cpu, BASE_IO | 0x18, 0, 0);
105 cpu->memory.store16(cpu, BASE_IO | 0x1A, 0, 0);
106 cpu->memory.store16(cpu, BASE_IO | 0x1C, 0, 0);
107 cpu->memory.store16(cpu, BASE_IO | 0x1E, 0, 0);
108 cpu->memory.store16(cpu, BASE_IO | REG_BG2PA, 0x100, 0);
109 cpu->memory.store16(cpu, BASE_IO | REG_BG2PB, 0, 0);
110 cpu->memory.store16(cpu, BASE_IO | REG_BG2PC, 0, 0);
111 cpu->memory.store16(cpu, BASE_IO | REG_BG2PD, 0x100, 0);
112 cpu->memory.store32(cpu, BASE_IO | 0x28, 0, 0);
113 cpu->memory.store32(cpu, BASE_IO | 0x2C, 0, 0);
114 cpu->memory.store16(cpu, BASE_IO | REG_BG3PA, 0x100, 0);
115 cpu->memory.store16(cpu, BASE_IO | REG_BG3PB, 0, 0);
116 cpu->memory.store16(cpu, BASE_IO | REG_BG3PC, 0, 0);
117 cpu->memory.store16(cpu, BASE_IO | REG_BG3PD, 0x100, 0);
118 cpu->memory.store32(cpu, BASE_IO | 0x38, 0, 0);
119 cpu->memory.store32(cpu, BASE_IO | 0x3C, 0, 0);
120 cpu->memory.store16(cpu, BASE_IO | 0x40, 0, 0);
121 cpu->memory.store16(cpu, BASE_IO | 0x42, 0, 0);
122 cpu->memory.store16(cpu, BASE_IO | 0x44, 0, 0);
123 cpu->memory.store16(cpu, BASE_IO | 0x46, 0, 0);
124 cpu->memory.store16(cpu, BASE_IO | 0x48, 0, 0);
125 cpu->memory.store16(cpu, BASE_IO | 0x4A, 0, 0);
126 cpu->memory.store16(cpu, BASE_IO | 0x4C, 0, 0);
127 cpu->memory.store16(cpu, BASE_IO | 0x50, 0, 0);
128 cpu->memory.store16(cpu, BASE_IO | 0x52, 0, 0);
129 cpu->memory.store16(cpu, BASE_IO | 0x54, 0, 0);
130 cpu->memory.store16(cpu, BASE_IO | 0xB0, 0, 0);
131 cpu->memory.store16(cpu, BASE_IO | 0xB2, 0, 0);
132 cpu->memory.store16(cpu, BASE_IO | 0xB4, 0, 0);
133 cpu->memory.store16(cpu, BASE_IO | 0xB6, 0, 0);
134 cpu->memory.store16(cpu, BASE_IO | 0xB8, 0, 0);
135 cpu->memory.store16(cpu, BASE_IO | 0xBA, 0, 0);
136 cpu->memory.store16(cpu, BASE_IO | 0xBC, 0, 0);
137 cpu->memory.store16(cpu, BASE_IO | 0xBE, 0, 0);
138 cpu->memory.store16(cpu, BASE_IO | 0xC0, 0, 0);
139 cpu->memory.store16(cpu, BASE_IO | 0xC2, 0, 0);
140 cpu->memory.store16(cpu, BASE_IO | 0xC4, 0, 0);
141 cpu->memory.store16(cpu, BASE_IO | 0xC6, 0, 0);
142 cpu->memory.store16(cpu, BASE_IO | 0xC8, 0, 0);
143 cpu->memory.store16(cpu, BASE_IO | 0xCA, 0, 0);
144 cpu->memory.store16(cpu, BASE_IO | 0xCC, 0, 0);
145 cpu->memory.store16(cpu, BASE_IO | 0xCE, 0, 0);
146 cpu->memory.store16(cpu, BASE_IO | 0xD0, 0, 0);
147 cpu->memory.store16(cpu, BASE_IO | 0xD2, 0, 0);
148 cpu->memory.store16(cpu, BASE_IO | 0xD4, 0, 0);
149 cpu->memory.store16(cpu, BASE_IO | 0xD6, 0, 0);
150 cpu->memory.store16(cpu, BASE_IO | 0xD8, 0, 0);
151 cpu->memory.store16(cpu, BASE_IO | 0xDA, 0, 0);
152 cpu->memory.store16(cpu, BASE_IO | 0xDC, 0, 0);
153 cpu->memory.store16(cpu, BASE_IO | 0xDE, 0, 0);
154 cpu->memory.store16(cpu, BASE_IO | 0x100, 0, 0);
155 cpu->memory.store16(cpu, BASE_IO | 0x102, 0, 0);
156 cpu->memory.store16(cpu, BASE_IO | 0x104, 0, 0);
157 cpu->memory.store16(cpu, BASE_IO | 0x106, 0, 0);
158 cpu->memory.store16(cpu, BASE_IO | 0x108, 0, 0);
159 cpu->memory.store16(cpu, BASE_IO | 0x10A, 0, 0);
160 cpu->memory.store16(cpu, BASE_IO | 0x10C, 0, 0);
161 cpu->memory.store16(cpu, BASE_IO | 0x10E, 0, 0);
162 cpu->memory.store16(cpu, BASE_IO | 0x200, 0, 0);
163 cpu->memory.store16(cpu, BASE_IO | 0x202, 0xFFFF, 0);
164 cpu->memory.store16(cpu, BASE_IO | 0x204, 0, 0);
165 cpu->memory.store16(cpu, BASE_IO | 0x208, 0, 0);
166 }
167}
168
169static void _BgAffineSet(struct GBA* gba) {
170 struct ARMCore* cpu = gba->cpu;
171 int i = cpu->gprs[2];
172 float ox, oy;
173 float cx, cy;
174 float sx, sy;
175 float theta;
176 int offset = cpu->gprs[0];
177 int destination = cpu->gprs[1];
178 float a, b, c, d;
179 float rx, ry;
180 while (i--) {
181 // [ sx 0 0 ] [ cos(theta) -sin(theta) 0 ] [ 1 0 cx - ox ] [ A B rx ]
182 // [ 0 sy 0 ] * [ sin(theta) cos(theta) 0 ] * [ 0 1 cy - oy ] = [ C D ry ]
183 // [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ] [ 0 0 1 ]
184 ox = (int32_t) cpu->memory.load32(cpu, offset, 0) / 256.f;
185 oy = (int32_t) cpu->memory.load32(cpu, offset + 4, 0) / 256.f;
186 cx = (int16_t) cpu->memory.load16(cpu, offset + 8, 0);
187 cy = (int16_t) cpu->memory.load16(cpu, offset + 10, 0);
188 sx = (int16_t) cpu->memory.load16(cpu, offset + 12, 0) / 256.f;
189 sy = (int16_t) cpu->memory.load16(cpu, offset + 14, 0) / 256.f;
190 theta = (cpu->memory.load16(cpu, offset + 16, 0) >> 8) / 128.f * M_PI;
191 offset += 20;
192 // Rotation
193 a = d = cosf(theta);
194 b = c = sinf(theta);
195 // Scale
196 a *= sx;
197 b *= -sx;
198 c *= sy;
199 d *= sy;
200 // Translate
201 rx = ox - (a * cx + b * cy);
202 ry = oy - (c * cx + d * cy);
203 cpu->memory.store16(cpu, destination, a * 256, 0);
204 cpu->memory.store16(cpu, destination + 2, b * 256, 0);
205 cpu->memory.store16(cpu, destination + 4, c * 256, 0);
206 cpu->memory.store16(cpu, destination + 6, d * 256, 0);
207 cpu->memory.store32(cpu, destination + 8, rx * 256, 0);
208 cpu->memory.store32(cpu, destination + 12, ry * 256, 0);
209 destination += 16;
210 }
211}
212
213static void _ObjAffineSet(struct GBA* gba) {
214 struct ARMCore* cpu = gba->cpu;
215 int i = cpu->gprs[2];
216 float sx, sy;
217 float theta;
218 int offset = cpu->gprs[0];
219 int destination = cpu->gprs[1];
220 int diff = cpu->gprs[3];
221 float a, b, c, d;
222 while (i--) {
223 // [ sx 0 ] [ cos(theta) -sin(theta) ] [ A B ]
224 // [ 0 sy ] * [ sin(theta) cos(theta) ] = [ C D ]
225 sx = (int16_t) cpu->memory.load16(cpu, offset, 0) / 256.f;
226 sy = (int16_t) cpu->memory.load16(cpu, offset + 2, 0) / 256.f;
227 theta = (cpu->memory.load16(cpu, offset + 4, 0) >> 8) / 128.f * M_PI;
228 offset += 8;
229 // Rotation
230 a = d = cosf(theta);
231 b = c = sinf(theta);
232 // Scale
233 a *= sx;
234 b *= -sx;
235 c *= sy;
236 d *= sy;
237 cpu->memory.store16(cpu, destination, a * 256, 0);
238 cpu->memory.store16(cpu, destination + diff, b * 256, 0);
239 cpu->memory.store16(cpu, destination + diff * 2, c * 256, 0);
240 cpu->memory.store16(cpu, destination + diff * 3, d * 256, 0);
241 destination += diff * 4;
242 }
243}
244
245static void _MidiKey2Freq(struct GBA* gba) {
246 struct ARMCore* cpu = gba->cpu;
247 uint32_t key = cpu->memory.load32(cpu, cpu->gprs[0] + 4, 0);
248 cpu->gprs[0] = key / powf(2, (180.f - cpu->gprs[1] - cpu->gprs[2] / 256.f) / 12.f);
249}
250
251static void _Div(struct GBA* gba, int32_t num, int32_t denom) {
252 struct ARMCore* cpu = gba->cpu;
253 if (denom != 0) {
254 div_t result = div(num, denom);
255 cpu->gprs[0] = result.quot;
256 cpu->gprs[1] = result.rem;
257 cpu->gprs[3] = abs(result.quot);
258 } else {
259 mLOG(GBA_BIOS, GAME_ERROR, "Attempting to divide %i by zero!", num);
260 // If abs(num) > 1, this should hang, but that would be painful to
261 // emulate in HLE, and no game will get into a state where it hangs...
262 cpu->gprs[0] = (num < 0) ? -1 : 1;
263 cpu->gprs[1] = num;
264 cpu->gprs[3] = 1;
265 }
266}
267
268void GBASwi16(struct ARMCore* cpu, int immediate) {
269 struct GBA* gba = (struct GBA*) cpu->master;
270 mLOG(GBA_BIOS, DEBUG, "SWI: %02X r0: %08X r1: %08X r2: %08X r3: %08X",
271 immediate, cpu->gprs[0], cpu->gprs[1], cpu->gprs[2], cpu->gprs[3]);
272
273 if (gba->memory.fullBios) {
274 ARMRaiseSWI(cpu);
275 return;
276 }
277 switch (immediate) {
278 case 0x0:
279 _SoftReset(gba);
280 break;
281 case 0x1:
282 _RegisterRamReset(gba);
283 break;
284 case 0x2:
285 GBAHalt(gba);
286 break;
287 case 0x3:
288 GBAStop(gba);
289 break;
290 case 0x05:
291 // VBlankIntrWait
292 // Fall through:
293 case 0x04:
294 // IntrWait
295 ARMRaiseSWI(cpu);
296 break;
297 case 0x6:
298 _Div(gba, cpu->gprs[0], cpu->gprs[1]);
299 break;
300 case 0x7:
301 _Div(gba, cpu->gprs[1], cpu->gprs[0]);
302 break;
303 case 0x8:
304 cpu->gprs[0] = sqrt((uint32_t) cpu->gprs[0]);
305 break;
306 case 0xA:
307 cpu->gprs[0] = atan2f(cpu->gprs[1] / 16384.f, cpu->gprs[0] / 16384.f) / (2 * M_PI) * 0x10000;
308 break;
309 case 0xB:
310 case 0xC:
311 if (cpu->gprs[0] >> BASE_OFFSET < REGION_WORKING_RAM) {
312 mLOG(GBA_BIOS, GAME_ERROR, "Cannot CpuSet from BIOS");
313 return;
314 }
315 if (cpu->gprs[0] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
316 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet source");
317 }
318 if (cpu->gprs[1] & (cpu->gprs[2] & (1 << 26) ? 3 : 1)) {
319 mLOG(GBA_BIOS, GAME_ERROR, "Misaligned CpuSet destination");
320 }
321 ARMRaiseSWI(cpu);
322 break;
323 case 0xD:
324 cpu->gprs[0] = GBA_BIOS_CHECKSUM;
325 cpu->gprs[1] = 1;
326 cpu->gprs[3] = SIZE_BIOS;
327 break;
328 case 0xE:
329 _BgAffineSet(gba);
330 break;
331 case 0xF:
332 _ObjAffineSet(gba);
333 break;
334 case 0x11:
335 case 0x12:
336 if (cpu->gprs[0] < BASE_WORKING_RAM) {
337 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 source");
338 break;
339 }
340 switch (cpu->gprs[1] >> BASE_OFFSET) {
341 default:
342 mLOG(GBA_BIOS, GAME_ERROR, "Bad LZ77 destination");
343 // Fall through
344 case REGION_WORKING_RAM:
345 case REGION_WORKING_IRAM:
346 case REGION_VRAM:
347 _unLz77(gba, immediate == 0x11 ? 1 : 2);
348 break;
349 }
350 break;
351 case 0x13:
352 if (cpu->gprs[0] < BASE_WORKING_RAM) {
353 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman source");
354 break;
355 }
356 switch (cpu->gprs[1] >> BASE_OFFSET) {
357 default:
358 mLOG(GBA_BIOS, GAME_ERROR, "Bad Huffman destination");
359 // Fall through
360 case REGION_WORKING_RAM:
361 case REGION_WORKING_IRAM:
362 case REGION_VRAM:
363 _unHuffman(gba);
364 break;
365 }
366 break;
367 case 0x14:
368 case 0x15:
369 if (cpu->gprs[0] < BASE_WORKING_RAM) {
370 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL source");
371 break;
372 }
373 switch (cpu->gprs[1] >> BASE_OFFSET) {
374 default:
375 mLOG(GBA_BIOS, GAME_ERROR, "Bad RL destination");
376 // Fall through
377 case REGION_WORKING_RAM:
378 case REGION_WORKING_IRAM:
379 case REGION_VRAM:
380 _unRl(gba, immediate == 0x14 ? 1 : 2);
381 break;
382 }
383 break;
384 case 0x16:
385 case 0x17:
386 case 0x18:
387 if (cpu->gprs[0] < BASE_WORKING_RAM) {
388 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter source");
389 break;
390 }
391 switch (cpu->gprs[1] >> BASE_OFFSET) {
392 default:
393 mLOG(GBA_BIOS, GAME_ERROR, "Bad UnFilter destination");
394 // Fall through
395 case REGION_WORKING_RAM:
396 case REGION_WORKING_IRAM:
397 case REGION_VRAM:
398 _unFilter(gba, immediate == 0x18 ? 2 : 1, immediate == 0x16 ? 1 : 2);
399 break;
400 }
401 break;
402 case 0x19:
403 // SoundBias is mostly meaningless here
404 mLOG(GBA_BIOS, STUB, "Stub software interrupt: SoundBias (19)");
405 break;
406 case 0x1F:
407 _MidiKey2Freq(gba);
408 break;
409 default:
410 mLOG(GBA_BIOS, STUB, "Stub software interrupt: %02X", immediate);
411 }
412 gba->memory.biosPrefetch = 0xE3A02004;
413}
414
415void GBASwi32(struct ARMCore* cpu, int immediate) {
416 GBASwi16(cpu, immediate >> 16);
417}
418
419uint32_t GBAChecksum(uint32_t* memory, size_t size) {
420 size_t i;
421 uint32_t sum = 0;
422 for (i = 0; i < size; i += 4) {
423 sum += memory[i >> 2];
424 }
425 return sum;
426}
427
428static void _unLz77(struct GBA* gba, int width) {
429 struct ARMCore* cpu = gba->cpu;
430 uint32_t source = cpu->gprs[0];
431 uint32_t dest = cpu->gprs[1];
432 int remaining = (cpu->memory.load32(cpu, source, 0) & 0xFFFFFF00) >> 8;
433 // We assume the signature byte (0x10) is correct
434 int blockheader = 0; // Some compilers warn if this isn't set, even though it's trivially provably always set
435 source += 4;
436 int blocksRemaining = 0;
437 uint32_t disp;
438 int bytes;
439 int byte;
440 int halfword = 0;
441 while (remaining > 0) {
442 if (blocksRemaining) {
443 if (blockheader & 0x80) {
444 // Compressed
445 int block = cpu->memory.load8(cpu, source + 1, 0) | (cpu->memory.load8(cpu, source, 0) << 8);
446 source += 2;
447 disp = dest - (block & 0x0FFF) - 1;
448 bytes = (block >> 12) + 3;
449 while (bytes-- && remaining) {
450 --remaining;
451 if (width == 2) {
452 byte = (int16_t) cpu->memory.load16(cpu, disp & ~1, 0);
453 if (dest & 1) {
454 byte >>= (disp & 1) * 8;
455 halfword |= byte << 8;
456 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
457 } else {
458 byte >>= (disp & 1) * 8;
459 halfword = byte & 0xFF;
460 }
461 } else {
462 byte = cpu->memory.load8(cpu, disp, 0);
463 cpu->memory.store8(cpu, dest, byte, 0);
464 }
465 ++disp;
466 ++dest;
467 }
468 } else {
469 // Uncompressed
470 byte = cpu->memory.load8(cpu, source, 0);
471 ++source;
472 if (width == 2) {
473 if (dest & 1) {
474 halfword |= byte << 8;
475 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
476 } else {
477 halfword = byte;
478 }
479 } else {
480 cpu->memory.store8(cpu, dest, byte, 0);
481 }
482 ++dest;
483 --remaining;
484 }
485 blockheader <<= 1;
486 --blocksRemaining;
487 } else {
488 blockheader = cpu->memory.load8(cpu, source, 0);
489 ++source;
490 blocksRemaining = 8;
491 }
492 }
493 cpu->gprs[0] = source;
494 cpu->gprs[1] = dest;
495 cpu->gprs[3] = 0;
496}
497
498DECL_BITFIELD(HuffmanNode, uint8_t);
499DECL_BITS(HuffmanNode, Offset, 0, 6);
500DECL_BIT(HuffmanNode, RTerm, 6);
501DECL_BIT(HuffmanNode, LTerm, 7);
502
503static void _unHuffman(struct GBA* gba) {
504 struct ARMCore* cpu = gba->cpu;
505 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
506 uint32_t dest = cpu->gprs[1];
507 uint32_t header = cpu->memory.load32(cpu, source, 0);
508 int remaining = header >> 8;
509 int bits = header & 0xF;
510 if (bits == 0) {
511 mLOG(GBA_BIOS, GAME_ERROR, "Invalid Huffman bits");
512 bits = 8;
513 }
514 if (32 % bits || bits == 1) {
515 mLOG(GBA_BIOS, STUB, "Unimplemented unaligned Huffman");
516 return;
517 }
518 // We assume the signature byte (0x20) is correct
519 int treesize = (cpu->memory.load8(cpu, source + 4, 0) << 1) + 1;
520 int block = 0;
521 uint32_t treeBase = source + 5;
522 source += 5 + treesize;
523 uint32_t nPointer = treeBase;
524 HuffmanNode node;
525 int bitsRemaining;
526 int readBits;
527 int bitsSeen = 0;
528 node = cpu->memory.load8(cpu, nPointer, 0);
529 while (remaining > 0) {
530 uint32_t bitstream = cpu->memory.load32(cpu, source, 0);
531 source += 4;
532 for (bitsRemaining = 32; bitsRemaining > 0 && remaining > 0; --bitsRemaining, bitstream <<= 1) {
533 uint32_t next = (nPointer & ~1) + HuffmanNodeGetOffset(node) * 2 + 2;
534 if (bitstream & 0x80000000) {
535 // Go right
536 if (HuffmanNodeIsRTerm(node)) {
537 readBits = cpu->memory.load8(cpu, next + 1, 0);
538 } else {
539 nPointer = next + 1;
540 node = cpu->memory.load8(cpu, nPointer, 0);
541 continue;
542 }
543 } else {
544 // Go left
545 if (HuffmanNodeIsLTerm(node)) {
546 readBits = cpu->memory.load8(cpu, next, 0);
547 } else {
548 nPointer = next;
549 node = cpu->memory.load8(cpu, nPointer, 0);
550 continue;
551 }
552 }
553
554 block |= (readBits & ((1 << bits) - 1)) << bitsSeen;
555 bitsSeen += bits;
556 nPointer = treeBase;
557 node = cpu->memory.load8(cpu, nPointer, 0);
558 if (bitsSeen == 32) {
559 bitsSeen = 0;
560 cpu->memory.store32(cpu, dest, block, 0);
561 dest += 4;
562 remaining -= 4;
563 block = 0;
564 }
565 }
566 }
567 cpu->gprs[0] = source;
568 cpu->gprs[1] = dest;
569}
570
571static void _unRl(struct GBA* gba, int width) {
572 struct ARMCore* cpu = gba->cpu;
573 uint32_t source = cpu->gprs[0];
574 int remaining = (cpu->memory.load32(cpu, source & 0xFFFFFFFC, 0) & 0xFFFFFF00) >> 8;
575 int padding = (4 - remaining) & 0x3;
576 // We assume the signature byte (0x30) is correct
577 int blockheader;
578 int block;
579 source += 4;
580 uint32_t dest = cpu->gprs[1];
581 int halfword = 0;
582 while (remaining > 0) {
583 blockheader = cpu->memory.load8(cpu, source, 0);
584 ++source;
585 if (blockheader & 0x80) {
586 // Compressed
587 blockheader &= 0x7F;
588 blockheader += 3;
589 block = cpu->memory.load8(cpu, source, 0);
590 ++source;
591 while (blockheader-- && remaining) {
592 --remaining;
593 if (width == 2) {
594 if (dest & 1) {
595 halfword |= block << 8;
596 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
597 } else {
598 halfword = block;
599 }
600 } else {
601 cpu->memory.store8(cpu, dest, block, 0);
602 }
603 ++dest;
604 }
605 } else {
606 // Uncompressed
607 blockheader++;
608 while (blockheader-- && remaining) {
609 --remaining;
610 int byte = cpu->memory.load8(cpu, source, 0);
611 ++source;
612 if (width == 2) {
613 if (dest & 1) {
614 halfword |= byte << 8;
615 cpu->memory.store16(cpu, dest ^ 1, halfword, 0);
616 } else {
617 halfword = byte;
618 }
619 } else {
620 cpu->memory.store8(cpu, dest, byte, 0);
621 }
622 ++dest;
623 }
624 }
625 }
626 if (width == 2) {
627 if (dest & 1) {
628 --padding;
629 ++dest;
630 }
631 for (; padding > 0; padding -= 2, dest += 2) {
632 cpu->memory.store16(cpu, dest, 0, 0);
633 }
634 } else {
635 while (padding--) {
636 cpu->memory.store8(cpu, dest, 0, 0);
637 ++dest;
638 }
639 }
640 cpu->gprs[0] = source;
641 cpu->gprs[1] = dest;
642}
643
644static void _unFilter(struct GBA* gba, int inwidth, int outwidth) {
645 struct ARMCore* cpu = gba->cpu;
646 uint32_t source = cpu->gprs[0] & 0xFFFFFFFC;
647 uint32_t dest = cpu->gprs[1];
648 uint32_t header = cpu->memory.load32(cpu, source, 0);
649 int remaining = header >> 8;
650 // We assume the signature nybble (0x8) is correct
651 uint16_t halfword = 0;
652 uint16_t old = 0;
653 source += 4;
654 while (remaining > 0) {
655 uint16_t new;
656 if (inwidth == 1) {
657 new = cpu->memory.load8(cpu, source, 0);
658 } else {
659 new = cpu->memory.load16(cpu, source, 0);
660 }
661 new += old;
662 if (outwidth > inwidth) {
663 halfword >>= 8;
664 halfword |= (new << 8);
665 if (source & 1) {
666 cpu->memory.store16(cpu, dest, halfword, 0);
667 dest += outwidth;
668 remaining -= outwidth;
669 }
670 } else if (outwidth == 1) {
671 cpu->memory.store8(cpu, dest, new, 0);
672 dest += outwidth;
673 remaining -= outwidth;
674 } else {
675 cpu->memory.store16(cpu, dest, new, 0);
676 dest += outwidth;
677 remaining -= outwidth;
678 }
679 old = new;
680 source += inwidth;
681 }
682 cpu->gprs[0] = source;
683 cpu->gprs[1] = dest;
684}