1#define nop andeq r0, r0
  2
  3.text
  4
  5b resetBase
  6b undefBase
  7b swiBase
  8b pabtBase
  9b dabtBase
 10nop
 11b irqBase
 12b fiqBase
 13
 14resetBase:
 15mov pc, #0x8000000
 16
 17swiBase:
 18cmp    sp, #0
 19moveq  sp, #0x04000000
 20subeq  sp, #0x20
 21stmfd  sp!, {r4-r5, lr}
 22ldrb   r4, [lr, #-2]
 23mov    r5, #swiTable
 24ldr    r4, [r5, r4, lsl #2]
 25cmp    r4, #0
 26mov    lr, pc
 27bxne   r4
 28ldmfd  sp!, {r4-r5, lr}
 29movs   pc, lr
 30
 31swiTable:
 32.word SoftReset
 33.word RegisterRamReset
 34.word Halt
 35.word Stop
 36.word IntrWait
 37.word VBlankIntrWait
 38.word Div
 39.word DivArm
 40.word Sqrt
 41.word ArcTan
 42.word ArcTan2
 43.word CpuSet
 44.word CpuFastSet
 45# ... The rest of this table isn't needed if the rest aren't implemented
 46
 47irqBase:
 48stmfd  sp!, {r0-r3, r12, lr}
 49mov    r0, #0x04000000
 50add    lr, pc, #0
 51ldr    pc, [r0, #-4]
 52ldmfd  sp!, {r0-r3, r12, lr}
 53subs   pc, lr, #4
 54
 55VBlankIntrWait:
 56mov    r0, #1
 57mov    r1, #1
 58IntrWait:
 59stmfd  sp!, {r2-r3, lr}
 60mrs    r5, spsr
 61msr    cpsr, #0x1F
 62# Pull current interrupts enabled and add the ones we need
 63mov    r4, #0x04000000
 64# See if we want to return immediately
 65cmp    r0, #0
 66mov    r0, #0
 67mov    r2, #1
 68beq    1f
 69# Halt
 700:
 71strb   r0, [r4, #0x301]
 721:
 73# Check which interrupts were acknowledged
 74strb   r0, [r4, #0x208]
 75ldrh   r3, [r4, #-8]
 76ands   r3, r1
 77eorne  r3, r1
 78strneh r3, [r4, #-8]
 79strb   r2, [r4, #0x208]
 80beq    0b
 81msr    cpsr, #0x93
 82msr    spsr, r5
 83ldmfd  sp!, {r2-r3, pc}
 84
 85CpuSet:
 86stmfd  sp!, {lr}
 87mrs    r5, spsr
 88msr    cpsr, #0x1F
 89mov    r3, r2, lsl #12
 90tst    r2, #0x01000000
 91beq    0f
 92# Fill
 93tst    r2, #0x04000000
 94beq    1f
 95# Word
 96add    r3, r1, r3, lsr #10
 97ldmia  r0!, {r2}
 982:
 99cmp    r1, r3
100stmltia  r1!, {r2}
101blt    2b
102b      3f
103# Halfword
1041:
105bic    r0, #1
106bic    r1, #1
107add    r3, r1, r3, lsr #11
108ldrh   r2, [r0]
1092:
110cmp    r1, r3
111strlth r2, [r1], #2
112blt    2b
113b      3f
114# Copy
1150:
116tst    r2, #0x04000000
117beq    1f
118# Word
119add    r3, r1, r3, lsr #10
1202:
121cmp    r1, r3
122ldmltia r0!, {r2}
123stmltia r1!, {r2}
124blt    2b
125b      3f
126# Halfword
1271:
128add    r3, r1, r3, lsr #11
129bic    r0, #1
130bic    r1, #1
1312:
132cmp    r1, r3
133ldrlth r2, [r0], #2
134strlth r2, [r1], #2
135blt    2b
1363:
137msr    cpsr, #0x93
138msr    spsr, r5
139ldmfd  sp!, {pc}
140
141CpuFastSet:
142stmfd  sp!, {lr}
143mrs    r5, spsr
144msr    cpsr, #0x1F
145stmfd  sp!, {r4-r10}
146tst    r2, #0x01000000
147mov    r3, r2, lsl #12
148add    r2, r1, r3, lsr #10
149beq    0f
150# Fill
151ldr    r3, [r0]
152mov    r4, r3
153mov    r5, r3
154mov    r6, r3
155mov    r7, r3
156mov    r8, r3
157mov    r9, r3
158mov    r10, r3
1591:
160cmp    r1, r2
161stmltia r1!, {r3-r10}
162blt    1b
163b      2f
164# Copy
1650:
166cmp    r1, r2
167ldmltia r0!, {r3-r10}
168stmltia r1!, {r3-r10}
169blt    0b
1702:
171ldmfd  sp!, {r4-r10}
172msr    cpsr, #0x93
173msr    spsr, r5
174ldmfd  sp!, {pc}