1#include "gba-serialize.h"
  2
  3/* Savestate format:
  4 * 0x00000 - 0x00003: Version Magic (0x01000000)
  5 * 0x00004 - 0x00007: BIOS checksum (e.g. 0xBAAE187F for official BIOS)
  6 * 0x00008 - 0x0000F: Reserved (leave zero)
  7 * 0x00010 - 0x0001B: Game title (e.g. METROID4USA)
  8 * 0x0001C - 0x0001F: Game code (e.g. AMTE)
  9 * 0x00020 - 0x0012F: CPU state:
 10 * | 0x00020 - 0x0005F: GPRs
 11 * | 0x00060 - 0x00063: CPSR
 12 * | 0x00064 - 0x00067: SPSR
 13 * | 0x00068 - 0x0006B: Cycles since last event
 14 * | 0x0006C - 0x0006F: Cycles until next event
 15 * | 0x00070 - 0x00117: Banked registers
 16 * | 0x00118 - 0x0012F: Banked SPSRs
 17 * 0x00130 - 0x00147: Audio channel 1 state
 18 * | 0x00130 - 0x00130: Current volume
 19 * | 0x00131 - 0x00131: Is channel dead?
 20 * | 0x00132 - 0x00132: Is channel high?
 21 * | 0x00133 - 0x00133: Reserved
 22 * | 0x00134 - 0x00137: Next envelope step
 23 * | 0x00137 - 0x0013B: Next square wave step
 24 * | 0x0013C - 0x0013G: Next sweep step
 25 * | 0x00140 - 0x00143: Channel end cycle
 26 * | 0x00144 - 0x00147: Next event
 27 * 0x00148 - 0x0015F: Audio channel 2/4 state
 28 * | 0x00148 - 0x00148: Current volume
 29 * | 0x00149 - 0x00149: Is channel dead?
 30 * | 0x0014A - 0x0014A: Is channel high?
 31 * | 0x0014B - 0x0014B: Reserved
 32 * | 0x0014C - 0x0014F: Next envelope step
 33 * | 0x00150 - 0x00153: Next square wave step
 34 * | 0x00154 - 0x00157: Audio channel 4 LFSR
 35 * | 0x00158 - 0x0015B: Channel end cycle
 36 * | 0x0015C - 0x0015F: Next Event
 37 * 0x00160 - 0x0017F: Audio channel 3 wave banks
 38 * 0x00180 - 0x0019F: Audio FIFO 1
 39 * 0x001A0 - 0x001BF: Audio FIFO 2
 40 * 0x001C0 - 0x001DF: Audio miscellaneous state
 41 * | 0x001C0 - 0x001C3: Next event
 42 * | 0x001C4 - 0x001C7: Event diff
 43 * | 0x001C8 - 0x001CB: Next channel 3 event
 44 * | 0x001CC - 0x001CF: Next channel 4 event
 45 * | 0x001D0 - 0x001D3: Next sample
 46 * | 0x001D4 - 0x001D7: FIFO size
 47 * | 0x001D8 - 0x001DF: Reserved
 48 * 0x001E0 - 0x001FF: Video miscellaneous state
 49 * | 0x001E0 - 0x001E3: Next event
 50 * | 0x001E4 - 0x001E7: Event diff
 51 * | 0x001E8 - 0x001EB: Last hblank
 52 * | 0x001EC - 0x001EF: Next hblank
 53 * | 0x001F0 - 0x001F3: Next hblank IRQ
 54 * | 0x001F4 - 0x001F7: Next vblank IRQ
 55 * | 0x001F8 - 0x001FB: Next vcounter IRQ
 56 * | 0x001FC - 0x001FF: Reserved
 57 * 0x00200 - 0x003FF: Reserved (leave zero)
 58 * 0x00400 - 0x007FF: I/O memory
 59 * 0x00800 - 0x00BFF: Palette
 60 * 0x00C00 - 0x00FFF: OAM
 61 * 0x01000 - 0x18FFF: VRAM
 62 * 0x19000 - 0x20FFF: IWRAM
 63 * 0x21000 - 0x60FFF: WRAM
 64 * Total size: 0x61000 (397,312) bytes
 65 */
 66
 67struct GBASerializedState {
 68	uint32_t versionMagic;
 69	uint32_t biosChecksum;
 70	uint32_t reservedHeader[2];
 71
 72	char title[12];
 73	uint32_t id;
 74
 75	struct {
 76		int32_t gprs[16];
 77		union PSR cpsr;
 78		union PSR spsr;
 79
 80		int32_t cycles;
 81		int32_t nextEvent;
 82
 83		int32_t bankedRegisters[6][7];
 84		int32_t bankedSPSRs[6];
 85	} cpu;
 86
 87	struct {
 88		struct {
 89	 		int8_t volume;
 90	 		int8_t dead;
 91	 		int8_t hi;
 92	 		int8_t : 8;
 93	 		int32_t envelopeNextStep;
 94	 		int32_t waveNextStep;
 95	 		int32_t sweepNextStep;
 96	 		int32_t endTime;
 97	 		int32_t nextEvent;
 98	 	} ch1;
 99		struct {
100	 		int8_t volume;
101	 		int8_t dead;
102	 		int8_t hi;
103	 		int8_t : 8;
104	 		int32_t envelopeNextStep;
105	 		int32_t waveNextStep;
106	 		int32_t ch4Lfsr;
107	 		int32_t endTime;
108	 		int32_t nextEvent;
109	 	} ch2;
110	 	uint32_t ch3[8];
111	 	uint32_t fifoA[8];
112	 	uint32_t fifoB[8];
113	 	int32_t nextEvent;
114		int32_t eventDiff;
115	 	int32_t nextCh3;
116	 	int32_t nextCh4;
117	 	int32_t nextSample;
118	 	int32_t fifoSize;
119	 	int32_t : 32;
120	 	int32_t : 32;
121	} audio;
122
123	struct {
124		int32_t nextEvent;
125		int32_t eventDiff;
126		int32_t lastHblank;
127		int32_t nextHblank;
128		int32_t nextHblankIRQ;
129		int32_t nextVblankIRQ;
130		int32_t nextVcounterIRQ;
131		int32_t : 32;
132	} video;
133
134	uint32_t reservedGpio[128];
135
136	uint16_t io[SIZE_IO >> 1];
137	uint16_t pram[SIZE_PALETTE_RAM >> 1];
138	uint16_t oam[SIZE_PALETTE_RAM >> 1];
139	uint16_t vram[SIZE_PALETTE_RAM >> 1];
140	uint8_t iwram[SIZE_WORKING_IRAM];
141	uint8_t wram[SIZE_WORKING_RAM];
142};