all repos — mgba @ f2fd53af075d8bab83d479f5db61b5912d60b75b

mGBA Game Boy Advance Emulator

src/ds/video.c (view raw)

  1/* Copyright (c) 2013-2015 Jeffrey Pfau
  2 *
  3 * This Source Code Form is subject to the terms of the Mozilla Public
  4 * License, v. 2.0. If a copy of the MPL was not distributed with this
  5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  6#include <mgba/internal/ds/video.h>
  7
  8#include <mgba/core/sync.h>
  9#include <mgba/internal/ds/ds.h>
 10#include <mgba/internal/ds/memory.h>
 11#include <mgba/internal/gba/video.h>
 12
 13#include <mgba-util/memory.h>
 14
 15mLOG_DEFINE_CATEGORY(DS_VIDEO, "DS Video");
 16
 17static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer);
 18static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer);
 19static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer);
 20static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 21static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value);
 22static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam);
 23static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot);
 24static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y);
 25static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer);
 26static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels);
 27static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels);
 28
 29static void _startHblank7(struct mTiming*, void* context, uint32_t cyclesLate);
 30static void _startHdraw7(struct mTiming*, void* context, uint32_t cyclesLate);
 31static void _startHblank9(struct mTiming*, void* context, uint32_t cyclesLate);
 32static void _startHdraw9(struct mTiming*, void* context, uint32_t cyclesLate);
 33
 34static const uint32_t _vramSize[9] = {
 35	0x20000,
 36	0x20000,
 37	0x20000,
 38	0x20000,
 39	0x10000,
 40	0x04000,
 41	0x04000,
 42	0x08000,
 43	0x04000
 44};
 45
 46enum DSVRAMBankMode {
 47	MODE_A_BG = 0,
 48	MODE_B_BG = 1,
 49	MODE_A_OBJ = 2,
 50	MODE_B_OBJ = 3,
 51	MODE_LCDC,
 52	MODE_7_VRAM,
 53	MODE_A_BG_EXT_PAL,
 54	MODE_B_BG_EXT_PAL,
 55	MODE_A_OBJ_EXT_PAL,
 56	MODE_B_OBJ_EXT_PAL,
 57	MODE_3D_TEX,
 58	MODE_3D_TEX_PAL,
 59};
 60
 61const struct DSVRAMBankInfo {
 62	int base;
 63	uint32_t mirrorSize;
 64	enum DSVRAMBankMode mode;
 65	int offset[4];
 66} _vramInfo[9][8] = {
 67	{ // A
 68		{ 0x000, 0x40, MODE_LCDC },
 69		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 70		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 71		{ 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 72	},
 73	{ // B
 74		{ 0x008, 0x40, MODE_LCDC },
 75		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 76		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x08, 0x80, 0x80 } },
 77		{ 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 78	},
 79	{ // C
 80		{ 0x010, 0x40, MODE_LCDC },
 81		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 82		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 83		{ 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 84		{ 0x000, 0x08, MODE_B_BG },
 85	},
 86	{ // D
 87		{ 0x018, 0x40, MODE_LCDC },
 88		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x08, 0x10, 0x18 } },
 89		{ 0x000, 0x40, MODE_7_VRAM, { 0x00, 0x08, 0x80, 0x80 } },
 90		{ 0x000, 0x10, MODE_3D_TEX, { 0x00, 0x01, 0x02, 0x03 } },
 91		{ 0x000, 0x08, MODE_B_OBJ },
 92	},
 93	{ // E
 94		{ 0x020, 0x40, MODE_LCDC },
 95		{ 0x000, 0x20, MODE_A_BG },
 96		{ 0x000, 0x10, MODE_A_OBJ },
 97		{ 0x000, 0x04, MODE_3D_TEX_PAL },
 98		{ 0x000, 0x04, MODE_A_BG_EXT_PAL },
 99	},
100	{ // F
101		{ 0x024, 0x40, MODE_LCDC },
102		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
103		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
104		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
105		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
106		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
107	},
108	{ // G
109		{ 0x025, 0x40, MODE_LCDC },
110		{ 0x000, 0x20, MODE_A_BG, { 0x00, 0x01, 0x04, 0x05 } },
111		{ 0x000, 0x10, MODE_A_OBJ, { 0x00, 0x01, 0x04, 0x05 } },
112		{ 0x000, 0x01, MODE_3D_TEX_PAL, { 0x00, 0x01, 0x04, 0x05 } },
113		{ 0x000, 0x02, MODE_A_BG_EXT_PAL, { 0x00, 0x02, 0x00, 0x02 } },
114		{ 0x000, 0x01, MODE_A_OBJ_EXT_PAL},
115	},
116	{ // H
117		{ 0x026, 0x40, MODE_LCDC },
118		{ 0x000, 0x04, MODE_B_BG },
119		{ 0x000, 0x04, MODE_B_BG_EXT_PAL },
120	},
121	{ // I
122		{ 0x028, 0x40, MODE_LCDC },
123		{ 0x002, 0x04, MODE_B_BG },
124		{ 0x000, 0x01, MODE_B_OBJ },
125		{ 0x000, 0x01, MODE_B_OBJ_EXT_PAL },
126	},
127};
128
129static struct DSVideoRenderer dummyRenderer = {
130	.init = DSVideoDummyRendererInit,
131	.reset = DSVideoDummyRendererReset,
132	.deinit = DSVideoDummyRendererDeinit,
133	.writeVideoRegister = DSVideoDummyRendererWriteVideoRegister,
134	.writePalette = DSVideoDummyRendererWritePalette,
135	.writeOAM = DSVideoDummyRendererWriteOAM,
136	.invalidateExtPal = DSVideoDummyRendererInvalidateExtPal,
137	.drawScanline = DSVideoDummyRendererDrawScanline,
138	.finishFrame = DSVideoDummyRendererFinishFrame,
139	.getPixels = DSVideoDummyRendererGetPixels,
140	.putPixels = DSVideoDummyRendererPutPixels,
141};
142
143void DSVideoInit(struct DSVideo* video) {
144	video->renderer = &dummyRenderer;
145	video->vram = NULL;
146	video->frameskip = 0;
147	video->event7.name = "DS7 Video";
148	video->event7.callback = NULL;
149	video->event7.context = video;
150	video->event7.priority = 8;
151	video->event9.name = "DS9 Video";
152	video->event9.callback = NULL;
153	video->event9.context = video;
154	video->event9.priority = 8;
155}
156
157void DSVideoReset(struct DSVideo* video) {
158	video->vcount = 0;
159	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
160	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
161
162	video->event7.callback = _startHblank7;
163	video->event9.callback = _startHblank9;
164	mTimingSchedule(&video->p->ds7.timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH);
165	mTimingSchedule(&video->p->ds9.timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2);
166
167	video->frameCounter = 0;
168	video->frameskipCounter = 0;
169
170	if (video->vram) {
171		mappedMemoryFree(video->vram, DS_SIZE_VRAM);
172	}
173	video->vram = anonymousMemoryMap(DS_SIZE_VRAM);
174	video->renderer->vram = video->vram;
175
176	video->p->memory.vramBank[0] = &video->vram[0x00000];
177	video->p->memory.vramBank[1] = &video->vram[0x10000];
178	video->p->memory.vramBank[2] = &video->vram[0x20000];
179	video->p->memory.vramBank[3] = &video->vram[0x30000];
180	video->p->memory.vramBank[4] = &video->vram[0x40000];
181	video->p->memory.vramBank[5] = &video->vram[0x48000];
182	video->p->memory.vramBank[6] = &video->vram[0x4A000];
183	video->p->memory.vramBank[7] = &video->vram[0x4C000];
184	video->p->memory.vramBank[8] = &video->vram[0x50000];
185
186	video->renderer->deinit(video->renderer);
187	video->renderer->init(video->renderer);
188}
189
190void DSVideoAssociateRenderer(struct DSVideo* video, struct DSVideoRenderer* renderer) {
191	video->renderer->deinit(video->renderer);
192	video->renderer = renderer;
193	renderer->palette = video->palette;
194	renderer->vram = video->vram;
195	memcpy(renderer->vramABG, video->vramABG, sizeof(renderer->vramABG));
196	memcpy(renderer->vramAOBJ, video->vramAOBJ, sizeof(renderer->vramAOBJ));
197	memcpy(renderer->vramABGExtPal, video->vramABGExtPal, sizeof(renderer->vramABGExtPal));
198	renderer->vramAOBJExtPal = video->vramAOBJExtPal;
199	memcpy(renderer->vramBBG, video->vramBBG, sizeof(renderer->vramBBG));
200	memcpy(renderer->vramBOBJ, video->vramBOBJ, sizeof(renderer->vramBOBJ));
201	memcpy(renderer->vramBBGExtPal, video->vramBBGExtPal, sizeof(renderer->vramBBGExtPal));
202	renderer->vramBOBJExtPal = video->vramBOBJExtPal;
203	renderer->oam = &video->oam;
204	video->renderer->init(video->renderer);
205}
206
207void DSVideoDeinit(struct DSVideo* video) {
208	DSVideoAssociateRenderer(video, &dummyRenderer);
209	mappedMemoryFree(video->vram, DS_SIZE_VRAM);
210}
211
212void _startHdraw7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
213	struct DSVideo* video = context;
214	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
215	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
216	video->event7.callback = _startHblank7;
217	mTimingSchedule(timing, &video->event7, DS_VIDEO_HORIZONTAL_LENGTH - DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
218
219	video->p->ds7.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
220
221	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
222		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
223		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
224			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VCOUNTER);
225		}
226	} else {
227		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
228	}
229	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
230
231	switch (video->vcount) {
232	case DS_VIDEO_VERTICAL_PIXELS:
233		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
234		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
235			DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_VBLANK);
236		}
237		break;
238	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
239		video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
240		break;
241	}
242}
243
244void _startHblank7(struct mTiming* timing, void* context, uint32_t cyclesLate) {
245	struct DSVideo* video = context;
246	GBARegisterDISPSTAT dispstat = video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1];
247	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
248	video->event7.callback = _startHdraw7;
249	mTimingSchedule(timing, &video->event7, DS7_VIDEO_HBLANK_LENGTH - cyclesLate);
250
251	// Begin Hblank
252	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
253
254	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
255		DSRaiseIRQ(video->p->ds7.cpu, video->p->ds7.memory.io, DS_IRQ_HBLANK);
256	}
257	video->p->ds7.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
258}
259
260void _startHdraw9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
261	struct DSVideo* video = context;
262	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
263	dispstat = GBARegisterDISPSTATClearInHblank(dispstat);
264	video->event9.callback = _startHblank9;
265	mTimingSchedule(timing, &video->event9, (DS_VIDEO_HORIZONTAL_LENGTH - DS9_VIDEO_HBLANK_LENGTH) * 2 - cyclesLate);
266
267	++video->vcount;
268	if (video->vcount == DS_VIDEO_VERTICAL_TOTAL_PIXELS) {
269		video->vcount = 0;
270	}
271	video->p->ds9.memory.io[DS_REG_VCOUNT >> 1] = video->vcount;
272
273	if (video->vcount == GBARegisterDISPSTATGetVcountSetting(dispstat)) {
274		dispstat = GBARegisterDISPSTATFillVcounter(dispstat);
275		if (GBARegisterDISPSTATIsVcounterIRQ(dispstat)) {
276			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VCOUNTER);
277		}
278	} else {
279		dispstat = GBARegisterDISPSTATClearVcounter(dispstat);
280	}
281	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
282
283	// Note: state may be recorded during callbacks, so ensure it is consistent!
284	switch (video->vcount) {
285	case 0:
286		DSFrameStarted(video->p);
287		break;
288	case DS_VIDEO_VERTICAL_PIXELS:
289		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATFillInVblank(dispstat);
290		if (video->frameskipCounter <= 0) {
291			video->renderer->finishFrame(video->renderer);
292			if (video->p->gx.swapBuffers) {
293				DSGXSwapBuffers(&video->p->gx);
294			}
295		}
296		if (GBARegisterDISPSTATIsVblankIRQ(dispstat)) {
297			DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_VBLANK);
298		}
299		DSFrameEnded(video->p);
300		--video->frameskipCounter;
301		if (video->frameskipCounter < 0) {
302			mCoreSyncPostFrame(video->p->sync);
303			video->frameskipCounter = video->frameskip;
304		}
305		++video->frameCounter;
306		break;
307	case DS_VIDEO_VERTICAL_TOTAL_PIXELS - 1:
308		video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = GBARegisterDISPSTATClearInVblank(dispstat);
309		break;
310	}
311}
312
313void _startHblank9(struct mTiming* timing, void* context, uint32_t cyclesLate) {
314	struct DSVideo* video = context;
315	GBARegisterDISPSTAT dispstat = video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1];
316	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
317	video->event9.callback = _startHdraw9;
318	mTimingSchedule(timing, &video->event9, (DS9_VIDEO_HBLANK_LENGTH * 2) - cyclesLate);
319
320	// Begin Hblank
321	dispstat = GBARegisterDISPSTATFillInHblank(dispstat);
322	if (video->frameskipCounter <= 0) {
323		if (video->vcount < DS_VIDEO_VERTICAL_PIXELS) {
324			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48);
325			video->renderer->drawScanline(video->renderer, video->vcount);
326		}
327		if (video->vcount >= DS_VIDEO_VERTICAL_TOTAL_PIXELS - 48) {
328			video->p->gx.renderer->drawScanline(video->p->gx.renderer, video->vcount + 48 - DS_VIDEO_VERTICAL_TOTAL_PIXELS);
329		}
330	}
331
332	if (GBARegisterDISPSTATIsHblankIRQ(dispstat)) {
333		DSRaiseIRQ(video->p->ds9.cpu, video->p->ds9.memory.io, DS_IRQ_HBLANK);
334	}
335	video->p->ds9.memory.io[DS_REG_DISPSTAT >> 1] = dispstat;
336}
337
338void DSVideoWriteDISPSTAT(struct DSCommon* dscore, uint16_t value) {
339	dscore->memory.io[DS_REG_DISPSTAT >> 1] &= 0x7;
340	dscore->memory.io[DS_REG_DISPSTAT >> 1] |= value;
341	// TODO: Does a VCounter IRQ trigger on write?
342}
343
344void DSVideoConfigureVRAM(struct DS* ds, int index, uint8_t value, uint8_t oldValue) {
345	struct DSMemory* memory = &ds->memory;
346	if (value == oldValue) {
347		return;
348	}
349	uint32_t i, j;
350	uint32_t size = _vramSize[index] >> DS_VRAM_OFFSET;
351	struct DSVRAMBankInfo oldInfo = _vramInfo[index][oldValue & 0x7];
352	uint32_t offset = oldInfo.base + oldInfo.offset[(oldValue >> 3) & 3];
353	switch (oldInfo.mode) {
354	case MODE_A_BG:
355		for (i = 0; i < size; ++i) {
356			if (ds->video.vramABG[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
357				ds->video.vramABG[offset + i] = NULL;
358				ds->video.renderer->vramABG[offset + i] = NULL;
359			}
360		}
361		break;
362	case MODE_B_BG:
363		for (i = 0; i < size; ++i) {
364			if (ds->video.vramBBG[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
365				ds->video.vramBBG[offset + i] = NULL;
366				ds->video.renderer->vramBBG[offset + i] = NULL;
367			}
368		}
369		break;
370	case MODE_A_OBJ:
371		for (i = 0; i < size; ++i) {
372			if (ds->video.vramAOBJ[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
373				ds->video.vramAOBJ[offset + i] = NULL;
374				ds->video.renderer->vramAOBJ[offset + i] = NULL;
375			}
376		}
377		break;
378	case MODE_B_OBJ:
379		for (i = 0; i < size; ++i) {
380			if (ds->video.vramBOBJ[offset + i] == &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)]) {
381				ds->video.vramBOBJ[offset + i] = NULL;
382				ds->video.renderer->vramBOBJ[offset + i] = NULL;
383			}
384		}
385		break;
386	case MODE_A_BG_EXT_PAL:
387		for (i = 0; i < oldInfo.mirrorSize; ++i) {
388			if (ds->video.vramABGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
389				ds->video.vramABGExtPal[offset + i] = NULL;
390				ds->video.renderer->vramABGExtPal[offset + i] = NULL;
391				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
392			}
393		}
394		break;
395	case MODE_B_BG_EXT_PAL:
396		for (i = 0; i < oldInfo.mirrorSize; ++i) {
397			if (ds->video.vramBBGExtPal[offset + i] == &memory->vramBank[index][i << 12]) {
398				ds->video.vramBBGExtPal[offset + i] = NULL;
399				ds->video.renderer->vramBBGExtPal[offset + i] = NULL;
400				ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
401			}
402		}
403		break;
404	case MODE_A_OBJ_EXT_PAL:
405		if (ds->video.vramAOBJExtPal == memory->vramBank[index]) {
406			ds->video.vramAOBJExtPal = NULL;
407			ds->video.renderer->vramAOBJExtPal = NULL;
408			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
409		}
410		break;
411	case MODE_B_OBJ_EXT_PAL:
412		if (ds->video.vramBOBJExtPal == memory->vramBank[index]) {
413			ds->video.vramBOBJExtPal = NULL;
414			ds->video.renderer->vramBOBJExtPal = NULL;
415			ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
416		}
417		break;
418	case MODE_7_VRAM:
419		for (i = 0; i < size; i += 16) {
420			ds->memory.vram7[(offset + i) >> 4] = NULL;
421		}
422		break;
423	case MODE_LCDC:
424		break;
425	}
426
427	struct DSVRAMBankInfo info = _vramInfo[index][value & 0x7];
428	memset(&memory->vramMirror[index], 0, sizeof(memory->vramMirror[index]));
429	memset(&memory->vramMode[index], 0, sizeof(memory->vramMode[index]));
430	if (!(value & 0x80) || !info.mirrorSize) {
431		return;
432	}
433	offset = info.base + info.offset[(value >> 3) & 3];
434	if (info.mode <= MODE_LCDC) {
435		memory->vramMode[index][info.mode] = 0xFFFF;
436		for (j = offset; j < 0x40; j += info.mirrorSize) {
437			for (i = 0; i < size; ++i) {
438				memory->vramMirror[index][i + j] = 1 << index;
439			}
440		}
441	}
442	switch (info.mode) {
443	case MODE_A_BG:
444		for (i = 0; i < size; ++i) {
445			ds->video.vramABG[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
446			ds->video.renderer->vramABG[offset + i] = ds->video.vramABG[offset + i];
447		}
448		break;
449	case MODE_B_BG:
450		for (i = 0; i < size; ++i) {
451			ds->video.vramBBG[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
452			ds->video.renderer->vramBBG[offset + i] = ds->video.vramBBG[offset + i];
453		}
454		break;
455	case MODE_A_OBJ:
456		for (i = 0; i < size; ++i) {
457			ds->video.vramAOBJ[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
458			ds->video.renderer->vramAOBJ[offset + i] = ds->video.vramAOBJ[offset + i];
459		}
460		break;
461	case MODE_B_OBJ:
462		for (i = 0; i < size; ++i) {
463			ds->video.vramBOBJ[offset + i] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 1)];
464			ds->video.renderer->vramBOBJ[offset + i] = ds->video.vramBOBJ[offset + i];
465		}
466		break;
467	case MODE_A_BG_EXT_PAL:
468		for (i = 0; i < info.mirrorSize; ++i) {
469			ds->video.vramABGExtPal[offset + i] = &memory->vramBank[index][i << 12];
470			ds->video.renderer->vramABGExtPal[offset + i] = ds->video.vramABGExtPal[offset + i];
471			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, false, offset + i);
472		}
473		break;
474	case MODE_B_BG_EXT_PAL:
475		for (i = 0; i < info.mirrorSize; ++i) {
476			ds->video.vramBBGExtPal[offset + i] = &memory->vramBank[index][i << 12];
477			ds->video.renderer->vramBBGExtPal[offset + i] = ds->video.vramBBGExtPal[offset + i];
478			ds->video.renderer->invalidateExtPal(ds->video.renderer, false, true, offset + i);
479		}
480		break;
481	case MODE_A_OBJ_EXT_PAL:
482		ds->video.vramAOBJExtPal = memory->vramBank[index];
483		ds->video.renderer->vramAOBJExtPal = ds->video.vramAOBJExtPal;
484		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, false, 0);
485		break;
486	case MODE_B_OBJ_EXT_PAL:
487		ds->video.vramBOBJExtPal = memory->vramBank[index];
488		ds->video.renderer->vramBOBJExtPal = ds->video.vramBOBJExtPal;
489		ds->video.renderer->invalidateExtPal(ds->video.renderer, true, true, 0);
490		break;
491	case MODE_7_VRAM:
492		for (i = 0; i < size; i += 16) {
493			ds->memory.vram7[(offset + i) >> 4] = &memory->vramBank[index][i << (DS_VRAM_OFFSET - 5)];
494		}
495		break;
496	case MODE_LCDC:
497		break;
498	}
499}
500
501static void DSVideoDummyRendererInit(struct DSVideoRenderer* renderer) {
502	UNUSED(renderer);
503	// Nothing to do
504}
505
506static void DSVideoDummyRendererReset(struct DSVideoRenderer* renderer) {
507	UNUSED(renderer);
508	// Nothing to do
509}
510
511static void DSVideoDummyRendererDeinit(struct DSVideoRenderer* renderer) {
512	UNUSED(renderer);
513	// Nothing to do
514}
515
516static uint16_t DSVideoDummyRendererWriteVideoRegister(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
517	UNUSED(renderer);
518	return value;
519}
520
521static void DSVideoDummyRendererWritePalette(struct DSVideoRenderer* renderer, uint32_t address, uint16_t value) {
522	UNUSED(renderer);
523	UNUSED(address);
524	UNUSED(value);
525	// Nothing to do
526}
527
528static void DSVideoDummyRendererWriteOAM(struct DSVideoRenderer* renderer, uint32_t oam) {
529	UNUSED(renderer);
530	UNUSED(oam);
531	// Nothing to do
532}
533
534static void DSVideoDummyRendererInvalidateExtPal(struct DSVideoRenderer* renderer, bool obj, bool engB, int slot) {
535	UNUSED(renderer);
536	UNUSED(obj);
537	UNUSED(engB);
538	// Nothing to do
539}
540
541static void DSVideoDummyRendererDrawScanline(struct DSVideoRenderer* renderer, int y) {
542	UNUSED(renderer);
543	UNUSED(y);
544	// Nothing to do
545}
546
547static void DSVideoDummyRendererFinishFrame(struct DSVideoRenderer* renderer) {
548	UNUSED(renderer);
549	// Nothing to do
550}
551
552static void DSVideoDummyRendererGetPixels(struct DSVideoRenderer* renderer, size_t* stride, const void** pixels) {
553	UNUSED(renderer);
554	UNUSED(stride);
555	UNUSED(pixels);
556	// Nothing to do
557}
558
559static void DSVideoDummyRendererPutPixels(struct DSVideoRenderer* renderer, size_t stride, const void* pixels) {
560	UNUSED(renderer);
561	UNUSED(stride);
562	UNUSED(pixels);
563	// Nothing to do
564}