src/arm/decoder.c (view raw)
1/* Copyright (c) 2013-2014 Jeffrey Pfau
2 *
3 * This Source Code Form is subject to the terms of the Mozilla Public
4 * License, v. 2.0. If a copy of the MPL was not distributed with this
5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6#include "decoder.h"
7
8#include "decoder-inlines.h"
9
10#define ADVANCE(AMOUNT) \
11 if (AMOUNT > blen) { \
12 buffer[blen - 1] = '\0'; \
13 return total; \
14 } \
15 total += AMOUNT; \
16 buffer += AMOUNT; \
17 blen -= AMOUNT;
18
19static int _decodeRegister(int reg, char* buffer, int blen);
20static int _decodeRegisterList(int list, char* buffer, int blen);
21static int _decodePSR(int bits, char* buffer, int blen);
22static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen);
23static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen);
24static int _decodeShift(union ARMOperand operand, bool reg, char* buffer, int blen);
25
26static const char* _armConditions[] = {
27 "eq",
28 "ne",
29 "cs",
30 "cc",
31 "mi",
32 "pl",
33 "vs",
34 "vc",
35 "hi",
36 "ls",
37 "ge",
38 "lt",
39 "gt",
40 "le",
41 "al",
42 "nv"
43};
44
45static int _decodeRegister(int reg, char* buffer, int blen) {
46 switch (reg) {
47 case ARM_SP:
48 strncpy(buffer, "sp", blen - 1);
49 return 2;
50 case ARM_LR:
51 strncpy(buffer, "lr", blen - 1);
52 return 2;
53 case ARM_PC:
54 strncpy(buffer, "pc", blen - 1);
55 return 2;
56 case ARM_CPSR:
57 strncpy(buffer, "cpsr", blen - 1);
58 return 4;
59 case ARM_SPSR:
60 strncpy(buffer, "spsr", blen - 1);
61 return 4;
62 default:
63 return snprintf(buffer, blen - 1, "r%i", reg);
64 }
65}
66
67static int _decodeRegisterList(int list, char* buffer, int blen) {
68 if (blen <= 0) {
69 return 0;
70 }
71 int total = 0;
72 strncpy(buffer, "{", blen - 1);
73 ADVANCE(1);
74 int i;
75 int start = -1;
76 int end = -1;
77 int written;
78 for (i = 0; i <= ARM_PC; ++i) {
79 if (list & 1) {
80 if (start < 0) {
81 start = i;
82 end = i;
83 } else if (end + 1 == i) {
84 end = i;
85 } else {
86 if (end > start) {
87 written = _decodeRegister(start, buffer, blen);
88 ADVANCE(written);
89 strncpy(buffer, "-", blen - 1);
90 ADVANCE(1);
91 }
92 written = _decodeRegister(end, buffer, blen);
93 ADVANCE(written);
94 strncpy(buffer, ",", blen - 1);
95 ADVANCE(1);
96 start = i;
97 end = i;
98 }
99 }
100 list >>= 1;
101 }
102 if (start >= 0) {
103 if (end > start) {
104 written = _decodeRegister(start, buffer, blen);
105 ADVANCE(written);
106 strncpy(buffer, "-", blen - 1);
107 ADVANCE(1);
108 }
109 written = _decodeRegister(end, buffer, blen);
110 ADVANCE(written);
111 }
112 strncpy(buffer, "}", blen - 1);
113 ADVANCE(1);
114 return total;
115}
116
117static int _decodePSR(int psrBits, char* buffer, int blen) {
118 if (!psrBits) {
119 return 0;
120 }
121 int total = 0;
122 strncpy(buffer, "_", blen - 1);
123 ADVANCE(1);
124 if (psrBits & ARM_PSR_C) {
125 strncpy(buffer, "c", blen - 1);
126 ADVANCE(1);
127 }
128 if (psrBits & ARM_PSR_X) {
129 strncpy(buffer, "x", blen - 1);
130 ADVANCE(1);
131 }
132 if (psrBits & ARM_PSR_S) {
133 strncpy(buffer, "s", blen - 1);
134 ADVANCE(1);
135 }
136 if (psrBits & ARM_PSR_F) {
137 strncpy(buffer, "f", blen - 1);
138 ADVANCE(1);
139 }
140 return total;
141}
142
143static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen) {
144 return snprintf(buffer, blen - 1, "$%08X", address + pc);
145}
146
147static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen) {
148 if (blen <= 1) {
149 return 0;
150 }
151 int total = 0;
152 strncpy(buffer, "[", blen - 1);
153 ADVANCE(1);
154 int written;
155 if (memory.format & ARM_MEMORY_REGISTER_BASE) {
156 if (memory.baseReg == ARM_PC && memory.format & ARM_MEMORY_IMMEDIATE_OFFSET) {
157 written = _decodePCRelative(memory.format & ARM_MEMORY_OFFSET_SUBTRACT ? -memory.offset.immediate : memory.offset.immediate, pc & 0xFFFFFFFC, buffer, blen);
158 ADVANCE(written);
159 } else {
160 written = _decodeRegister(memory.baseReg, buffer, blen);
161 ADVANCE(written);
162 if (memory.format & (ARM_MEMORY_REGISTER_OFFSET | ARM_MEMORY_IMMEDIATE_OFFSET) && !(memory.format & ARM_MEMORY_POST_INCREMENT)) {
163 strncpy(buffer, ", ", blen - 1);
164 ADVANCE(2);
165 }
166 }
167 }
168 if (memory.format & ARM_MEMORY_POST_INCREMENT) {
169 strncpy(buffer, "], ", blen - 1);
170 ADVANCE(3);
171 }
172 if (memory.format & ARM_MEMORY_IMMEDIATE_OFFSET && memory.baseReg != ARM_PC) {
173 if (memory.format & ARM_MEMORY_OFFSET_SUBTRACT) {
174 written = snprintf(buffer, blen - 1, "#-%i", memory.offset.immediate);
175 ADVANCE(written);
176 } else {
177 written = snprintf(buffer, blen - 1, "#%i", memory.offset.immediate);
178 ADVANCE(written);
179 }
180 } else if (memory.format & ARM_MEMORY_REGISTER_OFFSET) {
181 if (memory.format & ARM_MEMORY_OFFSET_SUBTRACT) {
182 strncpy(buffer, "-", blen - 1);
183 ADVANCE(1);
184 }
185 written = _decodeRegister(memory.offset.reg, buffer, blen);
186 ADVANCE(written);
187 }
188 if (memory.format & ARM_MEMORY_SHIFTED_OFFSET) {
189 written = _decodeShift(memory.offset, false, buffer, blen);
190 ADVANCE(written);
191 }
192
193 if (!(memory.format & ARM_MEMORY_POST_INCREMENT)) {
194 strncpy(buffer, "]", blen - 1);
195 ADVANCE(1);
196 }
197 if ((memory.format & (ARM_MEMORY_PRE_INCREMENT | ARM_MEMORY_WRITEBACK)) == (ARM_MEMORY_PRE_INCREMENT | ARM_MEMORY_WRITEBACK)) {
198 strncpy(buffer, "!", blen - 1);
199 ADVANCE(1);
200 }
201 return total;
202}
203
204static int _decodeShift(union ARMOperand op, bool reg, char* buffer, int blen) {
205 if (blen <= 1) {
206 return 0;
207 }
208 int total = 0;
209 strncpy(buffer, ", ", blen - 1);
210 ADVANCE(2);
211 int written;
212 switch (op.shifterOp) {
213 case ARM_SHIFT_LSL:
214 strncpy(buffer, "lsl ", blen - 1);
215 ADVANCE(4);
216 break;
217 case ARM_SHIFT_LSR:
218 strncpy(buffer, "lsr ", blen - 1);
219 ADVANCE(4);
220 break;
221 case ARM_SHIFT_ASR:
222 strncpy(buffer, "asr ", blen - 1);
223 ADVANCE(4);
224 break;
225 case ARM_SHIFT_ROR:
226 strncpy(buffer, "ror ", blen - 1);
227 ADVANCE(4);
228 break;
229 case ARM_SHIFT_RRX:
230 strncpy(buffer, "rrx", blen - 1);
231 ADVANCE(3);
232 return total;
233 }
234 if (!reg) {
235 written = snprintf(buffer, blen - 1, "#%i", op.shifterImm);
236 } else {
237 written = _decodeRegister(op.shifterReg, buffer, blen);
238 }
239 ADVANCE(written);
240 return total;
241}
242
243static const char* _armMnemonicStrings[] = {
244 "ill",
245 "adc",
246 "add",
247 "and",
248 "asr",
249 "b",
250 "bic",
251 "bkpt",
252 "bl",
253 "bx",
254 "cdp",
255 "cmn",
256 "cmp",
257 "eor",
258 "ldc",
259 "ldm",
260 "ldr",
261 "lsl",
262 "lsr",
263 "mcr",
264 "mla",
265 "mov",
266 "mrc",
267 "mrs",
268 "msr",
269 "mul",
270 "mvn",
271 "neg",
272 "orr",
273 "ror",
274 "rsb",
275 "rsc",
276 "sbc",
277 "smlal",
278 "smull",
279 "stc",
280 "stm",
281 "str",
282 "sub",
283 "swi",
284 "swp",
285 "teq",
286 "tst",
287 "umlal",
288 "umull",
289
290 "ill"
291};
292
293static const char* _armDirectionStrings[] = {
294 "da",
295 "ia",
296 "db",
297 "ib"
298};
299
300static const char* _armAccessTypeStrings[] = {
301 "",
302 "b",
303 "h",
304 "",
305 "",
306 "",
307 "",
308 "",
309
310 "",
311 "sb",
312 "sh",
313 "",
314 "",
315 "",
316 "",
317 "",
318
319 "",
320 "bt",
321 "",
322 "",
323 "t",
324 "",
325 "",
326 ""
327};
328
329int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, int blen) {
330 const char* mnemonic = _armMnemonicStrings[info->mnemonic];
331 int written;
332 int total = 0;
333 const char* cond = "";
334 if (info->condition != ARM_CONDITION_AL && info->condition < ARM_CONDITION_NV) {
335 cond = _armConditions[info->condition];
336 }
337 const char* flags = "";
338 switch (info->mnemonic) {
339 case ARM_MN_LDM:
340 case ARM_MN_STM:
341 flags = _armDirectionStrings[MEMORY_FORMAT_TO_DIRECTION(info->memory.format)];
342 break;
343 case ARM_MN_LDR:
344 case ARM_MN_STR:
345 case ARM_MN_SWP:
346 flags = _armAccessTypeStrings[info->memory.width];
347 break;
348 case ARM_MN_ADD:
349 case ARM_MN_ADC:
350 case ARM_MN_AND:
351 case ARM_MN_BIC:
352 case ARM_MN_EOR:
353 case ARM_MN_MOV:
354 case ARM_MN_MVN:
355 case ARM_MN_ORR:
356 case ARM_MN_RSB:
357 case ARM_MN_RSC:
358 case ARM_MN_SBC:
359 case ARM_MN_SUB:
360 if (info->affectsCPSR && info->execMode == MODE_ARM) {
361 flags = "s";
362 }
363 break;
364 default:
365 break;
366 }
367 written = snprintf(buffer, blen - 1, "%s%s%s ", mnemonic, cond, flags);
368 ADVANCE(written);
369
370 switch (info->mnemonic) {
371 case ARM_MN_LDM:
372 case ARM_MN_STM:
373 written = _decodeRegister(info->memory.baseReg, buffer, blen);
374 ADVANCE(written);
375 if (info->memory.format & ARM_MEMORY_WRITEBACK) {
376 strncpy(buffer, "!", blen - 1);
377 ADVANCE(1);
378 }
379 strncpy(buffer, ", ", blen - 1);
380 ADVANCE(2);
381 written = _decodeRegisterList(info->op1.immediate, buffer, blen);
382 ADVANCE(written);
383 if (info->memory.format & ARM_MEMORY_SPSR_SWAP) {
384 strncpy(buffer, "^", blen - 1);
385 ADVANCE(1);
386 }
387 break;
388 case ARM_MN_B:
389 case ARM_MN_BL:
390 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_1) {
391 written = _decodePCRelative(info->op1.immediate, pc, buffer, blen);
392 ADVANCE(written);
393 }
394 break;
395 default:
396 if (info->operandFormat & ARM_OPERAND_COPROCESSOR) {
397 written = snprintf(buffer, blen - 1, "p%i, %i, ", info->cp.cp, info->cp.op1);
398 ADVANCE(written);
399 }
400 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_1) {
401 written = snprintf(buffer, blen - 1, "#%i", info->op1.immediate);
402 ADVANCE(written);
403 } else if (info->operandFormat & ARM_OPERAND_MEMORY_1) {
404 written = _decodeMemory(info->memory, pc, buffer, blen);
405 ADVANCE(written);
406 } else if (info->operandFormat & ARM_OPERAND_REGISTER_1) {
407 written = _decodeRegister(info->op1.reg, buffer, blen);
408 ADVANCE(written);
409 if (info->op1.reg > ARM_PC) {
410 written = _decodePSR(info->op1.psrBits, buffer, blen);
411 ADVANCE(written);
412 }
413 } else if (info->operandFormat & ARM_OPERAND_COPROCESSOR_REG_1) {
414 written = snprintf(buffer, blen - 1, "c%i", info->op1.reg);
415 }
416 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_1) {
417 written = _decodeShift(info->op1, true, buffer, blen);
418 ADVANCE(written);
419 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_1) {
420 written = _decodeShift(info->op1, false, buffer, blen);
421 ADVANCE(written);
422 }
423 if (info->operandFormat & ARM_OPERAND_2) {
424 strncpy(buffer, ", ", blen);
425 ADVANCE(2);
426 }
427 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_2) {
428 written = snprintf(buffer, blen - 1, "#%i", info->op2.immediate);
429 ADVANCE(written);
430 } else if (info->operandFormat & ARM_OPERAND_MEMORY_2) {
431 written = _decodeMemory(info->memory, pc, buffer, blen);
432 ADVANCE(written);
433 } else if (info->operandFormat & ARM_OPERAND_REGISTER_2) {
434 written = _decodeRegister(info->op2.reg, buffer, blen);
435 ADVANCE(written);
436 } else if (info->operandFormat & ARM_OPERAND_COPROCESSOR_REG_2) {
437 written = snprintf(buffer, blen - 1, "c%i", info->op2.reg);
438 ADVANCE(written);
439 }
440 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_2) {
441 written = _decodeShift(info->op2, true, buffer, blen);
442 ADVANCE(written);
443 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_2) {
444 written = _decodeShift(info->op2, false, buffer, blen);
445 ADVANCE(written);
446 }
447 if (info->operandFormat & ARM_OPERAND_3) {
448 strncpy(buffer, ", ", blen - 1);
449 ADVANCE(2);
450 }
451 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_3) {
452 written = snprintf(buffer, blen - 1, "#%i", info->op3.immediate);
453 ADVANCE(written);
454 } else if (info->operandFormat & ARM_OPERAND_MEMORY_3) {
455 written = _decodeMemory(info->memory, pc, buffer, blen);
456 ADVANCE(written);
457 } else if (info->operandFormat & ARM_OPERAND_REGISTER_3) {
458 written = _decodeRegister(info->op3.reg, buffer, blen);
459 ADVANCE(written);
460 } else if (info->operandFormat & ARM_OPERAND_COPROCESSOR_REG_3) {
461 written = snprintf(buffer, blen - 1, "c%i", info->op3.reg);
462 ADVANCE(written);
463 }
464 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_3) {
465 written = _decodeShift(info->op3, true, buffer, blen);
466 ADVANCE(written);
467 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_3) {
468 written = _decodeShift(info->op3, false, buffer, blen);
469 ADVANCE(written);
470 }
471 if (info->operandFormat & ARM_OPERAND_4) {
472 strncpy(buffer, ", ", blen - 1);
473 ADVANCE(2);
474 }
475 if (info->operandFormat & ARM_OPERAND_IMMEDIATE_4) {
476 written = snprintf(buffer, blen - 1, "#%i", info->op4.immediate);
477 ADVANCE(written);
478 } else if (info->operandFormat & ARM_OPERAND_MEMORY_4) {
479 written = _decodeMemory(info->memory, pc, buffer, blen);
480 ADVANCE(written);
481 } else if (info->operandFormat & ARM_OPERAND_REGISTER_4) {
482 written = _decodeRegister(info->op4.reg, buffer, blen);
483 ADVANCE(written);
484 } else if (info->operandFormat & ARM_OPERAND_COPROCESSOR_REG_4) {
485 written = snprintf(buffer, blen - 1, "c%i", info->op4.reg);
486 ADVANCE(written);
487 }
488 if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_4) {
489 written = _decodeShift(info->op4, true, buffer, blen);
490 ADVANCE(written);
491 } else if (info->operandFormat & ARM_OPERAND_SHIFT_IMMEDIATE_4) {
492 written = _decodeShift(info->op4, false, buffer, blen);
493 ADVANCE(written);
494 }
495 if (info->cp.op2) {
496 written = snprintf(buffer, blen - 1, ", %i", info->cp.op2);
497 ADVANCE(written);
498 }
499 break;
500 }
501 buffer[blen - 1] = '\0';
502 return total;
503}