PowerPC: Fix potential register clobbering in LOAD_64LE
Vicki Pfau vi@endrift.com
Fri, 25 May 2018 17:33:59 -0700
1 files changed,
4 insertions(+),
4 deletions(-)
jump to
M
include/mgba-util/common.h
→
include/mgba-util/common.h
@@ -119,13 +119,13 @@
#define STORE_32LE(SRC, ADDR, ARR) { \ uint32_t _addr = (ADDR); \ void* _ptr = (ARR); \ - __asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr)); \ + __asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \ } #define STORE_16LE(SRC, ADDR, ARR) { \ uint32_t _addr = (ADDR); \ void* _ptr = (ARR); \ - __asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr)); \ + __asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \ } #define LOAD_64LE(DEST, ADDR, ARR) { \@@ -141,7 +141,7 @@ const void* _ptr = (ARR); \
__asm__( \ "lwbrx %0, %2, %3 \n" \ "lwbrx %1, %2, %4 \n" \ - : "=r"(bswap->lo), "=r"(bswap->hi) : "b"(_ptr), "r"(_addr), "r"(_addr + 4)); \ + : "=&r"(bswap->lo), "=&r"(bswap->hi) : "b"(_ptr), "r"(_addr), "r"(_addr + 4)) ; \ } #define STORE_64LE(SRC, ADDR, ARR) { \@@ -157,7 +157,7 @@ const void* _ptr = (ARR); \
__asm__( \ "stwbrx %0, %2, %3 \n" \ "stwbrx %1, %2, %4 \n" \ - : : "r"(bswap->hi), "r"(bswap->lo), "b"(_ptr), "r"(_addr), "r"(_addr + 4)); \ + : : "r"(bswap->hi), "r"(bswap->lo), "b"(_ptr), "r"(_addr), "r"(_addr + 4) : "memory"); \ } #elif defined(__llvm__) || (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)