M src/core/tile-cache.c → src/core/tile-cache.c

@@ -90,6 +90,7 @@ unsigned count = cache->entriesPerTile;
 	size_t i;
 	for (i = 0; i < count; ++i) {
 		cache->status[(address >> bpp) * count + i].vramClean = 0;
+		++cache->status[(address >> bpp) * count + i].vramVersion;
 	}
 }
 
@@ -221,6 +222,7 @@ unsigned bpp = cache->bpp;
 	struct mTileCacheEntry* status = &cache->status[tileId * count + paletteId];
 	struct mTileCacheEntry desiredStatus = {
 		.paletteVersion = cache->globalPaletteVersion[cPaletteId][paletteId],
+		.vramVersion = status->vramVersion,
 		.vramClean = 1,
 		.paletteId = paletteId,
 		.activePalette = cPaletteId
@@ -252,6 +254,7 @@ unsigned bpp = cache->bpp;
 	struct mTileCacheEntry* status = &cache->status[tileId * count + paletteId];
 	struct mTileCacheEntry desiredStatus = {
 		.paletteVersion = cache->globalPaletteVersion[cPaletteId][paletteId],
+		.vramVersion = status->vramVersion,
 		.vramClean = 1,
 		.paletteId = paletteId,
 		.activePalette = cPaletteId

M src/core/tile-cache.h → src/core/tile-cache.h

@@ -20,9 +20,11 @@ DECL_BITS(mTileCacheSystemInfo, MaxTiles, 16, 13);
 
 struct mTileCacheEntry {
 	uint32_t paletteVersion;
+	uint32_t vramVersion;
 	uint8_t vramClean;
 	uint8_t paletteId;
 	uint8_t activePalette;
+	uint8_t padding;
 };
 
 struct mTileCache {