GBA BIOS: Fix BIOS prefetch after returning from a SWI
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Dec 2014 06:08:55 -0800
3 files changed,
35 insertions(+),
33 deletions(-)
M
CHANGES
→
CHANGES
@@ -11,6 +11,7 @@ - GBA BIOS: Fix HLE Lz77 and RL functions to properly account for width and invalid addresses
- ARM7: Fix LDM writeback to a register already written - GBA Memory: Don't call into GPIO write calls if GPIO devices are absent - ARM7: Extend prefetch by one stage + - GBA BIOS: Fix BIOS prefetch after returning from a SWI Misc: - Qt: Disable sync to video by default - GBA: Exit cleanly on FATAL if the port supports it
M
src/gba/hle-bios.c
→
src/gba/hle-bios.c
@@ -10,45 +10,45 @@
const uint8_t hleBios[SIZE_BIOS] = { 0x06, 0x00, 0x00, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x05, 0x00, 0x00, 0xea, 0xfe, 0xff, 0xff, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x00, 0x00, 0xa0, 0xe1, - 0x24, 0x00, 0x00, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x02, 0xf3, 0xa0, 0xe3, + 0x25, 0x00, 0x00, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x02, 0xf3, 0xa0, 0xe3, 0x00, 0x00, 0x5d, 0xe3, 0x01, 0xd3, 0xa0, 0x03, 0x20, 0xd0, 0x4d, 0x02, - 0x00, 0x58, 0x2d, 0xe9, 0x02, 0xb0, 0x5e, 0xe5, 0x7c, 0xc0, 0xa0, 0xe3, + 0x00, 0x58, 0x2d, 0xe9, 0x02, 0xb0, 0x5e, 0xe5, 0x80, 0xc0, 0xa0, 0xe3, 0x0b, 0xb1, 0x9c, 0xe7, 0x00, 0x00, 0x5b, 0xe3, 0x00, 0xc0, 0x4f, 0xe1, 0x00, 0x10, 0x2d, 0xe9, 0x80, 0xc0, 0x0c, 0xe2, 0x1f, 0xc0, 0x8c, 0xe3, 0x0c, 0xf0, 0x29, 0xe1, 0x00, 0x40, 0x2d, 0xe9, 0x0f, 0xe0, 0xa0, 0xe1, 0x1b, 0xff, 0x2f, 0x11, 0x00, 0x40, 0xbd, 0xe8, 0x93, 0xf0, 0x29, 0xe3, 0x00, 0x10, 0xbd, 0xe8, 0x0c, 0xf0, 0x69, 0xe1, 0x00, 0x58, 0xbd, 0xe8, - 0x0e, 0xf0, 0xb0, 0xe1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x00, 0x00, 0x00, - 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M
src/gba/hle-bios.s
→
src/gba/hle-bios.s
@@ -42,6 +42,7 @@ ldmfd sp!, {r12}
msr spsr, r12 ldmfd sp!, {r11-r12, lr} movs pc, lr +.word 0x0000C301 swiTable: .word SoftReset