M src/gb/memory.c → src/gb/memory.c

@@ -62,6 +62,7 @@ }
 	gb->memory.wram = anonymousMemoryMap(GB_SIZE_WORKING_RAM);
 	gb->memory.wramBank = &gb->memory.wram[GB_SIZE_WORKING_RAM_BANK0];
 	gb->memory.romBank = &gb->memory.rom[GB_SIZE_CART_BANK0];
+	gb->memory.currentBank = 1;
 
 	const struct GBCartridge* cart = &gb->memory.rom[0x100];
 	switch (cart->type) {

M src/lr35902/lr35902.c → src/lr35902/lr35902.c

@@ -66,6 +66,7 @@ cpu->nextEvent = 0;
 	cpu->executionState = LR35902_CORE_FETCH;
 	cpu->halted = 0;
 
+	cpu->irqPending = false;
 	cpu->irqh.reset(cpu);
 }