GB: CPU can still decode instructions during DMAs
Jeffrey Pfau jeffrey@endrift.com
Tue, 26 Jan 2016 20:56:03 -0800
3 files changed,
3 insertions(+),
1 deletions(-)
M
src/gb/memory.c
→
src/gb/memory.c
@@ -37,6 +37,7 @@
void GBMemoryInit(struct GB* gb) { struct LR35902Core* cpu = gb->cpu; + cpu->memory.cpuLoad8 = GBLoad8; cpu->memory.load8 = GBLoad8; cpu->memory.store8 = GBStore8; cpu->memory.setActiveRegion = GBSetActiveRegion;
M
src/lr35902/lr35902.c
→
src/lr35902/lr35902.c
@@ -106,7 +106,7 @@ cpu->irqPending = false;
cpu->instruction = _LR35902InstructionIRQ; break; } - cpu->bus = cpu->memory.load8(cpu, cpu->pc); + cpu->bus = cpu->memory.cpuLoad8(cpu, cpu->pc); cpu->instruction = _lr35902InstructionTable[cpu->bus]; ++cpu->pc; break;
M
src/lr35902/lr35902.h
→
src/lr35902/lr35902.h
@@ -48,6 +48,7 @@ LR35902_CORE_OP2 = 20
}; struct LR35902Memory { + uint8_t (*cpuLoad8)(struct LR35902Core*, uint16_t address); uint8_t (*load8)(struct LR35902Core*, uint16_t address); void (*store8)(struct LR35902Core*, uint16_t address, int8_t value);