ARM: Partially fix LDM/STM writeback with empty register list
Vicki Pfau vi@endrift.com
Fri, 01 Nov 2019 19:37:08 -0700
4 files changed,
17 insertions(+),
1 deletions(-)
M
CHANGES
→
CHANGES
@@ -88,6 +88,7 @@ - Vita: L2/R2 and L3/R3 can now be mapped on PSTV (fixes mgba.io/i/1292)
Changes from beta 1: Emulation fixes: - ARM: Fix STR writeback pipeline stage + - ARM: Partially fix LDM/STM writeback with empty register list - GBA DMA: Fix case where DMAs could get misaligned (fixes mgba.io/i/1092) Other fixes: - 3DS: Fix screen darkening (fixes mgba.io/i/1562)
M
src/arm/isa-arm.c
→
src/arm/isa-arm.c
@@ -601,7 +601,7 @@
DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM, load, currentCycles += cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32; - if (rs & 0x8000) { + if ((rs & 0x8000) || !rs) { currentCycles += ARMWritePC(cpu); })
M
src/arm/isa-thumb.c
→
src/arm/isa-thumb.c
@@ -295,6 +295,9 @@ load,
IA, , THUMB_LOAD_POST_BODY; + if (!rs) { + currentCycles += ThumbWritePC(cpu); + } if (!((1 << rn) & rs)) { cpu->gprs[rn] = address; })
M
src/gba/memory.c
→
src/gba/memory.c
@@ -1326,6 +1326,12 @@ }
} #define LDM_LOOP(LDM) \ + if (UNLIKELY(!mask)) { \ + LDM; \ + cpu->gprs[ARM_PC] = value; \ + wait += 16; \ + address += 64; \ + } \ for (i = 0; i < 16; i += 4) { \ if (UNLIKELY(mask & (1 << i))) { \ LDM; \@@ -1438,6 +1444,12 @@ return address | addressMisalign;
} #define STM_LOOP(STM) \ + if (UNLIKELY(!mask)) { \ + value = cpu->gprs[ARM_PC] + (cpu->executionMode == MODE_ARM ? WORD_SIZE_ARM : WORD_SIZE_THUMB); \ + STM; \ + wait += 16; \ + address += 64; \ + } \ for (i = 0; i < 16; i += 4) { \ if (UNLIKELY(mask & (1 << i))) { \ value = cpu->gprs[i]; \