M src/arm.h → src/arm.h

@@ -66,7 +66,9 @@ int8_t (*load8)(struct ARMMemory*, uint32_t address);
 	uint8_t (*loadU8)(struct ARMMemory*, uint32_t address);
 };
 
-struct ARMBoard;
+struct ARMBoard {
+	// TODO
+};
 
 struct ARMCore {
 	int32_t gprs[16];

A src/gba.c

@@ -0,0 +1,200 @@
+#include "gba.h"
+
+#include <sys/mman.h>
+
+void GBAInit(struct GBA* gba) {
+	ARMInit(&gba->cpu);
+	GBAMemoryInit(&gba->memory);
+}
+
+void GBADeinit(struct GBA* gba) {
+	GBAMemoryDeinit(&gba->memory);
+}
+
+void GBAMemoryInit(struct GBAMemory* memory) {
+	memory->d.load32 = GBALoad32;
+	memory->d.load16 = GBALoad16;
+	memory->d.loadU16 = GBALoadU16;
+	memory->d.load8 = GBALoad8;
+	memory->d.loadU8 = GBALoadU8;
+
+	memory->bios = 0;
+	memory->wram = mmap(0, SIZE_WORKING_RAM, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	memory->iwram = mmap(0, SIZE_WORKING_IRAM, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
+	memory->rom = 0;
+}
+
+void GBAMemoryDeinit(struct GBAMemory* memory) {
+	munmap(memory->wram, SIZE_WORKING_RAM);
+	munmap(memory->iwram, SIZE_WORKING_IRAM);
+}
+
+int32_t GBALoad32(struct ARMMemory* memory, uint32_t address) {
+	struct GBAMemory* gbaMemory = (struct GBAMemory*) memory;
+
+	switch (address & OFFSET_MASK) {
+	case REGION_BIOS:
+		break;
+	case REGION_WORKING_RAM:
+		break;
+	case REGION_WORKING_IRAM:
+		break;
+	case REGION_IO:
+		break;
+	case REGION_PALETTE_RAM:
+		break;
+	case REGION_VRAM:
+		break;
+	case REGION_OAM:
+		break;
+	case REGION_CART0:
+	case REGION_CART0_EX:
+	case REGION_CART1:
+	case REGION_CART1_EX:
+	case REGION_CART2:
+	case REGION_CART2_EX:
+		break;
+	case REGION_CART_SRAM:
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+int16_t GBALoad16(struct ARMMemory* memory, uint32_t address) {
+	struct GBAMemory* gbaMemory = (struct GBAMemory*) memory;
+
+	switch (address & OFFSET_MASK) {
+	case REGION_BIOS:
+		break;
+	case REGION_WORKING_RAM:
+		break;
+	case REGION_WORKING_IRAM:
+		break;
+	case REGION_IO:
+		break;
+	case REGION_PALETTE_RAM:
+		break;
+	case REGION_VRAM:
+		break;
+	case REGION_OAM:
+		break;
+	case REGION_CART0:
+	case REGION_CART0_EX:
+	case REGION_CART1:
+	case REGION_CART1_EX:
+	case REGION_CART2:
+	case REGION_CART2_EX:
+		break;
+	case REGION_CART_SRAM:
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+uint16_t GBALoadU16(struct ARMMemory* memory, uint32_t address) {
+	struct GBAMemory* gbaMemory = (struct GBAMemory*) memory;
+
+	switch (address & OFFSET_MASK) {
+	case REGION_BIOS:
+		break;
+	case REGION_WORKING_RAM:
+		break;
+	case REGION_WORKING_IRAM:
+		break;
+	case REGION_IO:
+		break;
+	case REGION_PALETTE_RAM:
+		break;
+	case REGION_VRAM:
+		break;
+	case REGION_OAM:
+		break;
+	case REGION_CART0:
+	case REGION_CART0_EX:
+	case REGION_CART1:
+	case REGION_CART1_EX:
+	case REGION_CART2:
+	case REGION_CART2_EX:
+		break;
+	case REGION_CART_SRAM:
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+int8_t GBALoad8(struct ARMMemory* memory, uint32_t address) {
+	struct GBAMemory* gbaMemory = (struct GBAMemory*) memory;
+
+	switch (address & OFFSET_MASK) {
+	case REGION_BIOS:
+		break;
+	case REGION_WORKING_RAM:
+		break;
+	case REGION_WORKING_IRAM:
+		break;
+	case REGION_IO:
+		break;
+	case REGION_PALETTE_RAM:
+		break;
+	case REGION_VRAM:
+		break;
+	case REGION_OAM:
+		break;
+	case REGION_CART0:
+	case REGION_CART0_EX:
+	case REGION_CART1:
+	case REGION_CART1_EX:
+	case REGION_CART2:
+	case REGION_CART2_EX:
+		break;
+	case REGION_CART_SRAM:
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+uint8_t GBALoadU8(struct ARMMemory* memory, uint32_t address) {
+	struct GBAMemory* gbaMemory = (struct GBAMemory*) memory;
+
+	switch (address & OFFSET_MASK) {
+	case REGION_BIOS:
+		break;
+	case REGION_WORKING_RAM:
+		break;
+	case REGION_WORKING_IRAM:
+		break;
+	case REGION_IO:
+		break;
+	case REGION_PALETTE_RAM:
+		break;
+	case REGION_VRAM:
+		break;
+	case REGION_OAM:
+		break;
+	case REGION_CART0:
+	case REGION_CART0_EX:
+	case REGION_CART1:
+	case REGION_CART1_EX:
+	case REGION_CART2:
+	case REGION_CART2_EX:
+		break;
+	case REGION_CART_SRAM:
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}

A src/gba.h

@@ -0,0 +1,75 @@
+#ifndef GBA_MEMORY_H
+#define GBA_MEMORY_H
+
+#include "arm.h"
+
+enum GBAMemoryRegion {
+	REGION_BIOS = 0x0,
+	REGION_WORKING_RAM = 0x2,
+	REGION_WORKING_IRAM = 0x3,
+	REGION_IO = 0x4,
+	REGION_PALETTE_RAM = 0x5,
+	REGION_VRAM = 0x6,
+	REGION_OAM = 0x7,
+	REGION_CART0 = 0x8,
+	REGION_CART0_EX = 0x9,
+	REGION_CART1 = 0xA,
+	REGION_CART1_EX = 0xB,
+	REGION_CART2 = 0xC,
+	REGION_CART2_EX = 0xD,
+	REGION_CART_SRAM = 0xE
+};
+
+enum {
+	SIZE_BIOS = 0x00004000,
+	SIZE_WORKING_RAM = 0x00040000,
+	SIZE_WORKING_IRAM = 0x00008000,
+	SIZE_IO = 0x00000400,
+	SIZE_PALETTE_RAM = 0x00000400,
+	SIZE_VRAM = 0x00018000,
+	SIZE_OAM = 0x00000400,
+	SIZE_CART0 = 0x02000000,
+	SIZE_CART1 = 0x02000000,
+	SIZE_CART2 = 0x02000000,
+	SIZE_CART_SRAM = 0x00008000,
+	SIZE_CART_FLASH512 = 0x00010000,
+	SIZE_CART_FLASH1M = 0x00020000,
+	SIZE_CART_EEPROM = 0x00002000
+};
+
+enum {
+	OFFSET_MASK = 0x00FFFFFF
+};
+
+struct GBAMemory {
+	struct ARMMemory d;
+
+	int32_t* bios;
+	int32_t* wram;
+	int32_t* iwram;
+	int32_t* rom;
+};
+
+struct GBABoard {
+	struct ARMBoard board;
+};
+
+struct GBA {
+	struct ARMCore cpu;
+	struct GBABoard board;
+	struct GBAMemory memory;
+};
+
+void GBAInit(struct GBA* gba);
+void GBADeinit(struct GBA* gba);
+
+void GBAMemoryInit(struct GBAMemory* memory);
+void GBAMemoryDeinit(struct GBAMemory* memory);
+
+int32_t GBALoad32(struct ARMMemory* memory, uint32_t address);
+int16_t GBALoad16(struct ARMMemory* memory, uint32_t address);
+uint16_t GBALoadU16(struct ARMMemory* memory, uint32_t address);
+int8_t GBALoad8(struct ARMMemory* memory, uint32_t address);
+uint8_t GBALoadU8(struct ARMMemory* memory, uint32_t address);
+
+#endif

M src/main.c → src/main.c

@@ -1,8 +1,9 @@
-#include "arm.h"
+#include "gba.h"
 
 int main(int argc, char** argv) {
-	struct ARMCore cpu;
-	ARMInit(&cpu);
+	struct GBA gba;
+	GBAInit(&gba);
+	GBADeinit(&gba);
 
 	return 0;
 }